NMSISCore
Version 1.2.0
NMSISCore support for Nuclei processorbased devices

Version Control  Version #define symbols for NMSIS release specific C/C++ source code 
Peripheral Access  Naming conventions and optional features for accessing peripherals 
Compiler Control  Compiler agnostic #define symbols for generic c/c++ source code 
▼Core CSR Encodings  NMSIS Core CSR Encodings 
Core CSR Registers  NMSIS Core CSR Register Definitions 
▼Register Define and Type Definitions  Type definitions and defines for core registers 
Base Register Define and Type Definitions  Type definitions and defines for base core registers 
Register Define and Type Definitions Of ECLIC  Type definitions and defines for eclic registers 
Register Define and Type Definitions Of System Timer  Type definitions and defines for system timer registers 
Core CSR Register Access  Functions to access the Core CSR Registers 
Intrinsic Functions for CPU Intructions  Functions that generate RISCV CPU instructions 
Interrupts and Exceptions  Functions that manage interrupts and exceptions via the ECLIC 
SysTimer Functions  Functions that configure the Core System Timer 
FPU Functions  Functions that related to the RISCV FPU (F and D extension) 
▼Intrinsic Functions for SIMD Instructions  Functions that generate RISCV DSP SIMD instructions 
▼SIMD Data Processing Instructions  SIMD Data Processing Instructions 
SIMD 16bit Add/Subtract Instructions  SIMD 16bit Add/Subtract Instructions 
SIMD 8bit Addition & Subtraction Instructions  SIMD 8bit Addition & Subtraction Instructions 
SIMD 16bit Shift Instructions  SIMD 16bit Shift Instructions 
SIMD 8bit Shift Instructions  SIMD 8bit Shift Instructions 
SIMD 16bit Compare Instructions  SIMD 16bit Compare Instructions 
SIMD 8bit Compare Instructions  SIMD 8bit Compare Instructions 
SIMD 16bit Multiply Instructions  SIMD 16bit Multiply Instructions 
SIMD 8bit Multiply Instructions  SIMD 8bit Multiply Instructions 
SIMD 16bit Miscellaneous Instructions  SIMD 16bit Miscellaneous Instructions 
SIMD 8bit Miscellaneous Instructions  SIMD 8bit Miscellaneous Instructions 
SIMD 8bit Unpacking Instructions  SIMD 8bit Unpacking Instructions 
▼NonSIMD Instructions  NonSIMD Instructions 
NonSIMD Q15 saturation ALU Instructions  NonSIMD Q15 saturation ALU Instructions 
NonSIMD Q31 saturation ALU Instructions  NonSIMD Q31 saturation ALU Instructions 
32bit Computation Instructions  32bit Computation Instructions 
OV (Overflow) flag Set/Clear Instructions  OV (Overflow) flag Set/Clear Instructions 
NonSIMD Miscellaneous Instructions  NonSIMD Miscellaneous Instructions 
▼PartialSIMD Data Processing Instructions  PartialSIMD Data Processing Instructions 
SIMD 16bit Packing Instructions  SIMD 16bit Packing Instructions 
Signed MSW 32x32 Multiply and Add Instructions  Signed MSW 32x32 Multiply and Add Instructions 
Signed MSW 32x16 Multiply and Add Instructions  Signed MSW 32x16 Multiply and Add Instructions 
Signed 16bit Multiply 32bit Add/Subtract Instructions  Signed 16bit Multiply 32bit Add/Subtract Instructions 
Signed 16bit Multiply 64bit Add/Subtract Instructions  Signed 16bit Multiply 64bit Add/Subtract Instructions 
PartialSIMD Miscellaneous Instructions  PartialSIMD Miscellaneous Instructions 
8bit Multiply with 32bit Add Instructions  8bit Multiply with 32bit Add Instructions 
▼64bit Profile Instructions  64bit Profile Instructions 
64bit Addition & Subtraction Instructions  64bit Addition & Subtraction Instructions 
32bit Multiply with 64bit Add/Subtract Instructions  32bit Multiply with 64bit Add/Subtract Instructions 
Signed 16bit Multiply 64bit Add/Subtract Instructions  Signed 16bit Multiply 64bit Add/Subtract Instructions 
▼RV64 Only Instructions  RV64 Only Instructions 
(RV64 Only) SIMD 32bit Add/Subtract Instructions  (RV64 Only) SIMD 32bit Add/Subtract Instructions 
(RV64 Only) SIMD 32bit Shift Instructions  (RV64 Only) SIMD 32bit Shift Instructions 
(RV64 Only) SIMD 32bit Miscellaneous Instructions  (RV64 Only) SIMD 32bit Miscellaneous Instructions 
(RV64 Only) SIMD Q15 Saturating Multiply Instructions  (RV64 Only) SIMD Q15 Saturating Multiply Instructions 
(RV64 Only) 32bit Multiply Instructions  (RV64 Only) 32bit Multiply Instructions 
(RV64 Only) 32bit Multiply & Add Instructions  (RV64 Only) 32bit Multiply & Add Instructions 
(RV64 Only) 32bit Parallel Multiply & Add Instructions  (RV64 Only) 32bit Parallel Multiply & Add Instructions 
(RV64 Only) NonSIMD 32bit Shift Instructions  (RV64 Only) NonSIMD 32bit Shift Instructions 
32bit Packing Instructions  32bit Packing Instructions 
Nuclei Default SIMD DSP Additional Instructions  (RV32 & RV64)Nuclei Customized DSP Instructions 
Nuclei N1 SIMD DSP Additional Instructions  (RV32 only)Nuclei Customized N1 DSP Instructions 
Nuclei N2 SIMD DSP Additional Instructions  (RV32 only)Nuclei Customized N2 DSP Instructions 
Nuclei N3 SIMD DSP Additional Instructions  (RV32 only)Nuclei Customized N3 DSP Instructions 
PMP Functions  Functions that related to the RISCV Phyiscal Memory Protection 
sPMP Functions  Functions that related to the RISCV supervisormode Phyiscal Memory Protection 
▼Cache Functions  Functions that configure Instruction and Data Cache 
ICache Functions  Functions that configure Instruction Cache 
DCache Functions  Functions that configure Data Cache 
ARM Compatiable Functions  A few functions that compatiable with ARM CMSISCore 
▼System Device Configuration  Functions for system and clock setup available in system_<device>.c 
Interrupt and Exception and NMI Handling  Functions for interrupt, exception and nmi handle available in system_<device>.c 