Functions that manage external interrupts, inter core interrupts and semaphores. More...

Modules
	External Interrupt Distribution Functions
	Functions that distribute external interrupts to cores.

	Inter Core Interrupt Functions
	Functions that implement Inter Core Interrupt mechanism.

	Semaphore Functions
	Functions that configure and use semaphoresSemaphore is very useful for multi-core cluster without SMP enable.

Macros
#define	CIDU_BASE __CIDU_BASEADDR

#define	CIDU_RECEIVE_INTERRUPT_EN(core_id) (0x1UL << core_id)
	Indicates the core can receive corresponding interrupt. More...

#define	CIDU_CORE_INT_STATUS_OFS 0x0
	Core n Inter Core Interrupt status register base offset. More...

#define	CIDU_SEMAPHORE_OFS 0x80
	Semaphore n register base offset. More...

#define	CIDU_ICI_SHADOW_OFS 0x3FFC
	ICI Interrupt source core ID and target core ID register offset. More...

#define	CIDU_INT_INDICATOR_OFS 0x4000
	External interrupt n indicator register base offset. More...

#define	CIDU_INT_MASK_OFS 0x8000
	External interrupt n mask (mask interrupt n to cores or not when interrupt n indicator on)register base offset. More...

#define	CIDU_CORE_NUM_OFS 0xC084
	Static configuration core num register offset. More...

#define	CIDU_INT_NUM_OFS 0xC090
	Static configuration external interrupt number register offset. More...

#define	CIDU_CORE_INT_STATUS_ADDR(n) (unsigned long)((CIDU_BASE) + (CIDU_CORE_INT_STATUS_OFS) + ((n) << 2))
	Core n Inter Core Interrupt status register address. More...

#define	CIDU_SEMAPHORE_ADDR(n) (unsigned long)((CIDU_BASE) + (CIDU_SEMAPHORE_OFS) + ((n) << 2))
	Semaphore n register address. More...

#define	CIDU_ICI_SHADOW_ADDR (unsigned long)((CIDU_BASE) + (CIDU_ICI_SHADOW_OFS))
	ICI Interrupt source core ID and target core ID register address. More...

#define	CIDU_INT_INDICATOR_ADDR(n) (unsigned long)((CIDU_BASE) + (CIDU_INT_INDICATOR_OFS) + ((n) << 2))
	External interrupt n indicator register address. More...

#define	CIDU_INT_MASK_ADDR(n) (unsigned long)((CIDU_BASE) + (CIDU_INT_MASK_OFS) + ((n) << 2))
	External interrupt n mask (mask interrupt n to cores or not when interrupt n indicator on)register address. More...

#define	CIDU_CORE_NUM_ADDR (unsigned long)((CIDU_BASE) + (CIDU_CORE_NUM_OFS))
	Static configuration core num register address. More...

#define	CIDU_INT_NUM_ADDR (unsigned long)((CIDU_BASE) + (CIDU_INT_NUM_OFS))
	Static configuration external interrupt number register address. More...

#define	CIDU_ICI_SEND_CORE_ID_POS 16

Functions
__STATIC_FORCEINLINE uint32_t	CIDU_GetCoreNum (void)
	Get core number in the cluster. More...

__STATIC_FORCEINLINE uint32_t	CIDU_GetIntNum (void)
	Get external interrupt number. More...

Detailed Description

Functions that manage external interrupts, inter core interrupts and semaphores.

Nuclei provide Cluster Interrupt Distribution Unit (CIDU) for scenarios that a SMP system is designed for real time application or both Linux and real time application, and Nuclei processor core can optionally support CIDU. The CIDU is used to distribute external interrupts to the core’s ECLIC, also it provides Inter Core Interrupt (ICI) and Semaphores Mechanism. Its features are as follows:

Support up to 16 Cores in one cluster
Support up to 4096 external interrupts sources
Support up to 16 Inter Core Interrupts
Support 32 Semaphores

Macro Definition Documentation

◆ CIDU_BASE

#define CIDU_BASE __CIDU_BASEADDR

Definition at line 64 of file core_feature_cidu.h.

◆ CIDU_CORE_INT_STATUS_ADDR

#define CIDU_CORE_INT_STATUS_ADDR ( n ) (unsigned long)((CIDU_BASE) + (CIDU_CORE_INT_STATUS_OFS) + ((n) << 2))

Core n Inter Core Interrupt status register address.

Definition at line 75 of file core_feature_cidu.h.

◆ CIDU_CORE_INT_STATUS_OFS

#define CIDU_CORE_INT_STATUS_OFS 0x0

Core n Inter Core Interrupt status register base offset.

Definition at line 67 of file core_feature_cidu.h.

◆ CIDU_CORE_NUM_ADDR

#define CIDU_CORE_NUM_ADDR (unsigned long)((CIDU_BASE) + (CIDU_CORE_NUM_OFS))

Static configuration core num register address.

Definition at line 80 of file core_feature_cidu.h.

◆ CIDU_CORE_NUM_OFS

#define CIDU_CORE_NUM_OFS 0xC084

Static configuration core num register offset.

Definition at line 72 of file core_feature_cidu.h.

◆ CIDU_ICI_SEND_CORE_ID_POS

#define CIDU_ICI_SEND_CORE_ID_POS 16

Definition at line 85 of file core_feature_cidu.h.

◆ CIDU_ICI_SHADOW_ADDR

#define CIDU_ICI_SHADOW_ADDR (unsigned long)((CIDU_BASE) + (CIDU_ICI_SHADOW_OFS))

ICI Interrupt source core ID and target core ID register address.

Definition at line 77 of file core_feature_cidu.h.

◆ CIDU_ICI_SHADOW_OFS

#define CIDU_ICI_SHADOW_OFS 0x3FFC

ICI Interrupt source core ID and target core ID register offset.

Definition at line 69 of file core_feature_cidu.h.

◆ CIDU_INT_INDICATOR_ADDR

#define CIDU_INT_INDICATOR_ADDR ( n ) (unsigned long)((CIDU_BASE) + (CIDU_INT_INDICATOR_OFS) + ((n) << 2))

External interrupt n indicator register address.

Definition at line 78 of file core_feature_cidu.h.

◆ CIDU_INT_INDICATOR_OFS

#define CIDU_INT_INDICATOR_OFS 0x4000

External interrupt n indicator register base offset.

Definition at line 70 of file core_feature_cidu.h.

◆ CIDU_INT_MASK_ADDR

#define CIDU_INT_MASK_ADDR ( n ) (unsigned long)((CIDU_BASE) + (CIDU_INT_MASK_OFS) + ((n) << 2))

External interrupt n mask (mask interrupt n to cores or not when interrupt n indicator on)register address.

Definition at line 79 of file core_feature_cidu.h.

◆ CIDU_INT_MASK_OFS

#define CIDU_INT_MASK_OFS 0x8000

External interrupt n mask (mask interrupt n to cores or not when interrupt n indicator on)register base offset.

Definition at line 71 of file core_feature_cidu.h.

◆ CIDU_INT_NUM_ADDR

#define CIDU_INT_NUM_ADDR (unsigned long)((CIDU_BASE) + (CIDU_INT_NUM_OFS))

Static configuration external interrupt number register address.

Definition at line 81 of file core_feature_cidu.h.

◆ CIDU_INT_NUM_OFS

#define CIDU_INT_NUM_OFS 0xC090

Static configuration external interrupt number register offset.

Definition at line 73 of file core_feature_cidu.h.

◆ CIDU_RECEIVE_INTERRUPT_EN

#define CIDU_RECEIVE_INTERRUPT_EN ( core_id ) (0x1UL << core_id)

Indicates the core can receive corresponding interrupt.

Definition at line 65 of file core_feature_cidu.h.

◆ CIDU_SEMAPHORE_ADDR

#define CIDU_SEMAPHORE_ADDR ( n ) (unsigned long)((CIDU_BASE) + (CIDU_SEMAPHORE_OFS) + ((n) << 2))

Semaphore n register address.

Definition at line 76 of file core_feature_cidu.h.

◆ CIDU_SEMAPHORE_OFS

#define CIDU_SEMAPHORE_OFS 0x80

Semaphore n register base offset.

Definition at line 68 of file core_feature_cidu.h.

Function Documentation

◆ CIDU_GetCoreNum()

__STATIC_FORCEINLINE uint32_t CIDU_GetCoreNum ( void )

Get core number in the cluster.

Indicate the static configuration core num in the cluster.

Returns: core number configured

Remarks

In a Nulcei multi-core system, each core has an identifiable serial number, the serial number starts from 0 and is continuous, also the number is static.
CORE_NUM register is read only.

Definition at line 97 of file core_feature_cidu.h.

 {
     uint32_t val;
     uint32_t* addr = (uint32_t*)CIDU_CORE_NUM_ADDR;
  
     val = __LW(addr);
     return val;
 }

References __LW(), and CIDU_CORE_NUM_ADDR.

◆ CIDU_GetIntNum()

__STATIC_FORCEINLINE uint32_t CIDU_GetIntNum ( void )

Get external interrupt number.

Indicate the static configuration external interrupt number

Returns: interrupt number configured