NMSIS-Core  Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
Inter Core Interrupt Functions

Functions that implement Inter Core Interrupt mechanism. More...

Functions

__STATIC_FORCEINLINE void CIDU_TriggerInterCoreInt (uint32_t send_core_id, uint32_t recv_core_id)
 Trigger interrupt to another core in a multi-core cluster. More...
 
__STATIC_FORCEINLINE uint32_t CIDU_QueryCoreIntSenderMask (uint32_t recv_core_id)
 Core recv_core_id queries out who sends inter core interrupt to itself. More...
 
__STATIC_FORCEINLINE void CIDU_ClearInterCoreIntReq (uint32_t send_core_id, uint32_t recv_core_id)
 Clear the corresponding bit/bits of ICI request triggered by sender core. More...
 

Detailed Description

Functions that implement Inter Core Interrupt mechanism.

Inter Core Interrupt (ICI) means that one core can send interrupt to another core in a multi-core cluster. CIDU ICI belongs to Internal Interrupt.

Function Documentation

◆ CIDU_ClearInterCoreIntReq()

__STATIC_FORCEINLINE void CIDU_ClearInterCoreIntReq ( uint32_t  send_core_id,
uint32_t  recv_core_id 
)

Clear the corresponding bit/bits of ICI request triggered by sender core.

Core recv_core_id write 1 to clear the bit send_core_id of the core recv_core_id's COREn_INT_STATUS.

Parameters
[in]send_core_idthe core id which wants to send the inter core interrupt
[in]recv_core_idthe core id which will receive the inter core interrupt
Remarks
  • If the ICI ISR has finished the job of send_core_id_n's ICI, then clear bit send_core_id_n; if it has finished send_core_id_n and send_core_id_m's, then should clear both the bits, etc.

Definition at line 309 of file core_feature_cidu.h.

310 {
311  uint32_t val = 0;
312  uint32_t* addr = (uint32_t*)CIDU_CORE_INT_STATUS_ADDR(recv_core_id);
313 
314  val = (uint32_t)(1UL << send_core_id);
315  __SW(addr, val);
316 }
#define CIDU_CORE_INT_STATUS_ADDR(n)
Core n Inter Core Interrupt status register address.
__STATIC_FORCEINLINE void __SW(volatile void *addr, uint32_t val)
Write 32bit value to address (32 bit)

References __SW(), and CIDU_CORE_INT_STATUS_ADDR.

◆ CIDU_QueryCoreIntSenderMask()

__STATIC_FORCEINLINE uint32_t CIDU_QueryCoreIntSenderMask ( uint32_t  recv_core_id)

Core recv_core_id queries out who sends inter core interrupt to itself.

In the ISR of ICI, receive core can query if bit[n] of this return value is 1, core n sends the current ICI, if bit[m] is 1, then core m also sends, etc.

Parameters
[in]recv_core_idthe core id which receives the inter core interrupt
Returns
Value that shows sender core's ID n whose bitn is 1
Remarks

Definition at line 290 of file core_feature_cidu.h.

291 {
292  uint32_t val = 0;
293  uint32_t* addr = (uint32_t*)CIDU_CORE_INT_STATUS_ADDR(recv_core_id);
294 
295  val = __LW(addr);
296  return val;
297 }
__STATIC_FORCEINLINE uint32_t __LW(volatile void *addr)
Load 32bit value from address (32 bit)

References __LW(), and CIDU_CORE_INT_STATUS_ADDR.

◆ CIDU_TriggerInterCoreInt()

__STATIC_FORCEINLINE void CIDU_TriggerInterCoreInt ( uint32_t  send_core_id,
uint32_t  recv_core_id 
)

Trigger interrupt to another core in a multi-core cluster.

When called by core send_core_id, CIDU will trigger ICI to core recv_core_id automatically. and core recv_core_id could query CIDU_GetCoreIntSenderId to know the sender.

Parameters
[in]send_core_idthe core id which want to send the inter core interrupt
[in]recv_core_idthe core id which will receive the inter core interrupt
Remarks
  • The core recv_core_id need to call CIDU_ClearInterCoreIntReq to clear the corresponding bit/bits of its own COREn_INT_STATUS.
  • It supports that multiple cores call CIDU_TriggerInterCoreInt simultaneously.
See also

Definition at line 271 of file core_feature_cidu.h.

272 {
273  uint32_t val = 0;
274  uint32_t* addr = (uint32_t*)CIDU_ICI_SHADOW_ADDR;
275 
276  val = (uint32_t)(send_core_id << CIDU_ICI_SEND_CORE_ID_POS) | (uint32_t)(recv_core_id);
277  __SW(addr, (uint32_t)val);
278 }
#define CIDU_ICI_SEND_CORE_ID_POS
#define CIDU_ICI_SHADOW_ADDR
ICI Interrupt source core ID and target core ID register address.

References __SW(), CIDU_ICI_SEND_CORE_ID_POS, and CIDU_ICI_SHADOW_ADDR.