NMSIS-Core  Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
External Interrupt Distribution Functions

Functions that distribute external interrupts to cores. More...

Functions

__STATIC_FORCEINLINE void CIDU_BroadcastExtInterrupt (uint32_t int_id, uint32_t to_cores)
 Broadcast external interrupt to cores. More...
 
__STATIC_FORCEINLINE uint32_t CIDU_GetBroadcastModeStatus (uint32_t int_id)
 get broadcast mode status More...
 
__STATIC_FORCEINLINE long CIDU_SetFirstClaimMode (uint32_t int_id, uint32_t core_id)
 Let the first coming core to first claim the interrupt. More...
 
__STATIC_FORCEINLINE void CIDU_ResetFirstClaimMode (uint32_t int_id)
 Reset the claim mode mask. More...
 
__STATIC_FORCEINLINE uint32_t CIDU_GetClaimStatus (uint32_t int_id)
 Get the claim mask status. More...
 

Detailed Description

Functions that distribute external interrupts to cores.

Function Documentation

◆ CIDU_BroadcastExtInterrupt()

__STATIC_FORCEINLINE void CIDU_BroadcastExtInterrupt ( uint32_t  int_id,
uint32_t  to_cores 
)

Broadcast external interrupt to cores.

This function broadcasts external interrupt which id is int_id to some/all target cores

Parameters
[in]int_idexternal interrupt id
[in]to_corestarget cores which can receive interrupt, use bitwise inclusive or of CIDU_RECEIVE_INTERRUPT_EN(core_id)
Remarks
  • External IRQn ID(int_id) is from the hard-wired persperctive, which has an offset mapped to the ECLIC IRQn, see Interrupt Number Definition in <Device.h>
  • By default on reset, only core 0 can receive interrupt which id is int_id

Definition at line 143 of file core_feature_cidu.h.

144 {
145  uint32_t* addr = (uint32_t*)CIDU_INT_INDICATOR_ADDR(int_id);
146 
147  __SW(addr, (uint32_t)to_cores);
148 }
#define CIDU_INT_INDICATOR_ADDR(n)
External interrupt n indicator register address.
__STATIC_FORCEINLINE void __SW(volatile void *addr, uint32_t val)
Write 32bit value to address (32 bit)

References __SW(), and CIDU_INT_INDICATOR_ADDR.

◆ CIDU_GetBroadcastModeStatus()

__STATIC_FORCEINLINE uint32_t CIDU_GetBroadcastModeStatus ( uint32_t  int_id)

get broadcast mode status

Just query the INTn_INDICATOR register value

Parameters
[in]int_idexternal interrupt id
Returns
INTn_INDICATOR register value
Remarks
  • External IRQn ID(int_id) is from the hard-wired persperctive, which has an offset mapped to the ECLIC IRQn, see Interrupt Number Definition in <Device.h>
  • By default on reset, only core 0 can receive interrupt which id is int_id

Definition at line 161 of file core_feature_cidu.h.

162 {
163  uint32_t val = 0;
164  uint32_t* addr = (uint32_t*)CIDU_INT_INDICATOR_ADDR(int_id);
165 
166  val = __LW(addr);
167  return val;
168 }
__STATIC_FORCEINLINE uint32_t __LW(volatile void *addr)
Load 32bit value from address (32 bit)

References __LW(), and CIDU_INT_INDICATOR_ADDR.

◆ CIDU_GetClaimStatus()

__STATIC_FORCEINLINE uint32_t CIDU_GetClaimStatus ( uint32_t  int_id)

Get the claim mask status.

Get the claim mode staus, each bit[n] indicates whether core n has claimed interrupt successfully, 1 means yes, 0 means no.

Parameters
[in]int_idexternal interrupt id
Returns
claim mode register INTn_MASK value
Remarks
  • External IRQn ID(int_id) is from the hard-wired persperctive, which has an offset mapped to the ECLIC IRQn, see Interrupt Number Definition in <Device.h>
See also

Definition at line 235 of file core_feature_cidu.h.

236 {
237  uint32_t val = 0;
238  uint32_t* addr = (uint32_t*)CIDU_INT_MASK_ADDR(int_id);
239 
240  val = __LW(addr);
241  return val;
242 }
#define CIDU_INT_MASK_ADDR(n)
External interrupt n mask (mask interrupt n to cores or not when interrupt n indicator on)register ad...

References __LW(), and CIDU_INT_MASK_ADDR.

◆ CIDU_ResetFirstClaimMode()

__STATIC_FORCEINLINE void CIDU_ResetFirstClaimMode ( uint32_t  int_id)

Reset the claim mode mask.

Reset the claim mode mask by Writing the reset value (all 1) to it

Parameters
[in]int_idexternal interrupt id
Remarks
  • External IRQn ID(int_id) is from the hard-wired persperctive, which has an offset mapped to the ECLIC IRQn, see Interrupt Number Definition in <Device.h>
  • When a core claims the interrupt successfully and handle it, it must call CIDU_ResetFirstClaimMode to reset the claim
See also

Definition at line 212 of file core_feature_cidu.h.

213 {
214  uint32_t val = 0;
215  uint32_t* addr = (uint32_t*)CIDU_INT_MASK_ADDR(int_id);
216 
217  /* clear by writing all 1 */
218  __SW(addr, 0xFFFFFFFF);
219 }

References __SW(), and CIDU_INT_MASK_ADDR.

◆ CIDU_SetFirstClaimMode()

__STATIC_FORCEINLINE long CIDU_SetFirstClaimMode ( uint32_t  int_id,
uint32_t  core_id 
)

Let the first coming core to first claim the interrupt.

In external interrupt broadcast mode, make the first coming core to claim this interrupt and then can handle it.

Parameters
[in]int_idexternal interrupt id
[in]core_idcore id that receive the interrupt
Returns
-1 if it fails to claim the interrupt, else it can continue to handle the interrupt
Remarks
  • External IRQn ID(int_id) is from the hard-wired persperctive, which has an offset mapped to the ECLIC IRQn, see Interrupt Number Definition in <Device.h>.
  • If it fails to claim the interrupt, it should quit the interrupt n's handler of all cores
  • When a core claims the interrupt successfully and has handled it, it must call CIDU_ResetFirstClaimMode to reset the claim.
See also

Definition at line 186 of file core_feature_cidu.h.

187 {
188  uint32_t val = 0;
189  uint32_t* addr = (uint32_t*)CIDU_INT_MASK_ADDR(int_id);
190  uint32_t mask = 1UL << core_id;
191 
192  __SW(addr, mask);
193  val = __LW(addr);
194  if (mask == val) {
195  return 0;
196  }
197  return -1;
198 }

References __LW(), __SW(), and CIDU_INT_MASK_ADDR.