NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
Functions
Signed MSW 32x16 Multiply and Add Instructions
Intrinsic Functions for SIMD Instructions » Partial-SIMD Data Processing Instructions

Signed MSW 32x16 Multiply and Add Instructions. More...

Functions

__STATIC_FORCEINLINE long __RV_KMMAWB (long t, unsigned long a, unsigned long b)
 KMMAWB (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWB_U (long t, unsigned long a, unsigned long b)
 KMMAWB.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWB2 (long t, unsigned long a, unsigned long b)
 KMMAWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWB2_U (long t, unsigned long a, unsigned long b)
 KMMAWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWT (long t, unsigned long a, unsigned long b)
 KMMAWT (SIMD Saturating MSW Signed Multiply Word and Top Half and Add) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWT_U (long t, unsigned long a, unsigned long b)
 KMMAWT.u (SIMD Saturating MSW Signed Multiply Word and Top Half and Add with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWT2 (long t, unsigned long a, unsigned long b)
 KMMAWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add) More...
 
__STATIC_FORCEINLINE long __RV_KMMAWT2_U (long t, unsigned long a, unsigned long b)
 KMMAWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_KMMWB2 (long a, unsigned long b)
 KMMWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2) More...
 
__STATIC_FORCEINLINE long __RV_KMMWB2_U (long a, unsigned long b)
 KMMWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_KMMWT2 (long a, unsigned long b)
 KMMWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2) More...
 
__STATIC_FORCEINLINE long __RV_KMMWT2_U (long a, unsigned long b)
 KMMWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_SMMWB (long a, unsigned long b)
 SMMWB (SIMD MSW Signed Multiply Word and Bottom Half) More...
 
__STATIC_FORCEINLINE long __RV_SMMWB_U (long a, unsigned long b)
 SMMWB.u (SIMD MSW Signed Multiply Word and Bottom Half with Rounding) More...
 
__STATIC_FORCEINLINE long __RV_SMMWT (long a, unsigned long b)
 SMMWT (SIMD MSW Signed Multiply Word and Top Half) More...
 
__STATIC_FORCEINLINE long __RV_SMMWT_U (long a, unsigned long b)
 SMMWT.u (SIMD MSW Signed Multiply Word and Top Half with Rounding) More...
 

Detailed Description

Signed MSW 32x16 Multiply and Add Instructions.

there are 15 Signed MSW 32x16 Multiply and Add Instructions

Function Documentation

◆ __RV_KMMAWB()

__STATIC_FORCEINLINE long __RV_KMMAWB ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWB (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add)

Type: SIMD

Syntax:

KMMAWB Rd, Rs1, Rs2
KMMAWB.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
res[x] = Rd.W[x] + Round[x][32:1];
} else {
res[x] = Rd.W[x] + Mres[x][47:16];
}
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3529 of file core_feature_dsp.h.

3530 {
3531  __ASM volatile("kmmawb %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3532  return t;
3533 }

References __ASM.

◆ __RV_KMMAWB2()

__STATIC_FORCEINLINE long __RV_KMMAWB2 ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add)

Type: SIMD

Syntax:

KMMAWB2 Rd, Rs1, Rs2
KMMAWB2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) {
addop.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0];
if (`.u` form) {
Mres[x][47:14] = Mres[x][47:14] + 1;
}
addop.W[x] = Mres[x][46:15]; // doubling
}
res[x] = Rd.W[x] + addop.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3659 of file core_feature_dsp.h.

3660 {
3661  __ASM volatile("kmmawb2 %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3662  return t;
3663 }

References __ASM.

◆ __RV_KMMAWB2_U()

__STATIC_FORCEINLINE long __RV_KMMAWB2_U ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add with Rounding)

Type: SIMD

Syntax:

KMMAWB2 Rd, Rs1, Rs2
KMMAWB2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) {
addop.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0];
if (`.u` form) {
Mres[x][47:14] = Mres[x][47:14] + 1;
}
addop.W[x] = Mres[x][46:15]; // doubling
}
res[x] = Rd.W[x] + addop.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3727 of file core_feature_dsp.h.

3728 {
3729  __ASM volatile("kmmawb2.u %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3730  return t;
3731 }

References __ASM.

◆ __RV_KMMAWB_U()

__STATIC_FORCEINLINE long __RV_KMMAWB_U ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWB.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add with Rounding)

Type: SIMD

Syntax:

KMMAWB Rd, Rs1, Rs2
KMMAWB.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
res[x] = Rd.W[x] + Round[x][32:1];
} else {
res[x] = Rd.W[x] + Mres[x][47:16];
}
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3591 of file core_feature_dsp.h.

3592 {
3593  __ASM volatile("kmmawb.u %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3594  return t;
3595 }

References __ASM.

◆ __RV_KMMAWT()

__STATIC_FORCEINLINE long __RV_KMMAWT ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWT (SIMD Saturating MSW Signed Multiply Word and Top Half and Add)

Type: SIMD

Syntax:

KMMAWT Rd, Rs1, Rs2
KMMAWT.u Rd Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the signed top 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition results are written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed top 16-bit of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
res[x] = Rd.W[x] + Round[x][32:1];
} else {
res[x] = Rd.W[x] + Mres[x][47:16];
}
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3789 of file core_feature_dsp.h.

3790 {
3791  __ASM volatile("kmmawt %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3792  return t;
3793 }

References __ASM.

◆ __RV_KMMAWT2()

__STATIC_FORCEINLINE long __RV_KMMAWT2 ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add)

Type: SIMD

Syntax:

KMMAWT2 Rd, Rs1, Rs2
KMMAWT2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) {
addop.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1];
if (`.u` form) {
Mres[x][47:14] = Mres[x][47:14] + 1;
}
addop.W[x] = Mres[x][46:15]; // doubling
}
res[x] = Rd.W[x] + addop.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3919 of file core_feature_dsp.h.

3920 {
3921  __ASM volatile("kmmawt2 %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3922  return t;
3923 }

References __ASM.

◆ __RV_KMMAWT2_U()

__STATIC_FORCEINLINE long __RV_KMMAWT2_U ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add with Rounding)

Type: SIMD

Syntax:

KMMAWT2 Rd, Rs1, Rs2
KMMAWT2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) {
addop.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1];
if (`.u` form) {
Mres[x][47:14] = Mres[x][47:14] + 1;
}
addop.W[x] = Mres[x][46:15]; // doubling
}
res[x] = Rd.W[x] + addop.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3987 of file core_feature_dsp.h.

3988 {
3989  __ASM volatile("kmmawt2.u %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3990  return t;
3991 }

References __ASM.

◆ __RV_KMMAWT_U()

__STATIC_FORCEINLINE long __RV_KMMAWT_U ( long  t,
unsigned long  a,
unsigned long  b 
)

KMMAWT.u (SIMD Saturating MSW Signed Multiply Word and Top Half and Add with Rounding)

Type: SIMD

Syntax:

KMMAWT Rd, Rs1, Rs2
KMMAWT.u Rd Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the signed top 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition results are written to the corresponding 32-bit elements of the third register. The .u form rounds up the multiplication results from the most significant discarded bit before the addition operations.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed top 16-bit of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
res[x] = Rd.W[x] + Round[x][32:1];
} else {
res[x] = Rd.W[x] + Mres[x][47:16];
}
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV32: x=0
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 3851 of file core_feature_dsp.h.

3852 {
3853  __ASM volatile("kmmawt.u %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
3854  return t;
3855 }

References __ASM.

◆ __RV_KMMWB2()

__STATIC_FORCEINLINE long __RV_KMMWB2 ( long  a,
unsigned long  b 
)

KMMWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2)

Type: SIMD

Syntax:

KMMWB2 Rd, Rs1, Rs2
KMMWB2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) {
Rd.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][46:14] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][46:15];
}
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 4162 of file core_feature_dsp.h.

4163 {
4164  long result;
4165  __ASM volatile("kmmwb2 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
4166  return result;
4167 }

References __ASM.

◆ __RV_KMMWB2_U()

__STATIC_FORCEINLINE long __RV_KMMWB2_U ( long  a,
unsigned long  b 
)

KMMWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 with Rounding)

Type: SIMD

Syntax:

KMMWB2 Rd, Rs1, Rs2
KMMWB2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) {
Rd.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][46:14] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][46:15];
}
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 4218 of file core_feature_dsp.h.

4219 {
4220  long result;
4221  __ASM volatile("kmmwb2.u %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
4222  return result;
4223 }

References __ASM.

◆ __RV_KMMWT2()

__STATIC_FORCEINLINE long __RV_KMMWT2 ( long  a,
unsigned long  b 
)

KMMWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2)

Type: SIMD

Syntax:

KMMWT2 Rd, Rs1, Rs2
KMMWT2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) {
Rd.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][46:14] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][46:15];
}
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 4274 of file core_feature_dsp.h.

4275 {
4276  long result;
4277  __ASM volatile("kmmwt2 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
4278  return result;
4279 }

References __ASM.

◆ __RV_KMMWT2_U()

__STATIC_FORCEINLINE long __RV_KMMWT2_U ( long  a,
unsigned long  b 
)

KMMWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 with Rounding)

Type: SIMD

Syntax:

KMMWT2 Rd, Rs1, Rs2
KMMWT2.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.

Operations:

if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) {
Rd.W[x] = 0x7fffffff;
OV = 1;
} else {
Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][46:14] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][46:15];
}
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 4330 of file core_feature_dsp.h.

4331 {
4332  long result;
4333  __ASM volatile("kmmwt2.u %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
4334  return result;
4335 }

References __ASM.

◆ __RV_SMMWB()

__STATIC_FORCEINLINE long __RV_SMMWB ( long  a,
unsigned long  b 
)

SMMWB (SIMD MSW Signed Multiply Word and Bottom Half)

Type: SIMD

Syntax:

SMMWB Rd, Rs1, Rs2
SMMWB.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][47:16];
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 8866 of file core_feature_dsp.h.

8867 {
8868  long result;
8869  __ASM volatile("smmwb %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
8870  return result;
8871 }

References __ASM.

◆ __RV_SMMWB_U()

__STATIC_FORCEINLINE long __RV_SMMWB_U ( long  a,
unsigned long  b 
)

SMMWB.u (SIMD MSW Signed Multiply Word and Bottom Half with Rounding)

Type: SIMD

Syntax:

SMMWB Rd, Rs1, Rs2
SMMWB.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][47:16];
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 8916 of file core_feature_dsp.h.

8917 {
8918  long result;
8919  __ASM volatile("smmwb.u %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
8920  return result;
8921 }

References __ASM.

◆ __RV_SMMWT()

__STATIC_FORCEINLINE long __RV_SMMWT ( long  a,
unsigned long  b 
)

SMMWT (SIMD MSW Signed Multiply Word and Top Half)

Type: SIMD

Syntax:

SMMWT Rd, Rs1, Rs2
SMMWT.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the top signed 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][47:16];
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 8966 of file core_feature_dsp.h.

8967 {
8968  long result;
8969  __ASM volatile("smmwt %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
8970  return result;
8971 }

References __ASM.

◆ __RV_SMMWT_U()

__STATIC_FORCEINLINE long __RV_SMMWT_U ( long  a,
unsigned long  b 
)

SMMWT.u (SIMD MSW Signed Multiply Word and Top Half with Rounding)

Type: SIMD

Syntax:

SMMWT Rd, Rs1, Rs2
SMMWT.u Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The .u form rounds up the results from the most significant discarded bit.

Description:
This instruction multiplies the signed 32-bit elements of Rs1 with the top signed 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The .u form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.

Operations:

Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1];
if (`.u` form) {
Round[x][32:0] = Mres[x][47:15] + 1;
Rd.W[x] = Round[x][32:1];
} else {
Rd.W[x] = Mres[x][47:16];
}
for RV32: x=0
for RV64: x=1...0
Parameters
[in]along type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 9016 of file core_feature_dsp.h.

9017 {
9018  long result;
9019  __ASM volatile("smmwt.u %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
9020  return result;
9021 }

References __ASM.

__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55