NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
Core CSR Register Access

Functions to access the Core CSR Registers. More...

Macros

#define __RV_CSR_SWAP(csr, val)
 CSR operation Macro for csrrw instruction. More...
 
#define __RV_CSR_READ(csr)
 CSR operation Macro for csrr instruction. More...
 
#define __RV_CSR_WRITE(csr, val)
 CSR operation Macro for csrw instruction. More...
 
#define __RV_CSR_READ_SET(csr, val)
 CSR operation Macro for csrrs instruction. More...
 
#define __RV_CSR_SET(csr, val)
 CSR operation Macro for csrs instruction. More...
 
#define __RV_CSR_READ_CLEAR(csr, val)
 CSR operation Macro for csrrc instruction. More...
 
#define __RV_CSR_CLEAR(csr, val)
 CSR operation Macro for csrc instruction. More...
 

Functions

__STATIC_FORCEINLINE void __switch_mode (uint8_t mode, uintptr_t stack, void(*entry_point)(void))
 switch privilege from machine mode to others. More...
 
__STATIC_FORCEINLINE void __enable_irq (void)
 Enable IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_irq (void)
 Disable IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __enable_irq_s (void)
 Enable IRQ Interrupts in supervisor mode. More...
 
__STATIC_FORCEINLINE void __disable_irq_s (void)
 Disable IRQ Interrupts in supervisor mode. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_cycle (void)
 Read whole 64 bits value of mcycle counter. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_instret (void)
 Read whole 64 bits value of machine instruction-retired counter. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_time (void)
 Read whole 64 bits value of real-time clock. More...
 
__STATIC_FORCEINLINE unsigned long __get_cluster_id (void)
 Get cluster id of current cluster. More...
 
__STATIC_FORCEINLINE unsigned long __get_hart_index (void)
 Get hart index of current cluster. More...
 
__STATIC_FORCEINLINE unsigned long __get_hart_id (void)
 Get hart id of current cluster. More...
 

Detailed Description

Functions to access the Core CSR Registers.

The following functions or macros provide access to Core CSR registers.

Macro Definition Documentation

◆ __RV_CSR_CLEAR

#define __RV_CSR_CLEAR (   csr,
  val 
)

CSR operation Macro for csrc instruction.

Set csr register to be csr_content & ~val

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrc instruction

Definition at line 573 of file core_feature_base.h.

◆ __RV_CSR_READ

#define __RV_CSR_READ (   csr)

CSR operation Macro for csrr instruction.

Read the content of csr register to __v and return it

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
Returns
the CSR register value

Definition at line 481 of file core_feature_base.h.

◆ __RV_CSR_READ_CLEAR

#define __RV_CSR_READ_CLEAR (   csr,
  val 
)

CSR operation Macro for csrrc instruction.

Read the content of csr register to __v, then set csr register to be __v & ~val, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrrc instruction
Returns
the CSR register value before written

Definition at line 555 of file core_feature_base.h.

◆ __RV_CSR_READ_SET

#define __RV_CSR_READ_SET (   csr,
  val 
)

CSR operation Macro for csrrs instruction.

Read the content of csr register to __v, then set csr register to be __v | val, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrrs instruction
Returns
the CSR register value before written

Definition at line 518 of file core_feature_base.h.

◆ __RV_CSR_SET

#define __RV_CSR_SET (   csr,
  val 
)

CSR operation Macro for csrs instruction.

Set csr register to be csr_content | val

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrs instruction

Definition at line 536 of file core_feature_base.h.

◆ __RV_CSR_SWAP

#define __RV_CSR_SWAP (   csr,
  val 
)

CSR operation Macro for csrrw instruction.

Read the content of csr register to __v, then write content of val into csr register, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valvalue to store into the CSR register
Returns
the CSR register value before written

Definition at line 463 of file core_feature_base.h.

◆ __RV_CSR_WRITE

#define __RV_CSR_WRITE (   csr,
  val 
)

CSR operation Macro for csrw instruction.

Write the content of val to csr register

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valvalue to store into the CSR register

Definition at line 499 of file core_feature_base.h.

Function Documentation

◆ __disable_irq()

__STATIC_FORCEINLINE void __disable_irq ( void  )

Disable IRQ Interrupts.

Disables IRQ interrupts by clearing the MIE-bit in the MSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 644 of file core_feature_base.h.

645 {
647 }

References __RV_CSR_CLEAR, CSR_MSTATUS, and MSTATUS_MIE.

◆ __disable_irq_s()

__STATIC_FORCEINLINE void __disable_irq_s ( void  )

Disable IRQ Interrupts in supervisor mode.

Disables IRQ interrupts by clearing the SIE-bit in the SSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 666 of file core_feature_base.h.

667 {
669 }

References __RV_CSR_CLEAR, CSR_SSTATUS, and SSTATUS_SIE.

◆ __enable_irq()

__STATIC_FORCEINLINE void __enable_irq ( void  )

Enable IRQ Interrupts.

Enables IRQ interrupts by setting the MIE-bit in the MSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 633 of file core_feature_base.h.

634 {
636 }

References __RV_CSR_SET, CSR_MSTATUS, and MSTATUS_MIE.

◆ __enable_irq_s()

__STATIC_FORCEINLINE void __enable_irq_s ( void  )

Enable IRQ Interrupts in supervisor mode.

Enables IRQ interrupts by setting the SIE-bit in the SSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 655 of file core_feature_base.h.

656 {
658 }

References __RV_CSR_SET, CSR_SSTATUS, and SSTATUS_SIE.

◆ __get_cluster_id()

__STATIC_FORCEINLINE unsigned long __get_cluster_id ( void  )

Get cluster id of current cluster.

This function will get cluster id of current cluster in a multiple cluster system

Returns
The cluster id of current cluster
Remarks
mhartid bit 15-8 is designed for cluster id in nuclei subsystem reference design
Attention
function is allowed in machine mode only

Definition at line 760 of file core_feature_base.h.

761 {
762  unsigned long id;
763 
764  id = (__RV_CSR_READ(CSR_MHARTID) >> 8) & 0xFF;
765  return id;
766 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_hart_id()

__STATIC_FORCEINLINE unsigned long __get_hart_id ( void  )

Get hart id of current cluster.

This function will get hart id of current cluster in a multiple cluster system

Returns
The hart id of current cluster
Remarks
it will return full hartid not part of it for reference subsystem design, if your reference subsystem design has hartid offset, please define __HARTID_OFFSET in <Device>.h
Attention
function is allowed in machine mode only

Definition at line 796 of file core_feature_base.h.

797 {
798  unsigned long id;
800  return id;
801 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_hart_index()

__STATIC_FORCEINLINE unsigned long __get_hart_index ( void  )

Get hart index of current cluster.

This function will get hart index of current cluster in a multiple cluster system, hart index is hartid - hartid offset, for example if your hartid is 1, and offset is 1, then hart index is 0

Returns
The hart index of current cluster
Attention
function is allowed in machine mode only

Definition at line 776 of file core_feature_base.h.

777 {
778  unsigned long id;
779 #ifdef __HARTID_OFFSET
780  id = __RV_CSR_READ(CSR_MHARTID) - __HARTID_OFFSET;
781 #else
783 #endif
784  return id;
785 }

References __RV_CSR_READ, and CSR_MHARTID.

◆ __get_rv_cycle()

__STATIC_FORCEINLINE uint64_t __get_rv_cycle ( void  )

Read whole 64 bits value of mcycle counter.

This function will read the whole 64 bits of MCYCLE register

Returns
The whole 64 bits value of MCYCLE
Remarks
It will work for both RV32 and RV64 to get full 64bits value of MCYCLE

Definition at line 677 of file core_feature_base.h.

678 {
679 #if __RISCV_XLEN == 32
680  volatile uint32_t high0, low, high;
681  uint64_t full;
682 
683  high0 = __RV_CSR_READ(CSR_MCYCLEH);
684  low = __RV_CSR_READ(CSR_MCYCLE);
685  high = __RV_CSR_READ(CSR_MCYCLEH);
686  if (high0 != high) {
687  low = __RV_CSR_READ(CSR_MCYCLE);
688  }
689  full = (((uint64_t)high) << 32) | low;
690  return full;
691 #elif __RISCV_XLEN == 64
692  return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
693 #else // TODO Need cover for XLEN=128 case in future
694  return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
695 #endif
696 }

References __RV_CSR_READ, CSR_MCYCLE, and CSR_MCYCLEH.

Referenced by __get_hpm_counter().

◆ __get_rv_instret()

__STATIC_FORCEINLINE uint64_t __get_rv_instret ( void  )

Read whole 64 bits value of machine instruction-retired counter.

This function will read the whole 64 bits of MINSTRET register

Returns
The whole 64 bits value of MINSTRET
Remarks
It will work for both RV32 and RV64 to get full 64bits value of MINSTRET

Definition at line 704 of file core_feature_base.h.

705 {
706 #if __RISCV_XLEN == 32
707  volatile uint32_t high0, low, high;
708  uint64_t full;
709 
710  high0 = __RV_CSR_READ(CSR_MINSTRETH);
713  if (high0 != high) {
715  }
716  full = (((uint64_t)high) << 32) | low;
717  return full;
718 #elif __RISCV_XLEN == 64
719  return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
720 #else // TODO Need cover for XLEN=128 case in future
721  return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
722 #endif
723 }

References __RV_CSR_READ, CSR_MINSTRET, and CSR_MINSTRETH.

Referenced by __get_hpm_counter().

◆ __get_rv_time()

__STATIC_FORCEINLINE uint64_t __get_rv_time ( void  )

Read whole 64 bits value of real-time clock.

This function will read the whole 64 bits of TIME register

Returns
The whole 64 bits value of TIME CSR
Remarks
It will work for both RV32 and RV64 to get full 64bits value of TIME
Attention
only available when user mode available

Definition at line 732 of file core_feature_base.h.

733 {
734 #if __RISCV_XLEN == 32
735  volatile uint32_t high0, low, high;
736  uint64_t full;
737 
738  high0 = __RV_CSR_READ(CSR_TIMEH);
739  low = __RV_CSR_READ(CSR_TIME);
740  high = __RV_CSR_READ(CSR_TIMEH);
741  if (high0 != high) {
742  low = __RV_CSR_READ(CSR_TIME);
743  }
744  full = (((uint64_t)high) << 32) | low;
745  return full;
746 #elif __RISCV_XLEN == 64
747  return (uint64_t)__RV_CSR_READ(CSR_TIME);
748 #else // TODO Need cover for XLEN=128 case in future
749  return (uint64_t)__RV_CSR_READ(CSR_TIME);
750 #endif
751 }

References __RV_CSR_READ, CSR_TIME, and CSR_TIMEH.

◆ __switch_mode()

__STATIC_FORCEINLINE void __switch_mode ( uint8_t  mode,
uintptr_t  stack,
void(*)(void)  entry_point 
)

switch privilege from machine mode to others.

Execute into entry_point in mode(supervisor or user) with given stack

Parameters
modeprivilege mode
stackpredefined stack, size should set enough
entry_pointa function pointer to execute

Definition at line 605 of file core_feature_base.h.

606 {
607  unsigned long val = 0;
608 
609  /* Set MPP to the requested privilege mode */
610  val = __RV_CSR_READ(CSR_MSTATUS);
611  val = __RV_INSERT_FIELD(val, MSTATUS_MPP, mode);
612 
613  /* Set previous MIE disabled */
614  val = __RV_INSERT_FIELD(val, MSTATUS_MPIE, 0);
615 
617 
618  /* Set the entry point in MEPC */
619  __RV_CSR_WRITE(CSR_MEPC, (unsigned long)entry_point);
620 
621  /* Set the register file */
622  __ASM volatile("mv sp, %0" ::"r"(stack));
623 
624  __ASM volatile("mret");
625 }

References __ASM, __RV_CSR_READ, __RV_CSR_WRITE, CSR_MEPC, CSR_MSTATUS, MSTATUS_MPIE, and MSTATUS_MPP.

CSR_SSTATUS
#define CSR_SSTATUS
Definition: riscv_encoding.h:501
SSTATUS_SIE
#define SSTATUS_SIE
Definition: riscv_encoding.h:79
CSR_MHARTID
#define CSR_MHARTID
Definition: riscv_encoding.h:743
__RV_CSR_CLEAR
#define __RV_CSR_CLEAR(csr, val)
CSR operation Macro for csrc instruction.
Definition: core_feature_base.h:573
CSR_MCYCLEH
#define CSR_MCYCLEH
Definition: riscv_encoding.h:821
__RV_CSR_WRITE
#define __RV_CSR_WRITE(csr, val)
CSR operation Macro for csrw instruction.
Definition: core_feature_base.h:499
CSR_TIME
#define CSR_TIME
Definition: riscv_encoding.h:467
CSR_MINSTRET
#define CSR_MINSTRET
Definition: riscv_encoding.h:681
MSTATUS_MPIE
#define MSTATUS_MPIE
Definition: riscv_encoding.h:44
MSTATUS_MPP
#define MSTATUS_MPP
Definition: riscv_encoding.h:47
CSR_TIMEH
#define CSR_TIMEH
Definition: riscv_encoding.h:754
MSTATUS_MIE
#define MSTATUS_MIE
Definition: riscv_encoding.h:40
CSR_MINSTRETH
#define CSR_MINSTRETH
Definition: riscv_encoding.h:822
CSR_MCYCLE
#define CSR_MCYCLE
Definition: riscv_encoding.h:680
__RV_CSR_READ
#define __RV_CSR_READ(csr)
CSR operation Macro for csrr instruction.
Definition: core_feature_base.h:481
__RV_CSR_SET
#define __RV_CSR_SET(csr, val)
CSR operation Macro for csrs instruction.
Definition: core_feature_base.h:536
CSR_MSTATUS
#define CSR_MSTATUS
Definition: riscv_encoding.h:566
__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55
CSR_MEPC
#define CSR_MEPC
Definition: riscv_encoding.h:580