NMSIS-Core  Version 1.4.1
NMSIS-Core support for Nuclei processor-based devices
Modules | Macros
Core CSR Encodings

NMSIS Core CSR Encodings. More...

Modules

 Core CSR Registers
 NMSIS Core CSR Register Definitions.
 

Macros

#define MSTATUS_UIE   0x00000001
 
#define MSTATUS_SIE   0x00000002
 
#define MSTATUS_HIE   0x00000004
 
#define MSTATUS_MIE   0x00000008
 
#define MSTATUS_UPIE   0x00000010
 
#define MSTATUS_SPIE   0x00000020
 
#define MSTATUS_UBE   0x00000040
 
#define MSTATUS_MPIE   0x00000080
 
#define MSTATUS_SPP   0x00000100
 
#define MSTATUS_VS   0x00000600
 
#define MSTATUS_MPP   0x00001800
 
#define MSTATUS_FS   0x00006000
 
#define MSTATUS_XS   0x00018000
 
#define MSTATUS_MPRV   0x00020000
 
#define MSTATUS_SUM   0x00040000
 
#define MSTATUS_MXR   0x00080000
 
#define MSTATUS_TVM   0x00100000
 
#define MSTATUS_TW   0x00200000
 
#define MSTATUS_TSR   0x00400000
 
#define MSTATUS32_SD   0x80000000
 
#define MSTATUS_UXL   0x0000000300000000
 
#define MSTATUS_SXL   0x0000000C00000000
 
#define MSTATUS_SBE   0x0000001000000000
 
#define MSTATUS_MBE   0x0000002000000000
 
#define MSTATUS_GVA   0x0000004000000000
 
#define MSTATUS_MPV   0x0000008000000000
 
#define MSTATUS64_SD   0x8000000000000000
 
#define MSTATUS_FS_INITIAL   0x00002000
 
#define MSTATUS_FS_CLEAN   0x00004000
 
#define MSTATUS_FS_DIRTY   0x00006000
 
#define MSTATUS_VS_INITIAL   0x00000200
 
#define MSTATUS_VS_CLEAN   0x00000400
 
#define MSTATUS_VS_DIRTY   0x00000600
 
#define MSTATUSH_SBE   0x00000010
 
#define MSTATUSH_MBE   0x00000020
 
#define MSTATUSH_GVA   0x00000040
 
#define MSTATUSH_MPV   0x00000080
 
#define SSTATUS_UIE   0x00000001
 
#define SSTATUS_SIE   0x00000002
 
#define SSTATUS_UPIE   0x00000010
 
#define SSTATUS_SPIE   0x00000020
 
#define SSTATUS_UBE   0x00000040
 
#define SSTATUS_SPP   0x00000100
 
#define SSTATUS_VS   0x00000600
 
#define SSTATUS_FS   0x00006000
 
#define SSTATUS_XS   0x00018000
 
#define SSTATUS_SUM   0x00040000
 
#define SSTATUS_MXR   0x00080000
 
#define SSTATUS32_SD   0x80000000
 
#define SSTATUS_UXL   0x0000000300000000
 
#define SSTATUS64_SD   0x8000000000000000
 
#define USTATUS_UIE   0x00000001
 
#define USTATUS_UPIE   0x00000010
 
#define DCSR_XDEBUGVER   (3U<<30)
 
#define DCSR_NDRESET   (1<<29)
 
#define DCSR_FULLRESET   (1<<28)
 
#define DCSR_EBREAKM   (1<<15)
 
#define DCSR_EBREAKH   (1<<14)
 
#define DCSR_EBREAKS   (1<<13)
 
#define DCSR_EBREAKU   (1<<12)
 
#define DCSR_STOPCYCLE   (1<<10)
 
#define DCSR_STOPTIME   (1<<9)
 
#define DCSR_CAUSE   (7<<6)
 
#define DCSR_DEBUGINT   (1<<5)
 
#define DCSR_HALT   (1<<3)
 
#define DCSR_STEP   (1<<2)
 
#define DCSR_PRV   (3<<0)
 
#define DCSR_CAUSE_NONE   0
 
#define DCSR_CAUSE_SWBP   1
 
#define DCSR_CAUSE_HWBP   2
 
#define DCSR_CAUSE_DEBUGINT   3
 
#define DCSR_CAUSE_STEP   4
 
#define DCSR_CAUSE_HALT   5
 
#define MCONTROL_TYPE(xlen)   (0xfULL<<((xlen)-4))
 
#define MCONTROL_DMODE(xlen)   (1ULL<<((xlen)-5))
 
#define MCONTROL_MASKMAX(xlen)   (0x3fULL<<((xlen)-11))
 
#define MCONTROL_SELECT   (1<<19)
 
#define MCONTROL_TIMING   (1<<18)
 
#define MCONTROL_ACTION   (0x3f<<12)
 
#define MCONTROL_CHAIN   (1<<11)
 
#define MCONTROL_MATCH   (0xf<<7)
 
#define MCONTROL_M   (1<<6)
 
#define MCONTROL_H   (1<<5)
 
#define MCONTROL_S   (1<<4)
 
#define MCONTROL_U   (1<<3)
 
#define MCONTROL_EXECUTE   (1<<2)
 
#define MCONTROL_STORE   (1<<1)
 
#define MCONTROL_LOAD   (1<<0)
 
#define MCONTROL_TYPE_NONE   0
 
#define MCONTROL_TYPE_MATCH   2
 
#define MCONTROL_ACTION_DEBUG_EXCEPTION   0
 
#define MCONTROL_ACTION_DEBUG_MODE   1
 
#define MCONTROL_ACTION_TRACE_START   2
 
#define MCONTROL_ACTION_TRACE_STOP   3
 
#define MCONTROL_ACTION_TRACE_EMIT   4
 
#define MCONTROL_MATCH_EQUAL   0
 
#define MCONTROL_MATCH_NAPOT   1
 
#define MCONTROL_MATCH_GE   2
 
#define MCONTROL_MATCH_LT   3
 
#define MCONTROL_MATCH_MASK_LOW   4
 
#define MCONTROL_MATCH_MASK_HIGH   5
 
#define MIP_SSIP   (1 << IRQ_S_SOFT)
 
#define MIP_HSIP   (1 << IRQ_H_SOFT)
 
#define MIP_MSIP   (1 << IRQ_M_SOFT)
 
#define MIP_STIP   (1 << IRQ_S_TIMER)
 
#define MIP_HTIP   (1 << IRQ_H_TIMER)
 
#define MIP_MTIP   (1 << IRQ_M_TIMER)
 
#define MIP_SEIP   (1 << IRQ_S_EXT)
 
#define MIP_HEIP   (1 << IRQ_H_EXT)
 
#define MIP_MEIP   (1 << IRQ_M_EXT)
 
#define MIE_SSIE   MIP_SSIP
 
#define MIE_HSIE   MIP_HSIP
 
#define MIE_MSIE   MIP_MSIP
 
#define MIE_STIE   MIP_STIP
 
#define MIE_HTIE   MIP_HTIP
 
#define MIE_MTIE   MIP_MTIP
 
#define MIE_SEIE   MIP_SEIP
 
#define MIE_HEIE   MIP_HEIP
 
#define MIE_MEIE   MIP_MEIP
 
#define SIP_SSIP   MIP_SSIP
 
#define SIP_SSIP   MIP_SSIP
 
#define SIP_STIP   MIP_STIP
 
#define SIP_STIP   MIP_STIP
 
#define SIP_SEIP   MIP_SEIP
 
#define SIE_SSIE   MIP_SSIP
 
#define SIE_STIE   MIP_STIP
 
#define SIE_SEIE   MIP_SEIP
 
#define MCAUSE_INTR   (1ULL << (__riscv_xlen - 1))
 
#define MCAUSE_CAUSE   0x00000FFFUL
 
#define SCAUSE_INTR   MCAUSE_INTR
 
#define SCAUSE_CAUSE   0x000003FFUL
 
#define MENVCFG_CBIE_EN   (0x11 << 4)
 
#define MENVCFG_CBIE_FLUSH   (0x01 << 4)
 
#define MENVCFG_CBIE_INVAL   (0x11 << 4)
 
#define SENVCFG_CBIE_EN   (0x11 << 4)
 
#define SENVCFG_CBIE_FLUSH   (0x01 << 4)
 
#define SENVCFG_CBIE_INVAL   (0x11 << 4)
 
#define MENVCFG_FIOM   0x00000001
 
#define MENVCFG_LPE   0x00000004
 
#define MENVCFG_SSE   0x00000008
 
#define MENVCFG_CBIE   0x00000030
 
#define MENVCFG_CBCFE   0x00000040
 
#define MENVCFG_CBZE   0x00000080
 
#define MENVCFG_PMM   0x0000000300000000
 
#define MENVCFG_DTE   0x0800000000000000
 
#define MENVCFG_ADUE   0x2000000000000000
 
#define MENVCFG_PBMTE   0x4000000000000000
 
#define MENVCFG_STCE   0x8000000000000000
 
#define MENVCFGH_DTE   0x08000000
 
#define MENVCFGH_ADUE   0x20000000
 
#define MENVCFGH_PBMTE   0x40000000
 
#define MENVCFGH_STCE   0x80000000
 
#define SENVCFG_FIOM   0x00000001
 
#define SENVCFG_LPE   0x00000004
 
#define SENVCFG_SSE   0x00000008
 
#define SENVCFG_CBIE   0x00000030
 
#define SENVCFG_CBCFE   0x00000040
 
#define SENVCFG_CBZE   0x00000080
 
#define SENVCFG_PMM   0x0000000300000000
 
#define UCODE_OV   (0x1)
 
#define CSR_MCACHE_CTL_IE   0x00000001
 
#define CSR_MCACHE_CTL_DE   0x00010000
 
#define WFE_WFE   (0x1)
 
#define TXEVT_TXEVT   (0x1)
 
#define SLEEPVALUE_SLEEPVALUE   (0x1)
 
#define MCOUNTEREN_CY_SHIFT   0
 
#define MCOUNTEREN_TIME_SHIFT   1
 
#define MCOUNTEREN_IR_SHIFT   2
 
#define MCOUNTEREN_CY   (1U << MCOUNTEREN_CY_SHIFT)
 
#define MCOUNTEREN_TIME   (1U << MCOUNTEREN_TIME_SHIFT)
 
#define MCOUNTEREN_IR   (1U << MCOUNTEREN_IR_SHIFT)
 
#define MCOUNTINHIBIT_CY   MCOUNTEREN_CY
 
#define MCOUNTINHIBIT_IR   MCOUNTEREN_IR
 
#define MILM_CTL_ILM_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)
 
#define MILM_CTL_ILM_ECC_CHK_EN   (1<<4)
 
#define MILM_CTL_ILM_RWECC   (1<<3)
 
#define MILM_CTL_ILM_ECC_INJ_EN   (1<<3)
 
#define MILM_CTL_ILM_ECC_EXCP_EN   (1<<2)
 
#define MILM_CTL_ILM_ECC_EN   (1<<1)
 
#define MILM_CTL_ILM_EN   (1<<0)
 
#define MDLM_CTL_DLM_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)
 
#define MDLM_CTL_DLM_ECC_CHK_EN   (1<<4)
 
#define MDLM_CTL_DLM_RWECC   (1<<3)
 
#define MDLM_CTL_DLM_ECC_INJ_EN   (1<<3)
 
#define MDLM_CTL_DLM_ECC_EXCP_EN   (1<<2)
 
#define MDLM_CTL_DLM_ECC_EN   (1<<1)
 
#define MDLM_CTL_DLM_EN   (1<<0)
 
#define MSUBM_PTYP   (0x3<<8)
 
#define MSUBM_TYP   (0x3<<6)
 
#define MDCAUSE_MDCAUSE   (0x7)
 
#define MMISC_CTL_LDSPEC_ENABLE   (1<<12)
 
#define MMISC_CTL_SIJUMP_ENABLE   (1<<11)
 
#define MMISC_CTL_IMRETURN_ENABLE   (1<<10)
 
#define MMISC_CTL_NMI_CAUSE_FFF   (1<<9)
 
#define MMISC_CTL_CODE_BUS_ERR   (1<<8)
 
#define MMISC_CTL_MISALIGN   (1<<6)
 
#define MMISC_CTL_ZC   (1<<7)
 
#define MMISC_CTL_BPU   (1<<3)
 
#define MCACHE_CTL_IC_EN   (1<<0)
 
#define MCACHE_CTL_IC_SCPD_MOD   (1<<1)
 
#define MCACHE_CTL_IC_ECC_EN   (1<<2)
 
#define MCACHE_CTL_IC_ECC_EXCP_EN   (1<<3)
 
#define MCACHE_CTL_IC_TRAM_ECC_INJ_EN   (1<<4)
 
#define MCACHE_CTL_IC_RWTECC   (1<<4)
 
#define MCACHE_CTL_IC_RWDECC   (1<<5)
 
#define MCACHE_CTL_IC_DRAM_ECC_INJ_EN   (1<<5)
 
#define MCACHE_CTL_IC_PF_EN   (1<<6)
 
#define MCACHE_CTL_IC_CANCEL_EN   (1<<7)
 
#define MCACHE_CTL_IC_ECC_CHK_EN   (1<<8)
 
#define MCACHE_CTL_DC_EN   (1<<16)
 
#define MCACHE_CTL_DC_ECC_EN   (1<<17)
 
#define MCACHE_CTL_DC_ECC_EXCP_EN   (1<<18)
 
#define MCACHE_CTL_DC_TRAM_ECC_INJ_EN   (1<<19)
 
#define MCACHE_CTL_DC_RWTECC   (1<<19)
 
#define MCACHE_CTL_DC_RWDECC   (1<<20)
 
#define MCACHE_CTL_DC_DRAM_ECC_INJ_EN   (1<<20)
 
#define MCACHE_CTL_DC_ECC_CHK_EN   (1<<21)
 
#define MTVT2_MTVT2EN   (1<<0)
 
#define MTVT2_COMMON_CODE_ENTRY   (((1ULL<<((__riscv_xlen)-2))-1)<<2)
 
#define MCFG_INFO_TEE   (1<<0)
 
#define MCFG_INFO_ECC   (1<<1)
 
#define MCFG_INFO_CLIC   (1<<2)
 
#define MCFG_INFO_PLIC   (1<<3)
 
#define MCFG_INFO_FIO   (1<<4)
 
#define MCFG_INFO_PPI   (1<<5)
 
#define MCFG_INFO_NICE   (1<<6)
 
#define MCFG_INFO_ILM   (1<<7)
 
#define MCFG_INFO_DLM   (1<<8)
 
#define MCFG_INFO_ICACHE   (1<<9)
 
#define MCFG_INFO_DCACHE   (1<<10)
 
#define MCFG_INFO_SMP   (1<<11)
 
#define MCFG_INFO_DSP_N1   (1<<12)
 
#define MCFG_INFO_DSP_N2   (1<<13)
 
#define MCFG_INFO_DSP_N3   (1<<14)
 
#define MCFG_INFO_IREGION_EXIST   (1<<16)
 
#define MCFG_INFO_VP   (0x3<<17)
 
#define MICFG_IC_SET   (0xF<<0)
 
#define MICFG_IC_WAY   (0x7<<4)
 
#define MICFG_IC_LSIZE   (0x7<<7)
 
#define MICFG_IC_ECC   (0x1<<10)
 
#define MICFG_ILM_SIZE   (0x1F<<16)
 
#define MICFG_ILM_XONLY   (0x1<<21)
 
#define MICFG_ILM_ECC   (0x1<<22)
 
#define MDCFG_DC_SET   (0xF<<0)
 
#define MDCFG_DC_WAY   (0x7<<4)
 
#define MDCFG_DC_LSIZE   (0x7<<7)
 
#define MDCFG_DC_ECC   (0x1<<10)
 
#define MDCFG_DLM_SIZE   (0x1F<<16)
 
#define MDCFG_DLM_ECC   (0x1<<21)
 
#define MIRGB_INFO_IRG_BASE_ADDR_BOFS   (10)
 
#define MIRGB_INFO_IREGION_SIZE_BOFS   (1)
 
#define MPPICFG_INFO_PPI_SIZE   (0x1F<<1)
 
#define MPPICFG_INFO_PPI_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)
 
#define MFIOCFG_INFO_FIO_SIZE   (0x1F<<1)
 
#define MFIOCFG_INFO_FIO_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)
 
#define MECC_LOCK_ECC_LOCK   (0x1)
 
#define MECC_CODE_CODE   (0x1FF)
 
#define MECC_CODE_RAMID   (0x1F<<16)
 
#define MECC_CODE_SRAMID   (0x1F<<24)
 
#define CCM_SUEN_SUEN   (0x1<<0)
 
#define CCM_DATA_DATA   (0x7<<0)
 
#define CCM_COMMAND_COMMAND   (0x1F<<0)
 
#define IREGION_IINFO_OFS   (0x0)
 
#define IREGION_DEBUG_OFS   (0x10000)
 
#define IREGION_ECLIC_OFS   (0x20000)
 
#define IREGION_TIMER_OFS   (0x30000)
 
#define IREGION_SMP_OFS   (0x40000)
 
#define IREGION_IDU_OFS   (0x50000)
 
#define IREGION_PL2_OFS   (0x60000)
 
#define IREGION_DPREFETCH_OFS   (0x70000)
 
#define IREGION_PLIC_OFS   (0x4000000)
 
#define MSTACK_CTRL_MODE   (0x1<<2)
 
#define MSTACK_CTRL_UDF_EN   (0x1<<1)
 
#define MSTACK_CTRL_OVF_TRACK_EN   (0x1)
 
#define PRV_U   0
 
#define PRV_S   1
 
#define PRV_H   2
 
#define PRV_M   3
 
#define VM_MBARE   0
 
#define VM_MBB   1
 
#define VM_MBBID   2
 
#define VM_SV32   8
 
#define VM_SV39   9
 
#define VM_SV48   10
 
#define SATP32_MODE   0x80000000
 
#define SATP32_ASID   0x7FC00000
 
#define SATP32_PPN   0x003FFFFF
 
#define SATP64_MODE   0xF000000000000000
 
#define SATP64_ASID   0x0FFFF00000000000
 
#define SATP64_PPN   0x00000FFFFFFFFFFF
 
#define SATP_MODE_OFF   0
 
#define SATP_MODE_SV32   1
 
#define SATP_MODE_SV39   8
 
#define SATP_MODE_SV48   9
 
#define SATP_MODE_SV57   10
 
#define SATP_MODE_SV64   11
 
#define IRQ_S_SOFT   1
 
#define IRQ_H_SOFT   2
 
#define IRQ_M_SOFT   3
 
#define IRQ_S_TIMER   5
 
#define IRQ_H_TIMER   6
 
#define IRQ_M_TIMER   7
 
#define IRQ_S_EXT   9
 
#define IRQ_H_EXT   10
 
#define IRQ_M_EXT   11
 
#define IRQ_COP   12
 
#define IRQ_HOST   13
 
#define FRM_RNDMODE_RNE   0x0
 FPU Round to Nearest, ties to Even. More...
 
#define FRM_RNDMODE_RTZ   0x1
 FPU Round Towards Zero. More...
 
#define FRM_RNDMODE_RDN   0x2
 FPU Round Down (towards -inf) More...
 
#define FRM_RNDMODE_RUP   0x3
 FPU Round Up (towards +inf) More...
 
#define FRM_RNDMODE_RMM   0x4
 FPU Round to nearest, ties to Max Magnitude. More...
 
#define FRM_RNDMODE_DYN   0x7
 In instruction's rm, selects dynamic rounding mode. More...
 
#define FFLAGS_AE_NX   (1<<0)
 FPU Inexact. More...
 
#define FFLAGS_AE_UF   (1<<1)
 FPU Underflow. More...
 
#define FFLAGS_AE_OF   (1<<2)
 FPU Overflow. More...
 
#define FFLAGS_AE_DZ   (1<<3)
 FPU Divide by Zero. More...
 
#define FFLAGS_AE_NV   (1<<4)
 FPU Invalid Operation. More...
 
#define FREG(idx)   f##idx
 Floating Point Register f0-f31, eg. More...
 
#define PMP_R   0x01
 
#define PMP_W   0x02
 
#define PMP_X   0x04
 
#define PMP_A   0x18
 
#define PMP_A_TOR   0x08
 
#define PMP_A_NA4   0x10
 
#define PMP_A_NAPOT   0x18
 
#define PMP_L   0x80
 
#define PMP_SHIFT   2
 
#define PMP_COUNT   16
 
#define SPMP_R   PMP_R
 
#define SPMP_W   PMP_W
 
#define SPMP_X   PMP_X
 
#define SPMP_A   PMP_A
 
#define SPMP_A_TOR   PMP_A_TOR
 
#define SPMP_A_NA4   PMP_A_NA4
 
#define SPMP_A_NAPOT   PMP_A_NAPOT
 
#define SPMP_U   0x40
 
#define SPMP_L   PMP_L
 
#define SPMP_SHIFT   PMP_SHIFT
 
#define SPMP_COUNT   16
 
#define SMPU_R   SPMP_R
 
#define SMPU_W   SPMP_W
 
#define SMPU_X   SPMP_X
 
#define SMPU_A   SPMP_A
 
#define SMPU_A_TOR   SPMP_A_TOR
 
#define SMPU_A_NA4   SPMP_A_NA4
 
#define SMPU_A_NAPOT   SPMP_A_NAPOT
 
#define SMPU_S   0x80
 
#define SMPU_SHIFT   PMP_SHIFT
 
#define PTE_V   0x001
 
#define PTE_R   0x002
 
#define PTE_W   0x004
 
#define PTE_X   0x008
 
#define PTE_U   0x010
 
#define PTE_G   0x020
 
#define PTE_A   0x040
 
#define PTE_D   0x080
 
#define PTE_SOFT   0x300
 
#define PTE_PPN_SHIFT   10
 
#define PTE_TABLE(PTE)   (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
 
#define CAUSE_MISALIGNED_FETCH   0x0
 End of Doxygen Group NMSIS_Core_CSR_Registers. More...
 
#define CAUSE_FAULT_FETCH   0x1
 
#define CAUSE_ILLEGAL_INSTRUCTION   0x2
 
#define CAUSE_BREAKPOINT   0x3
 
#define CAUSE_MISALIGNED_LOAD   0x4
 
#define CAUSE_FAULT_LOAD   0x5
 
#define CAUSE_MISALIGNED_STORE   0x6
 
#define CAUSE_FAULT_STORE   0x7
 
#define CAUSE_USER_ECALL   0x8
 
#define CAUSE_SUPERVISOR_ECALL   0x9
 
#define CAUSE_HYPERVISOR_ECALL   0xa
 
#define CAUSE_MACHINE_ECALL   0xb
 
#define CAUSE_FETCH_PAGE_FAULT   0xc
 
#define CAUSE_LOAD_PAGE_FAULT   0xd
 
#define CAUSE_STORE_PAGE_FAULT   0xf
 
#define MISALIGNED_FETCH   (1 << CAUSE_MISALIGNED_FETCH)
 
#define FAULT_FETCH   (1 << CAUSE_FAULT_FETCH)
 
#define ILLEGAL_INSTRUCTION   (1 << CAUSE_ILLEGAL_INSTRUCTION)
 
#define BREAKPOINT   (1 << CAUSE_BREAKPOINT)
 
#define MISALIGNED_LOAD   (1 << CAUSE_MISALIGNED_LOAD)
 
#define FAULT_LOAD   (1 << CAUSE_FAULT_LOAD)
 
#define MISALIGNED_STORE   (1 << CAUSE_MISALIGNED_STORE)
 
#define FAULT_STORE   (1 << CAUSE_FAULT_STORE)
 
#define USER_ECALL   (1 << CAUSE_USER_ECALL)
 
#define FETCH_PAGE_FAULT   (1 << CAUSE_FETCH_PAGE_FAULT)
 
#define LOAD_PAGE_FAULT   (1 << CAUSE_LOAD_PAGE_FAULT)
 
#define STORE_PAGE_FAULT   (1 << CAUSE_STORE_PAGE_FAULT)
 
#define DCAUSE_FAULT_FETCH_PMP   0x1
 
#define DCAUSE_FAULT_FETCH_INST   0x2
 
#define DCAUSE_FAULT_LOAD_PMP   0x1
 
#define DCAUSE_FAULT_LOAD_INST   0x2
 
#define DCAUSE_FAULT_LOAD_NICE   0x3
 
#define DCAUSE_FAULT_STORE_PMP   0x1
 
#define DCAUSE_FAULT_STORE_INST   0x2
 
#define CSR_XSTATUS   CSR_MSTATUS
 
#define CSR_XTVEC   CSR_MTVEC
 
#define CSR_XCOUNTEREN   CSR_MCOUNTEREN
 
#define CSR_XIE   CSR_MIE
 
#define CSR_XIP   CSR_MIP
 
#define CSR_XSCRATCH   CSR_MSCRATCH
 
#define CSR_XEPC   CSR_MEPC
 
#define CSR_XCAUSE   CSR_MCAUSE
 
#define CSR_XSUBM   CSR_MSUBM
 
#define CSR_XTVAL   CSR_MTVAL
 
#define CSR_XENVCFG   CSR_MENVCFG
 
#define CSR_XTVT   CSR_MTVT
 
#define CSR_XTVT2   CSR_MTVT2
 
#define CSR_XSCRATCHCSWL   CSR_MSCRATCHCSWL
 
#define CSR_XSCRATCHCSW   CSR_MSCRATCHCSW
 
#define CSR_XDCAUSE   CSR_MDCAUSE
 
#define CSR_JALXNXTI   CSR_JALMNXTI
 
#define CSR_XINTSTATUS   CSR_MINTSTATUS
 
#define CSR_XNXTI   CSR_MNXTI
 
#define CSR_PUSHXEPC   CSR_PUSHMEPC
 
#define CSR_PUSHXCAUSE   CSR_PUSHMCAUSE
 
#define XRET   mret
 
#define eclic_xsip_handler   eclic_msip_handler
 
#define eclic_xtip_handler   eclic_mtip_handler
 
#define XSTATUS_XIE   MSTATUS_MIE
 
#define x_exc_entry   exc_entry
 
#define x_irq_entry   irq_entry
 

Detailed Description

NMSIS Core CSR Encodings.

The following macros are used for CSR encodings

Macro Definition Documentation

◆ BREAKPOINT

#define BREAKPOINT   (1 << CAUSE_BREAKPOINT)

Definition at line 1117 of file riscv_encoding.h.

◆ CAUSE_BREAKPOINT

#define CAUSE_BREAKPOINT   0x3

Definition at line 1100 of file riscv_encoding.h.

◆ CAUSE_FAULT_FETCH

#define CAUSE_FAULT_FETCH   0x1

Definition at line 1098 of file riscv_encoding.h.

◆ CAUSE_FAULT_LOAD

#define CAUSE_FAULT_LOAD   0x5

Definition at line 1102 of file riscv_encoding.h.

◆ CAUSE_FAULT_STORE

#define CAUSE_FAULT_STORE   0x7

Definition at line 1104 of file riscv_encoding.h.

◆ CAUSE_FETCH_PAGE_FAULT

#define CAUSE_FETCH_PAGE_FAULT   0xc

Definition at line 1109 of file riscv_encoding.h.

◆ CAUSE_HYPERVISOR_ECALL

#define CAUSE_HYPERVISOR_ECALL   0xa

Definition at line 1107 of file riscv_encoding.h.

◆ CAUSE_ILLEGAL_INSTRUCTION

#define CAUSE_ILLEGAL_INSTRUCTION   0x2

Definition at line 1099 of file riscv_encoding.h.

◆ CAUSE_LOAD_PAGE_FAULT

#define CAUSE_LOAD_PAGE_FAULT   0xd

Definition at line 1110 of file riscv_encoding.h.

◆ CAUSE_MACHINE_ECALL

#define CAUSE_MACHINE_ECALL   0xb

Definition at line 1108 of file riscv_encoding.h.

◆ CAUSE_MISALIGNED_FETCH

#define CAUSE_MISALIGNED_FETCH   0x0

End of Doxygen Group NMSIS_Core_CSR_Registers.

Definition at line 1097 of file riscv_encoding.h.

◆ CAUSE_MISALIGNED_LOAD

#define CAUSE_MISALIGNED_LOAD   0x4

Definition at line 1101 of file riscv_encoding.h.

◆ CAUSE_MISALIGNED_STORE

#define CAUSE_MISALIGNED_STORE   0x6

Definition at line 1103 of file riscv_encoding.h.

◆ CAUSE_STORE_PAGE_FAULT

#define CAUSE_STORE_PAGE_FAULT   0xf

Definition at line 1111 of file riscv_encoding.h.

◆ CAUSE_SUPERVISOR_ECALL

#define CAUSE_SUPERVISOR_ECALL   0x9

Definition at line 1106 of file riscv_encoding.h.

◆ CAUSE_USER_ECALL

#define CAUSE_USER_ECALL   0x8

Definition at line 1105 of file riscv_encoding.h.

◆ CCM_COMMAND_COMMAND

#define CCM_COMMAND_COMMAND   (0x1F<<0)

Definition at line 342 of file riscv_encoding.h.

◆ CCM_DATA_DATA

#define CCM_DATA_DATA   (0x7<<0)

Definition at line 341 of file riscv_encoding.h.

◆ CCM_SUEN_SUEN

#define CCM_SUEN_SUEN   (0x1<<0)

Definition at line 340 of file riscv_encoding.h.

◆ CSR_JALXNXTI

#define CSR_JALXNXTI   CSR_JALMNXTI

Definition at line 1182 of file riscv_encoding.h.

◆ CSR_MCACHE_CTL_DE

#define CSR_MCACHE_CTL_DE   0x00010000

Definition at line 222 of file riscv_encoding.h.

◆ CSR_MCACHE_CTL_IE

#define CSR_MCACHE_CTL_IE   0x00000001

Definition at line 221 of file riscv_encoding.h.

◆ CSR_PUSHXCAUSE

#define CSR_PUSHXCAUSE   CSR_PUSHMCAUSE

Definition at line 1186 of file riscv_encoding.h.

◆ CSR_PUSHXEPC

#define CSR_PUSHXEPC   CSR_PUSHMEPC

Definition at line 1185 of file riscv_encoding.h.

◆ CSR_XCAUSE

#define CSR_XCAUSE   CSR_MCAUSE

Definition at line 1173 of file riscv_encoding.h.

◆ CSR_XCOUNTEREN

#define CSR_XCOUNTEREN   CSR_MCOUNTEREN

Definition at line 1168 of file riscv_encoding.h.

◆ CSR_XDCAUSE

#define CSR_XDCAUSE   CSR_MDCAUSE

Definition at line 1181 of file riscv_encoding.h.

◆ CSR_XENVCFG

#define CSR_XENVCFG   CSR_MENVCFG

Definition at line 1176 of file riscv_encoding.h.

◆ CSR_XEPC

#define CSR_XEPC   CSR_MEPC

Definition at line 1172 of file riscv_encoding.h.

◆ CSR_XIE

#define CSR_XIE   CSR_MIE

Definition at line 1169 of file riscv_encoding.h.

◆ CSR_XINTSTATUS

#define CSR_XINTSTATUS   CSR_MINTSTATUS

Definition at line 1183 of file riscv_encoding.h.

◆ CSR_XIP

#define CSR_XIP   CSR_MIP

Definition at line 1170 of file riscv_encoding.h.

◆ CSR_XNXTI

#define CSR_XNXTI   CSR_MNXTI

Definition at line 1184 of file riscv_encoding.h.

◆ CSR_XSCRATCH

#define CSR_XSCRATCH   CSR_MSCRATCH

Definition at line 1171 of file riscv_encoding.h.

◆ CSR_XSCRATCHCSW

#define CSR_XSCRATCHCSW   CSR_MSCRATCHCSW

Definition at line 1180 of file riscv_encoding.h.

◆ CSR_XSCRATCHCSWL

#define CSR_XSCRATCHCSWL   CSR_MSCRATCHCSWL

Definition at line 1179 of file riscv_encoding.h.

◆ CSR_XSTATUS

#define CSR_XSTATUS   CSR_MSTATUS

Definition at line 1166 of file riscv_encoding.h.

◆ CSR_XSUBM

#define CSR_XSUBM   CSR_MSUBM

Definition at line 1174 of file riscv_encoding.h.

◆ CSR_XTVAL

#define CSR_XTVAL   CSR_MTVAL

Definition at line 1175 of file riscv_encoding.h.

◆ CSR_XTVEC

#define CSR_XTVEC   CSR_MTVEC

Definition at line 1167 of file riscv_encoding.h.

◆ CSR_XTVT

#define CSR_XTVT   CSR_MTVT

Definition at line 1177 of file riscv_encoding.h.

◆ CSR_XTVT2

#define CSR_XTVT2   CSR_MTVT2

Definition at line 1178 of file riscv_encoding.h.

◆ DCAUSE_FAULT_FETCH_INST

#define DCAUSE_FAULT_FETCH_INST   0x2

Definition at line 1129 of file riscv_encoding.h.

◆ DCAUSE_FAULT_FETCH_PMP

#define DCAUSE_FAULT_FETCH_PMP   0x1

Definition at line 1128 of file riscv_encoding.h.

◆ DCAUSE_FAULT_LOAD_INST

#define DCAUSE_FAULT_LOAD_INST   0x2

Definition at line 1132 of file riscv_encoding.h.

◆ DCAUSE_FAULT_LOAD_NICE

#define DCAUSE_FAULT_LOAD_NICE   0x3

Definition at line 1133 of file riscv_encoding.h.

◆ DCAUSE_FAULT_LOAD_PMP

#define DCAUSE_FAULT_LOAD_PMP   0x1

Definition at line 1131 of file riscv_encoding.h.

◆ DCAUSE_FAULT_STORE_INST

#define DCAUSE_FAULT_STORE_INST   0x2

Definition at line 1136 of file riscv_encoding.h.

◆ DCAUSE_FAULT_STORE_PMP

#define DCAUSE_FAULT_STORE_PMP   0x1

Definition at line 1135 of file riscv_encoding.h.

◆ DCSR_CAUSE

#define DCSR_CAUSE   (7<<6)

Definition at line 105 of file riscv_encoding.h.

◆ DCSR_CAUSE_DEBUGINT

#define DCSR_CAUSE_DEBUGINT   3

Definition at line 114 of file riscv_encoding.h.

◆ DCSR_CAUSE_HALT

#define DCSR_CAUSE_HALT   5

Definition at line 116 of file riscv_encoding.h.

◆ DCSR_CAUSE_HWBP

#define DCSR_CAUSE_HWBP   2

Definition at line 113 of file riscv_encoding.h.

◆ DCSR_CAUSE_NONE

#define DCSR_CAUSE_NONE   0

Definition at line 111 of file riscv_encoding.h.

◆ DCSR_CAUSE_STEP

#define DCSR_CAUSE_STEP   4

Definition at line 115 of file riscv_encoding.h.

◆ DCSR_CAUSE_SWBP

#define DCSR_CAUSE_SWBP   1

Definition at line 112 of file riscv_encoding.h.

◆ DCSR_DEBUGINT

#define DCSR_DEBUGINT   (1<<5)

Definition at line 106 of file riscv_encoding.h.

◆ DCSR_EBREAKH

#define DCSR_EBREAKH   (1<<14)

Definition at line 100 of file riscv_encoding.h.

◆ DCSR_EBREAKM

#define DCSR_EBREAKM   (1<<15)

Definition at line 99 of file riscv_encoding.h.

◆ DCSR_EBREAKS

#define DCSR_EBREAKS   (1<<13)

Definition at line 101 of file riscv_encoding.h.

◆ DCSR_EBREAKU

#define DCSR_EBREAKU   (1<<12)

Definition at line 102 of file riscv_encoding.h.

◆ DCSR_FULLRESET

#define DCSR_FULLRESET   (1<<28)

Definition at line 98 of file riscv_encoding.h.

◆ DCSR_HALT

#define DCSR_HALT   (1<<3)

Definition at line 107 of file riscv_encoding.h.

◆ DCSR_NDRESET

#define DCSR_NDRESET   (1<<29)

Definition at line 97 of file riscv_encoding.h.

◆ DCSR_PRV

#define DCSR_PRV   (3<<0)

Definition at line 109 of file riscv_encoding.h.

◆ DCSR_STEP

#define DCSR_STEP   (1<<2)

Definition at line 108 of file riscv_encoding.h.

◆ DCSR_STOPCYCLE

#define DCSR_STOPCYCLE   (1<<10)

Definition at line 103 of file riscv_encoding.h.

◆ DCSR_STOPTIME

#define DCSR_STOPTIME   (1<<9)

Definition at line 104 of file riscv_encoding.h.

◆ DCSR_XDEBUGVER

#define DCSR_XDEBUGVER   (3U<<30)

Definition at line 96 of file riscv_encoding.h.

◆ eclic_xsip_handler

#define eclic_xsip_handler   eclic_msip_handler

Definition at line 1188 of file riscv_encoding.h.

◆ eclic_xtip_handler

#define eclic_xtip_handler   eclic_mtip_handler

Definition at line 1189 of file riscv_encoding.h.

◆ FAULT_FETCH

#define FAULT_FETCH   (1 << CAUSE_FAULT_FETCH)

Definition at line 1115 of file riscv_encoding.h.

◆ FAULT_LOAD

#define FAULT_LOAD   (1 << CAUSE_FAULT_LOAD)

Definition at line 1119 of file riscv_encoding.h.

◆ FAULT_STORE

#define FAULT_STORE   (1 << CAUSE_FAULT_STORE)

Definition at line 1121 of file riscv_encoding.h.

◆ FETCH_PAGE_FAULT

#define FETCH_PAGE_FAULT   (1 << CAUSE_FETCH_PAGE_FAULT)

Definition at line 1123 of file riscv_encoding.h.

◆ FFLAGS_AE_DZ

#define FFLAGS_AE_DZ   (1<<3)

FPU Divide by Zero.

Definition at line 426 of file riscv_encoding.h.

◆ FFLAGS_AE_NV

#define FFLAGS_AE_NV   (1<<4)

FPU Invalid Operation.

Definition at line 428 of file riscv_encoding.h.

◆ FFLAGS_AE_NX

#define FFLAGS_AE_NX   (1<<0)

FPU Inexact.

Definition at line 420 of file riscv_encoding.h.

◆ FFLAGS_AE_OF

#define FFLAGS_AE_OF   (1<<2)

FPU Overflow.

Definition at line 424 of file riscv_encoding.h.

◆ FFLAGS_AE_UF

#define FFLAGS_AE_UF   (1<<1)

FPU Underflow.

Definition at line 422 of file riscv_encoding.h.

◆ FREG

#define FREG (   idx)    f##idx

Floating Point Register f0-f31, eg.

f0 -> FREG(0)

Definition at line 431 of file riscv_encoding.h.

◆ FRM_RNDMODE_DYN

#define FRM_RNDMODE_DYN   0x7

In instruction's rm, selects dynamic rounding mode.

In Rounding Mode register, Invalid

Definition at line 416 of file riscv_encoding.h.

◆ FRM_RNDMODE_RDN

#define FRM_RNDMODE_RDN   0x2

FPU Round Down (towards -inf)

Definition at line 408 of file riscv_encoding.h.

◆ FRM_RNDMODE_RMM

#define FRM_RNDMODE_RMM   0x4

FPU Round to nearest, ties to Max Magnitude.

Definition at line 412 of file riscv_encoding.h.

◆ FRM_RNDMODE_RNE

#define FRM_RNDMODE_RNE   0x0

FPU Round to Nearest, ties to Even.

Definition at line 404 of file riscv_encoding.h.

◆ FRM_RNDMODE_RTZ

#define FRM_RNDMODE_RTZ   0x1

FPU Round Towards Zero.

Definition at line 406 of file riscv_encoding.h.

◆ FRM_RNDMODE_RUP

#define FRM_RNDMODE_RUP   0x3

FPU Round Up (towards +inf)

Definition at line 410 of file riscv_encoding.h.

◆ ILLEGAL_INSTRUCTION

#define ILLEGAL_INSTRUCTION   (1 << CAUSE_ILLEGAL_INSTRUCTION)

Definition at line 1116 of file riscv_encoding.h.

◆ IREGION_DEBUG_OFS

#define IREGION_DEBUG_OFS   (0x10000)

Definition at line 346 of file riscv_encoding.h.

◆ IREGION_DPREFETCH_OFS

#define IREGION_DPREFETCH_OFS   (0x70000)

Definition at line 352 of file riscv_encoding.h.

◆ IREGION_ECLIC_OFS

#define IREGION_ECLIC_OFS   (0x20000)

Definition at line 347 of file riscv_encoding.h.

◆ IREGION_IDU_OFS

#define IREGION_IDU_OFS   (0x50000)

Definition at line 350 of file riscv_encoding.h.

◆ IREGION_IINFO_OFS

#define IREGION_IINFO_OFS   (0x0)

Definition at line 345 of file riscv_encoding.h.

◆ IREGION_PL2_OFS

#define IREGION_PL2_OFS   (0x60000)

Definition at line 351 of file riscv_encoding.h.

◆ IREGION_PLIC_OFS

#define IREGION_PLIC_OFS   (0x4000000)

Definition at line 353 of file riscv_encoding.h.

◆ IREGION_SMP_OFS

#define IREGION_SMP_OFS   (0x40000)

Definition at line 349 of file riscv_encoding.h.

◆ IREGION_TIMER_OFS

#define IREGION_TIMER_OFS   (0x30000)

Definition at line 348 of file riscv_encoding.h.

◆ IRQ_COP

#define IRQ_COP   12

Definition at line 398 of file riscv_encoding.h.

◆ IRQ_H_EXT

#define IRQ_H_EXT   10

Definition at line 396 of file riscv_encoding.h.

◆ IRQ_H_SOFT

#define IRQ_H_SOFT   2

Definition at line 390 of file riscv_encoding.h.

◆ IRQ_H_TIMER

#define IRQ_H_TIMER   6

Definition at line 393 of file riscv_encoding.h.

◆ IRQ_HOST

#define IRQ_HOST   13

Definition at line 399 of file riscv_encoding.h.

◆ IRQ_M_EXT

#define IRQ_M_EXT   11

Definition at line 397 of file riscv_encoding.h.

◆ IRQ_M_SOFT

#define IRQ_M_SOFT   3

Definition at line 391 of file riscv_encoding.h.

◆ IRQ_M_TIMER

#define IRQ_M_TIMER   7

Definition at line 394 of file riscv_encoding.h.

◆ IRQ_S_EXT

#define IRQ_S_EXT   9

Definition at line 395 of file riscv_encoding.h.

◆ IRQ_S_SOFT

#define IRQ_S_SOFT   1

Definition at line 389 of file riscv_encoding.h.

◆ IRQ_S_TIMER

#define IRQ_S_TIMER   5

Definition at line 392 of file riscv_encoding.h.

◆ LOAD_PAGE_FAULT

#define LOAD_PAGE_FAULT   (1 << CAUSE_LOAD_PAGE_FAULT)

Definition at line 1124 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_DRAM_ECC_INJ_EN

#define MCACHE_CTL_DC_DRAM_ECC_INJ_EN   (1<<20)

Definition at line 286 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_ECC_CHK_EN

#define MCACHE_CTL_DC_ECC_CHK_EN   (1<<21)

Definition at line 287 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_ECC_EN

#define MCACHE_CTL_DC_ECC_EN   (1<<17)

Definition at line 281 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_ECC_EXCP_EN

#define MCACHE_CTL_DC_ECC_EXCP_EN   (1<<18)

Definition at line 282 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_EN

#define MCACHE_CTL_DC_EN   (1<<16)

Definition at line 280 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_RWDECC

#define MCACHE_CTL_DC_RWDECC   (1<<20)

Definition at line 285 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_RWTECC

#define MCACHE_CTL_DC_RWTECC   (1<<19)

Definition at line 284 of file riscv_encoding.h.

◆ MCACHE_CTL_DC_TRAM_ECC_INJ_EN

#define MCACHE_CTL_DC_TRAM_ECC_INJ_EN   (1<<19)

Definition at line 283 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_CANCEL_EN

#define MCACHE_CTL_IC_CANCEL_EN   (1<<7)

Definition at line 278 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_DRAM_ECC_INJ_EN

#define MCACHE_CTL_IC_DRAM_ECC_INJ_EN   (1<<5)

Definition at line 276 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_ECC_CHK_EN

#define MCACHE_CTL_IC_ECC_CHK_EN   (1<<8)

Definition at line 279 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_ECC_EN

#define MCACHE_CTL_IC_ECC_EN   (1<<2)

Definition at line 271 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_ECC_EXCP_EN

#define MCACHE_CTL_IC_ECC_EXCP_EN   (1<<3)

Definition at line 272 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_EN

#define MCACHE_CTL_IC_EN   (1<<0)

Definition at line 269 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_PF_EN

#define MCACHE_CTL_IC_PF_EN   (1<<6)

Definition at line 277 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_RWDECC

#define MCACHE_CTL_IC_RWDECC   (1<<5)

Definition at line 275 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_RWTECC

#define MCACHE_CTL_IC_RWTECC   (1<<4)

Definition at line 274 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_SCPD_MOD

#define MCACHE_CTL_IC_SCPD_MOD   (1<<1)

Definition at line 270 of file riscv_encoding.h.

◆ MCACHE_CTL_IC_TRAM_ECC_INJ_EN

#define MCACHE_CTL_IC_TRAM_ECC_INJ_EN   (1<<4)

Definition at line 273 of file riscv_encoding.h.

◆ MCAUSE_CAUSE

#define MCAUSE_CAUSE   0x00000FFFUL

Definition at line 180 of file riscv_encoding.h.

◆ MCAUSE_INTR

#define MCAUSE_INTR   (1ULL << (__riscv_xlen - 1))

Definition at line 179 of file riscv_encoding.h.

◆ MCFG_INFO_CLIC

#define MCFG_INFO_CLIC   (1<<2)

Definition at line 294 of file riscv_encoding.h.

◆ MCFG_INFO_DCACHE

#define MCFG_INFO_DCACHE   (1<<10)

Definition at line 302 of file riscv_encoding.h.

◆ MCFG_INFO_DLM

#define MCFG_INFO_DLM   (1<<8)

Definition at line 300 of file riscv_encoding.h.

◆ MCFG_INFO_DSP_N1

#define MCFG_INFO_DSP_N1   (1<<12)

Definition at line 304 of file riscv_encoding.h.

◆ MCFG_INFO_DSP_N2

#define MCFG_INFO_DSP_N2   (1<<13)

Definition at line 305 of file riscv_encoding.h.

◆ MCFG_INFO_DSP_N3

#define MCFG_INFO_DSP_N3   (1<<14)

Definition at line 306 of file riscv_encoding.h.

◆ MCFG_INFO_ECC

#define MCFG_INFO_ECC   (1<<1)

Definition at line 293 of file riscv_encoding.h.

◆ MCFG_INFO_FIO

#define MCFG_INFO_FIO   (1<<4)

Definition at line 296 of file riscv_encoding.h.

◆ MCFG_INFO_ICACHE

#define MCFG_INFO_ICACHE   (1<<9)

Definition at line 301 of file riscv_encoding.h.

◆ MCFG_INFO_ILM

#define MCFG_INFO_ILM   (1<<7)

Definition at line 299 of file riscv_encoding.h.

◆ MCFG_INFO_IREGION_EXIST

#define MCFG_INFO_IREGION_EXIST   (1<<16)

Definition at line 307 of file riscv_encoding.h.

◆ MCFG_INFO_NICE

#define MCFG_INFO_NICE   (1<<6)

Definition at line 298 of file riscv_encoding.h.

◆ MCFG_INFO_PLIC

#define MCFG_INFO_PLIC   (1<<3)

Definition at line 295 of file riscv_encoding.h.

◆ MCFG_INFO_PPI

#define MCFG_INFO_PPI   (1<<5)

Definition at line 297 of file riscv_encoding.h.

◆ MCFG_INFO_SMP

#define MCFG_INFO_SMP   (1<<11)

Definition at line 303 of file riscv_encoding.h.

◆ MCFG_INFO_TEE

#define MCFG_INFO_TEE   (1<<0)

Definition at line 292 of file riscv_encoding.h.

◆ MCFG_INFO_VP

#define MCFG_INFO_VP   (0x3<<17)

Definition at line 308 of file riscv_encoding.h.

◆ MCONTROL_ACTION

#define MCONTROL_ACTION   (0x3f<<12)

Definition at line 124 of file riscv_encoding.h.

◆ MCONTROL_ACTION_DEBUG_EXCEPTION

#define MCONTROL_ACTION_DEBUG_EXCEPTION   0

Definition at line 138 of file riscv_encoding.h.

◆ MCONTROL_ACTION_DEBUG_MODE

#define MCONTROL_ACTION_DEBUG_MODE   1

Definition at line 139 of file riscv_encoding.h.

◆ MCONTROL_ACTION_TRACE_EMIT

#define MCONTROL_ACTION_TRACE_EMIT   4

Definition at line 142 of file riscv_encoding.h.

◆ MCONTROL_ACTION_TRACE_START

#define MCONTROL_ACTION_TRACE_START   2

Definition at line 140 of file riscv_encoding.h.

◆ MCONTROL_ACTION_TRACE_STOP

#define MCONTROL_ACTION_TRACE_STOP   3

Definition at line 141 of file riscv_encoding.h.

◆ MCONTROL_CHAIN

#define MCONTROL_CHAIN   (1<<11)

Definition at line 125 of file riscv_encoding.h.

◆ MCONTROL_DMODE

#define MCONTROL_DMODE (   xlen)    (1ULL<<((xlen)-5))

Definition at line 119 of file riscv_encoding.h.

◆ MCONTROL_EXECUTE

#define MCONTROL_EXECUTE   (1<<2)

Definition at line 131 of file riscv_encoding.h.

◆ MCONTROL_H

#define MCONTROL_H   (1<<5)

Definition at line 128 of file riscv_encoding.h.

◆ MCONTROL_LOAD

#define MCONTROL_LOAD   (1<<0)

Definition at line 133 of file riscv_encoding.h.

◆ MCONTROL_M

#define MCONTROL_M   (1<<6)

Definition at line 127 of file riscv_encoding.h.

◆ MCONTROL_MASKMAX

#define MCONTROL_MASKMAX (   xlen)    (0x3fULL<<((xlen)-11))

Definition at line 120 of file riscv_encoding.h.

◆ MCONTROL_MATCH

#define MCONTROL_MATCH   (0xf<<7)

Definition at line 126 of file riscv_encoding.h.

◆ MCONTROL_MATCH_EQUAL

#define MCONTROL_MATCH_EQUAL   0

Definition at line 144 of file riscv_encoding.h.

◆ MCONTROL_MATCH_GE

#define MCONTROL_MATCH_GE   2

Definition at line 146 of file riscv_encoding.h.

◆ MCONTROL_MATCH_LT

#define MCONTROL_MATCH_LT   3

Definition at line 147 of file riscv_encoding.h.

◆ MCONTROL_MATCH_MASK_HIGH

#define MCONTROL_MATCH_MASK_HIGH   5

Definition at line 149 of file riscv_encoding.h.

◆ MCONTROL_MATCH_MASK_LOW

#define MCONTROL_MATCH_MASK_LOW   4

Definition at line 148 of file riscv_encoding.h.

◆ MCONTROL_MATCH_NAPOT

#define MCONTROL_MATCH_NAPOT   1

Definition at line 145 of file riscv_encoding.h.

◆ MCONTROL_S

#define MCONTROL_S   (1<<4)

Definition at line 129 of file riscv_encoding.h.

◆ MCONTROL_SELECT

#define MCONTROL_SELECT   (1<<19)

Definition at line 122 of file riscv_encoding.h.

◆ MCONTROL_STORE

#define MCONTROL_STORE   (1<<1)

Definition at line 132 of file riscv_encoding.h.

◆ MCONTROL_TIMING

#define MCONTROL_TIMING   (1<<18)

Definition at line 123 of file riscv_encoding.h.

◆ MCONTROL_TYPE

#define MCONTROL_TYPE (   xlen)    (0xfULL<<((xlen)-4))

Definition at line 118 of file riscv_encoding.h.

◆ MCONTROL_TYPE_MATCH

#define MCONTROL_TYPE_MATCH   2

Definition at line 136 of file riscv_encoding.h.

◆ MCONTROL_TYPE_NONE

#define MCONTROL_TYPE_NONE   0

Definition at line 135 of file riscv_encoding.h.

◆ MCONTROL_U

#define MCONTROL_U   (1<<3)

Definition at line 130 of file riscv_encoding.h.

◆ MCOUNTEREN_CY

#define MCOUNTEREN_CY   (1U << MCOUNTEREN_CY_SHIFT)

Definition at line 232 of file riscv_encoding.h.

◆ MCOUNTEREN_CY_SHIFT

#define MCOUNTEREN_CY_SHIFT   0

Definition at line 228 of file riscv_encoding.h.

◆ MCOUNTEREN_IR

#define MCOUNTEREN_IR   (1U << MCOUNTEREN_IR_SHIFT)

Definition at line 234 of file riscv_encoding.h.

◆ MCOUNTEREN_IR_SHIFT

#define MCOUNTEREN_IR_SHIFT   2

Definition at line 230 of file riscv_encoding.h.

◆ MCOUNTEREN_TIME

#define MCOUNTEREN_TIME   (1U << MCOUNTEREN_TIME_SHIFT)

Definition at line 233 of file riscv_encoding.h.

◆ MCOUNTEREN_TIME_SHIFT

#define MCOUNTEREN_TIME_SHIFT   1

Definition at line 229 of file riscv_encoding.h.

◆ MCOUNTINHIBIT_CY

#define MCOUNTINHIBIT_CY   MCOUNTEREN_CY

Definition at line 236 of file riscv_encoding.h.

◆ MCOUNTINHIBIT_IR

#define MCOUNTINHIBIT_IR   MCOUNTEREN_IR

Definition at line 237 of file riscv_encoding.h.

◆ MDCAUSE_MDCAUSE

#define MDCAUSE_MDCAUSE   (0x7)

Definition at line 258 of file riscv_encoding.h.

◆ MDCFG_DC_ECC

#define MDCFG_DC_ECC   (0x1<<10)

Definition at line 321 of file riscv_encoding.h.

◆ MDCFG_DC_LSIZE

#define MDCFG_DC_LSIZE   (0x7<<7)

Definition at line 320 of file riscv_encoding.h.

◆ MDCFG_DC_SET

#define MDCFG_DC_SET   (0xF<<0)

Definition at line 318 of file riscv_encoding.h.

◆ MDCFG_DC_WAY

#define MDCFG_DC_WAY   (0x7<<4)

Definition at line 319 of file riscv_encoding.h.

◆ MDCFG_DLM_ECC

#define MDCFG_DLM_ECC   (0x1<<21)

Definition at line 323 of file riscv_encoding.h.

◆ MDCFG_DLM_SIZE

#define MDCFG_DLM_SIZE   (0x1F<<16)

Definition at line 322 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_BPA

#define MDLM_CTL_DLM_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)

Definition at line 247 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_ECC_CHK_EN

#define MDLM_CTL_DLM_ECC_CHK_EN   (1<<4)

Definition at line 248 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_ECC_EN

#define MDLM_CTL_DLM_ECC_EN   (1<<1)

Definition at line 252 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_ECC_EXCP_EN

#define MDLM_CTL_DLM_ECC_EXCP_EN   (1<<2)

Definition at line 251 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_ECC_INJ_EN

#define MDLM_CTL_DLM_ECC_INJ_EN   (1<<3)

Definition at line 250 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_EN

#define MDLM_CTL_DLM_EN   (1<<0)

Definition at line 253 of file riscv_encoding.h.

◆ MDLM_CTL_DLM_RWECC

#define MDLM_CTL_DLM_RWECC   (1<<3)

Definition at line 249 of file riscv_encoding.h.

◆ MECC_CODE_CODE

#define MECC_CODE_CODE   (0x1FF)

Definition at line 336 of file riscv_encoding.h.

◆ MECC_CODE_RAMID

#define MECC_CODE_RAMID   (0x1F<<16)

Definition at line 337 of file riscv_encoding.h.

◆ MECC_CODE_SRAMID

#define MECC_CODE_SRAMID   (0x1F<<24)

Definition at line 338 of file riscv_encoding.h.

◆ MECC_LOCK_ECC_LOCK

#define MECC_LOCK_ECC_LOCK   (0x1)

Definition at line 334 of file riscv_encoding.h.

◆ MENVCFG_ADUE

#define MENVCFG_ADUE   0x2000000000000000

Definition at line 199 of file riscv_encoding.h.

◆ MENVCFG_CBCFE

#define MENVCFG_CBCFE   0x00000040

Definition at line 195 of file riscv_encoding.h.

◆ MENVCFG_CBIE

#define MENVCFG_CBIE   0x00000030

Definition at line 194 of file riscv_encoding.h.

◆ MENVCFG_CBIE_EN

#define MENVCFG_CBIE_EN   (0x11 << 4)

Definition at line 184 of file riscv_encoding.h.

◆ MENVCFG_CBIE_FLUSH

#define MENVCFG_CBIE_FLUSH   (0x01 << 4)

Definition at line 185 of file riscv_encoding.h.

◆ MENVCFG_CBIE_INVAL

#define MENVCFG_CBIE_INVAL   (0x11 << 4)

Definition at line 186 of file riscv_encoding.h.

◆ MENVCFG_CBZE

#define MENVCFG_CBZE   0x00000080

Definition at line 196 of file riscv_encoding.h.

◆ MENVCFG_DTE

#define MENVCFG_DTE   0x0800000000000000

Definition at line 198 of file riscv_encoding.h.

◆ MENVCFG_FIOM

#define MENVCFG_FIOM   0x00000001

Definition at line 191 of file riscv_encoding.h.

◆ MENVCFG_LPE

#define MENVCFG_LPE   0x00000004

Definition at line 192 of file riscv_encoding.h.

◆ MENVCFG_PBMTE

#define MENVCFG_PBMTE   0x4000000000000000

Definition at line 200 of file riscv_encoding.h.

◆ MENVCFG_PMM

#define MENVCFG_PMM   0x0000000300000000

Definition at line 197 of file riscv_encoding.h.

◆ MENVCFG_SSE

#define MENVCFG_SSE   0x00000008

Definition at line 193 of file riscv_encoding.h.

◆ MENVCFG_STCE

#define MENVCFG_STCE   0x8000000000000000

Definition at line 201 of file riscv_encoding.h.

◆ MENVCFGH_ADUE

#define MENVCFGH_ADUE   0x20000000

Definition at line 204 of file riscv_encoding.h.

◆ MENVCFGH_DTE

#define MENVCFGH_DTE   0x08000000

Definition at line 203 of file riscv_encoding.h.

◆ MENVCFGH_PBMTE

#define MENVCFGH_PBMTE   0x40000000

Definition at line 205 of file riscv_encoding.h.

◆ MENVCFGH_STCE

#define MENVCFGH_STCE   0x80000000

Definition at line 206 of file riscv_encoding.h.

◆ MFIOCFG_INFO_FIO_BPA

#define MFIOCFG_INFO_FIO_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)

Definition at line 332 of file riscv_encoding.h.

◆ MFIOCFG_INFO_FIO_SIZE

#define MFIOCFG_INFO_FIO_SIZE   (0x1F<<1)

Definition at line 331 of file riscv_encoding.h.

◆ MICFG_IC_ECC

#define MICFG_IC_ECC   (0x1<<10)

Definition at line 313 of file riscv_encoding.h.

◆ MICFG_IC_LSIZE

#define MICFG_IC_LSIZE   (0x7<<7)

Definition at line 312 of file riscv_encoding.h.

◆ MICFG_IC_SET

#define MICFG_IC_SET   (0xF<<0)

Definition at line 310 of file riscv_encoding.h.

◆ MICFG_IC_WAY

#define MICFG_IC_WAY   (0x7<<4)

Definition at line 311 of file riscv_encoding.h.

◆ MICFG_ILM_ECC

#define MICFG_ILM_ECC   (0x1<<22)

Definition at line 316 of file riscv_encoding.h.

◆ MICFG_ILM_SIZE

#define MICFG_ILM_SIZE   (0x1F<<16)

Definition at line 314 of file riscv_encoding.h.

◆ MICFG_ILM_XONLY

#define MICFG_ILM_XONLY   (0x1<<21)

Definition at line 315 of file riscv_encoding.h.

◆ MIE_HEIE

#define MIE_HEIE   MIP_HEIP

Definition at line 168 of file riscv_encoding.h.

◆ MIE_HSIE

#define MIE_HSIE   MIP_HSIP

Definition at line 162 of file riscv_encoding.h.

◆ MIE_HTIE

#define MIE_HTIE   MIP_HTIP

Definition at line 165 of file riscv_encoding.h.

◆ MIE_MEIE

#define MIE_MEIE   MIP_MEIP

Definition at line 169 of file riscv_encoding.h.

◆ MIE_MSIE

#define MIE_MSIE   MIP_MSIP

Definition at line 163 of file riscv_encoding.h.

◆ MIE_MTIE

#define MIE_MTIE   MIP_MTIP

Definition at line 166 of file riscv_encoding.h.

◆ MIE_SEIE

#define MIE_SEIE   MIP_SEIP

Definition at line 167 of file riscv_encoding.h.

◆ MIE_SSIE

#define MIE_SSIE   MIP_SSIP

Definition at line 161 of file riscv_encoding.h.

◆ MIE_STIE

#define MIE_STIE   MIP_STIP

Definition at line 164 of file riscv_encoding.h.

◆ MILM_CTL_ILM_BPA

#define MILM_CTL_ILM_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)

Definition at line 239 of file riscv_encoding.h.

◆ MILM_CTL_ILM_ECC_CHK_EN

#define MILM_CTL_ILM_ECC_CHK_EN   (1<<4)

Definition at line 240 of file riscv_encoding.h.

◆ MILM_CTL_ILM_ECC_EN

#define MILM_CTL_ILM_ECC_EN   (1<<1)

Definition at line 244 of file riscv_encoding.h.

◆ MILM_CTL_ILM_ECC_EXCP_EN

#define MILM_CTL_ILM_ECC_EXCP_EN   (1<<2)

Definition at line 243 of file riscv_encoding.h.

◆ MILM_CTL_ILM_ECC_INJ_EN

#define MILM_CTL_ILM_ECC_INJ_EN   (1<<3)

Definition at line 242 of file riscv_encoding.h.

◆ MILM_CTL_ILM_EN

#define MILM_CTL_ILM_EN   (1<<0)

Definition at line 245 of file riscv_encoding.h.

◆ MILM_CTL_ILM_RWECC

#define MILM_CTL_ILM_RWECC   (1<<3)

Definition at line 241 of file riscv_encoding.h.

◆ MIP_HEIP

#define MIP_HEIP   (1 << IRQ_H_EXT)

Definition at line 158 of file riscv_encoding.h.

◆ MIP_HSIP

#define MIP_HSIP   (1 << IRQ_H_SOFT)

Definition at line 152 of file riscv_encoding.h.

◆ MIP_HTIP

#define MIP_HTIP   (1 << IRQ_H_TIMER)

Definition at line 155 of file riscv_encoding.h.

◆ MIP_MEIP

#define MIP_MEIP   (1 << IRQ_M_EXT)

Definition at line 159 of file riscv_encoding.h.

◆ MIP_MSIP

#define MIP_MSIP   (1 << IRQ_M_SOFT)

Definition at line 153 of file riscv_encoding.h.

◆ MIP_MTIP

#define MIP_MTIP   (1 << IRQ_M_TIMER)

Definition at line 156 of file riscv_encoding.h.

◆ MIP_SEIP

#define MIP_SEIP   (1 << IRQ_S_EXT)

Definition at line 157 of file riscv_encoding.h.

◆ MIP_SSIP

#define MIP_SSIP   (1 << IRQ_S_SOFT)

Definition at line 151 of file riscv_encoding.h.

◆ MIP_STIP

#define MIP_STIP   (1 << IRQ_S_TIMER)

Definition at line 154 of file riscv_encoding.h.

◆ MIRGB_INFO_IREGION_SIZE_BOFS

#define MIRGB_INFO_IREGION_SIZE_BOFS   (1)

Definition at line 326 of file riscv_encoding.h.

◆ MIRGB_INFO_IRG_BASE_ADDR_BOFS

#define MIRGB_INFO_IRG_BASE_ADDR_BOFS   (10)

Definition at line 325 of file riscv_encoding.h.

◆ MISALIGNED_FETCH

#define MISALIGNED_FETCH   (1 << CAUSE_MISALIGNED_FETCH)

Definition at line 1114 of file riscv_encoding.h.

◆ MISALIGNED_LOAD

#define MISALIGNED_LOAD   (1 << CAUSE_MISALIGNED_LOAD)

Definition at line 1118 of file riscv_encoding.h.

◆ MISALIGNED_STORE

#define MISALIGNED_STORE   (1 << CAUSE_MISALIGNED_STORE)

Definition at line 1120 of file riscv_encoding.h.

◆ MMISC_CTL_BPU

#define MMISC_CTL_BPU   (1<<3)

Definition at line 267 of file riscv_encoding.h.

◆ MMISC_CTL_CODE_BUS_ERR

#define MMISC_CTL_CODE_BUS_ERR   (1<<8)

Definition at line 264 of file riscv_encoding.h.

◆ MMISC_CTL_IMRETURN_ENABLE

#define MMISC_CTL_IMRETURN_ENABLE   (1<<10)

Definition at line 262 of file riscv_encoding.h.

◆ MMISC_CTL_LDSPEC_ENABLE

#define MMISC_CTL_LDSPEC_ENABLE   (1<<12)

Definition at line 260 of file riscv_encoding.h.

◆ MMISC_CTL_MISALIGN

#define MMISC_CTL_MISALIGN   (1<<6)

Definition at line 265 of file riscv_encoding.h.

◆ MMISC_CTL_NMI_CAUSE_FFF

#define MMISC_CTL_NMI_CAUSE_FFF   (1<<9)

Definition at line 263 of file riscv_encoding.h.

◆ MMISC_CTL_SIJUMP_ENABLE

#define MMISC_CTL_SIJUMP_ENABLE   (1<<11)

Definition at line 261 of file riscv_encoding.h.

◆ MMISC_CTL_ZC

#define MMISC_CTL_ZC   (1<<7)

Definition at line 266 of file riscv_encoding.h.

◆ MPPICFG_INFO_PPI_BPA

#define MPPICFG_INFO_PPI_BPA   (((1ULL<<((__riscv_xlen)-10))-1)<<10)

Definition at line 329 of file riscv_encoding.h.

◆ MPPICFG_INFO_PPI_SIZE

#define MPPICFG_INFO_PPI_SIZE   (0x1F<<1)

Definition at line 328 of file riscv_encoding.h.

◆ MSTACK_CTRL_MODE

#define MSTACK_CTRL_MODE   (0x1<<2)

Definition at line 356 of file riscv_encoding.h.

◆ MSTACK_CTRL_OVF_TRACK_EN

#define MSTACK_CTRL_OVF_TRACK_EN   (0x1)

Definition at line 358 of file riscv_encoding.h.

◆ MSTACK_CTRL_UDF_EN

#define MSTACK_CTRL_UDF_EN   (0x1<<1)

Definition at line 357 of file riscv_encoding.h.

◆ MSTATUS32_SD

#define MSTATUS32_SD   0x80000000

Definition at line 56 of file riscv_encoding.h.

◆ MSTATUS64_SD

#define MSTATUS64_SD   0x8000000000000000

Definition at line 63 of file riscv_encoding.h.

◆ MSTATUS_FS

#define MSTATUS_FS   0x00006000

Definition at line 48 of file riscv_encoding.h.

◆ MSTATUS_FS_CLEAN

#define MSTATUS_FS_CLEAN   0x00004000

Definition at line 66 of file riscv_encoding.h.

◆ MSTATUS_FS_DIRTY

#define MSTATUS_FS_DIRTY   0x00006000

Definition at line 67 of file riscv_encoding.h.

◆ MSTATUS_FS_INITIAL

#define MSTATUS_FS_INITIAL   0x00002000

Definition at line 65 of file riscv_encoding.h.

◆ MSTATUS_GVA

#define MSTATUS_GVA   0x0000004000000000

Definition at line 61 of file riscv_encoding.h.

◆ MSTATUS_HIE

#define MSTATUS_HIE   0x00000004

Definition at line 39 of file riscv_encoding.h.

◆ MSTATUS_MBE

#define MSTATUS_MBE   0x0000002000000000

Definition at line 60 of file riscv_encoding.h.

◆ MSTATUS_MIE

#define MSTATUS_MIE   0x00000008

Definition at line 40 of file riscv_encoding.h.

◆ MSTATUS_MPIE

#define MSTATUS_MPIE   0x00000080

Definition at line 44 of file riscv_encoding.h.

◆ MSTATUS_MPP

#define MSTATUS_MPP   0x00001800

Definition at line 47 of file riscv_encoding.h.

◆ MSTATUS_MPRV

#define MSTATUS_MPRV   0x00020000

Definition at line 50 of file riscv_encoding.h.

◆ MSTATUS_MPV

#define MSTATUS_MPV   0x0000008000000000

Definition at line 62 of file riscv_encoding.h.

◆ MSTATUS_MXR

#define MSTATUS_MXR   0x00080000

Definition at line 52 of file riscv_encoding.h.

◆ MSTATUS_SBE

#define MSTATUS_SBE   0x0000001000000000

Definition at line 59 of file riscv_encoding.h.

◆ MSTATUS_SIE

#define MSTATUS_SIE   0x00000002

Definition at line 38 of file riscv_encoding.h.

◆ MSTATUS_SPIE

#define MSTATUS_SPIE   0x00000020

Definition at line 42 of file riscv_encoding.h.

◆ MSTATUS_SPP

#define MSTATUS_SPP   0x00000100

Definition at line 45 of file riscv_encoding.h.

◆ MSTATUS_SUM

#define MSTATUS_SUM   0x00040000

Definition at line 51 of file riscv_encoding.h.

◆ MSTATUS_SXL

#define MSTATUS_SXL   0x0000000C00000000

Definition at line 58 of file riscv_encoding.h.

◆ MSTATUS_TSR

#define MSTATUS_TSR   0x00400000

Definition at line 55 of file riscv_encoding.h.

◆ MSTATUS_TVM

#define MSTATUS_TVM   0x00100000

Definition at line 53 of file riscv_encoding.h.

◆ MSTATUS_TW

#define MSTATUS_TW   0x00200000

Definition at line 54 of file riscv_encoding.h.

◆ MSTATUS_UBE

#define MSTATUS_UBE   0x00000040

Definition at line 43 of file riscv_encoding.h.

◆ MSTATUS_UIE

#define MSTATUS_UIE   0x00000001

Definition at line 37 of file riscv_encoding.h.

◆ MSTATUS_UPIE

#define MSTATUS_UPIE   0x00000010

Definition at line 41 of file riscv_encoding.h.

◆ MSTATUS_UXL

#define MSTATUS_UXL   0x0000000300000000

Definition at line 57 of file riscv_encoding.h.

◆ MSTATUS_VS

#define MSTATUS_VS   0x00000600

Definition at line 46 of file riscv_encoding.h.

◆ MSTATUS_VS_CLEAN

#define MSTATUS_VS_CLEAN   0x00000400

Definition at line 70 of file riscv_encoding.h.

◆ MSTATUS_VS_DIRTY

#define MSTATUS_VS_DIRTY   0x00000600

Definition at line 71 of file riscv_encoding.h.

◆ MSTATUS_VS_INITIAL

#define MSTATUS_VS_INITIAL   0x00000200

Definition at line 69 of file riscv_encoding.h.

◆ MSTATUS_XS

#define MSTATUS_XS   0x00018000

Definition at line 49 of file riscv_encoding.h.

◆ MSTATUSH_GVA

#define MSTATUSH_GVA   0x00000040

Definition at line 75 of file riscv_encoding.h.

◆ MSTATUSH_MBE

#define MSTATUSH_MBE   0x00000020

Definition at line 74 of file riscv_encoding.h.

◆ MSTATUSH_MPV

#define MSTATUSH_MPV   0x00000080

Definition at line 76 of file riscv_encoding.h.

◆ MSTATUSH_SBE

#define MSTATUSH_SBE   0x00000010

Definition at line 73 of file riscv_encoding.h.

◆ MSUBM_PTYP

#define MSUBM_PTYP   (0x3<<8)

Definition at line 255 of file riscv_encoding.h.

◆ MSUBM_TYP

#define MSUBM_TYP   (0x3<<6)

Definition at line 256 of file riscv_encoding.h.

◆ MTVT2_COMMON_CODE_ENTRY

#define MTVT2_COMMON_CODE_ENTRY   (((1ULL<<((__riscv_xlen)-2))-1)<<2)

Definition at line 290 of file riscv_encoding.h.

◆ MTVT2_MTVT2EN

#define MTVT2_MTVT2EN   (1<<0)

Definition at line 289 of file riscv_encoding.h.

◆ PMP_A

#define PMP_A   0x18

Definition at line 438 of file riscv_encoding.h.

◆ PMP_A_NA4

#define PMP_A_NA4   0x10

Definition at line 440 of file riscv_encoding.h.

◆ PMP_A_NAPOT

#define PMP_A_NAPOT   0x18

Definition at line 441 of file riscv_encoding.h.

◆ PMP_A_TOR

#define PMP_A_TOR   0x08

Definition at line 439 of file riscv_encoding.h.

◆ PMP_COUNT

#define PMP_COUNT   16

Definition at line 445 of file riscv_encoding.h.

◆ PMP_L

#define PMP_L   0x80

Definition at line 442 of file riscv_encoding.h.

◆ PMP_R

#define PMP_R   0x01

Definition at line 435 of file riscv_encoding.h.

◆ PMP_SHIFT

#define PMP_SHIFT   2

Definition at line 444 of file riscv_encoding.h.

◆ PMP_W

#define PMP_W   0x02

Definition at line 436 of file riscv_encoding.h.

◆ PMP_X

#define PMP_X   0x04

Definition at line 437 of file riscv_encoding.h.

◆ PRV_H

#define PRV_H   2

Definition at line 365 of file riscv_encoding.h.

◆ PRV_M

#define PRV_M   3

Definition at line 366 of file riscv_encoding.h.

◆ PRV_S

#define PRV_S   1

Definition at line 364 of file riscv_encoding.h.

◆ PRV_U

#define PRV_U   0

Definition at line 363 of file riscv_encoding.h.

◆ PTE_A

#define PTE_A   0x040

Definition at line 480 of file riscv_encoding.h.

◆ PTE_D

#define PTE_D   0x080

Definition at line 481 of file riscv_encoding.h.

◆ PTE_G

#define PTE_G   0x020

Definition at line 479 of file riscv_encoding.h.

◆ PTE_PPN_SHIFT

#define PTE_PPN_SHIFT   10

Definition at line 484 of file riscv_encoding.h.

◆ PTE_R

#define PTE_R   0x002

Definition at line 475 of file riscv_encoding.h.

◆ PTE_SOFT

#define PTE_SOFT   0x300

Definition at line 482 of file riscv_encoding.h.

◆ PTE_TABLE

#define PTE_TABLE (   PTE)    (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)

Definition at line 486 of file riscv_encoding.h.

◆ PTE_U

#define PTE_U   0x010

Definition at line 478 of file riscv_encoding.h.

◆ PTE_V

#define PTE_V   0x001

Definition at line 474 of file riscv_encoding.h.

◆ PTE_W

#define PTE_W   0x004

Definition at line 476 of file riscv_encoding.h.

◆ PTE_X

#define PTE_X   0x008

Definition at line 477 of file riscv_encoding.h.

◆ SATP32_ASID

#define SATP32_ASID   0x7FC00000

Definition at line 376 of file riscv_encoding.h.

◆ SATP32_MODE

#define SATP32_MODE   0x80000000

Definition at line 375 of file riscv_encoding.h.

◆ SATP32_PPN

#define SATP32_PPN   0x003FFFFF

Definition at line 377 of file riscv_encoding.h.

◆ SATP64_ASID

#define SATP64_ASID   0x0FFFF00000000000

Definition at line 379 of file riscv_encoding.h.

◆ SATP64_MODE

#define SATP64_MODE   0xF000000000000000

Definition at line 378 of file riscv_encoding.h.

◆ SATP64_PPN

#define SATP64_PPN   0x00000FFFFFFFFFFF

Definition at line 380 of file riscv_encoding.h.

◆ SATP_MODE_OFF

#define SATP_MODE_OFF   0

Definition at line 382 of file riscv_encoding.h.

◆ SATP_MODE_SV32

#define SATP_MODE_SV32   1

Definition at line 383 of file riscv_encoding.h.

◆ SATP_MODE_SV39

#define SATP_MODE_SV39   8

Definition at line 384 of file riscv_encoding.h.

◆ SATP_MODE_SV48

#define SATP_MODE_SV48   9

Definition at line 385 of file riscv_encoding.h.

◆ SATP_MODE_SV57

#define SATP_MODE_SV57   10

Definition at line 386 of file riscv_encoding.h.

◆ SATP_MODE_SV64

#define SATP_MODE_SV64   11

Definition at line 387 of file riscv_encoding.h.

◆ SCAUSE_CAUSE

#define SCAUSE_CAUSE   0x000003FFUL

Definition at line 182 of file riscv_encoding.h.

◆ SCAUSE_INTR

#define SCAUSE_INTR   MCAUSE_INTR

Definition at line 181 of file riscv_encoding.h.

◆ SENVCFG_CBCFE

#define SENVCFG_CBCFE   0x00000040

Definition at line 212 of file riscv_encoding.h.

◆ SENVCFG_CBIE

#define SENVCFG_CBIE   0x00000030

Definition at line 211 of file riscv_encoding.h.

◆ SENVCFG_CBIE_EN

#define SENVCFG_CBIE_EN   (0x11 << 4)

Definition at line 187 of file riscv_encoding.h.

◆ SENVCFG_CBIE_FLUSH

#define SENVCFG_CBIE_FLUSH   (0x01 << 4)

Definition at line 188 of file riscv_encoding.h.

◆ SENVCFG_CBIE_INVAL

#define SENVCFG_CBIE_INVAL   (0x11 << 4)

Definition at line 189 of file riscv_encoding.h.

◆ SENVCFG_CBZE

#define SENVCFG_CBZE   0x00000080

Definition at line 213 of file riscv_encoding.h.

◆ SENVCFG_FIOM

#define SENVCFG_FIOM   0x00000001

Definition at line 208 of file riscv_encoding.h.

◆ SENVCFG_LPE

#define SENVCFG_LPE   0x00000004

Definition at line 209 of file riscv_encoding.h.

◆ SENVCFG_PMM

#define SENVCFG_PMM   0x0000000300000000

Definition at line 214 of file riscv_encoding.h.

◆ SENVCFG_SSE

#define SENVCFG_SSE   0x00000008

Definition at line 210 of file riscv_encoding.h.

◆ SIE_SEIE

#define SIE_SEIE   MIP_SEIP

Definition at line 177 of file riscv_encoding.h.

◆ SIE_SSIE

#define SIE_SSIE   MIP_SSIP

Definition at line 175 of file riscv_encoding.h.

◆ SIE_STIE

#define SIE_STIE   MIP_STIP

Definition at line 176 of file riscv_encoding.h.

◆ SIP_SEIP

#define SIP_SEIP   MIP_SEIP

Definition at line 173 of file riscv_encoding.h.

◆ SIP_SSIP [1/2]

#define SIP_SSIP   MIP_SSIP

Definition at line 360 of file riscv_encoding.h.

◆ SIP_SSIP [2/2]

#define SIP_SSIP   MIP_SSIP

Definition at line 360 of file riscv_encoding.h.

◆ SIP_STIP [1/2]

#define SIP_STIP   MIP_STIP

Definition at line 361 of file riscv_encoding.h.

◆ SIP_STIP [2/2]

#define SIP_STIP   MIP_STIP

Definition at line 361 of file riscv_encoding.h.

◆ SLEEPVALUE_SLEEPVALUE

#define SLEEPVALUE_SLEEPVALUE   (0x1)

Definition at line 226 of file riscv_encoding.h.

◆ SMPU_A

#define SMPU_A   SPMP_A

Definition at line 465 of file riscv_encoding.h.

◆ SMPU_A_NA4

#define SMPU_A_NA4   SPMP_A_NA4

Definition at line 467 of file riscv_encoding.h.

◆ SMPU_A_NAPOT

#define SMPU_A_NAPOT   SPMP_A_NAPOT

Definition at line 468 of file riscv_encoding.h.

◆ SMPU_A_TOR

#define SMPU_A_TOR   SPMP_A_TOR

Definition at line 466 of file riscv_encoding.h.

◆ SMPU_R

#define SMPU_R   SPMP_R

Definition at line 462 of file riscv_encoding.h.

◆ SMPU_S

#define SMPU_S   0x80

Definition at line 469 of file riscv_encoding.h.

◆ SMPU_SHIFT

#define SMPU_SHIFT   PMP_SHIFT

Definition at line 471 of file riscv_encoding.h.

◆ SMPU_W

#define SMPU_W   SPMP_W

Definition at line 463 of file riscv_encoding.h.

◆ SMPU_X

#define SMPU_X   SPMP_X

Definition at line 464 of file riscv_encoding.h.

◆ SPMP_A

#define SPMP_A   PMP_A

Definition at line 451 of file riscv_encoding.h.

◆ SPMP_A_NA4

#define SPMP_A_NA4   PMP_A_NA4

Definition at line 453 of file riscv_encoding.h.

◆ SPMP_A_NAPOT

#define SPMP_A_NAPOT   PMP_A_NAPOT

Definition at line 454 of file riscv_encoding.h.

◆ SPMP_A_TOR

#define SPMP_A_TOR   PMP_A_TOR

Definition at line 452 of file riscv_encoding.h.

◆ SPMP_COUNT

#define SPMP_COUNT   16

Definition at line 459 of file riscv_encoding.h.

◆ SPMP_L

#define SPMP_L   PMP_L

Definition at line 456 of file riscv_encoding.h.

◆ SPMP_R

#define SPMP_R   PMP_R

Definition at line 448 of file riscv_encoding.h.

◆ SPMP_SHIFT

#define SPMP_SHIFT   PMP_SHIFT

Definition at line 458 of file riscv_encoding.h.

◆ SPMP_U

#define SPMP_U   0x40

Definition at line 455 of file riscv_encoding.h.

◆ SPMP_W

#define SPMP_W   PMP_W

Definition at line 449 of file riscv_encoding.h.

◆ SPMP_X

#define SPMP_X   PMP_X

Definition at line 450 of file riscv_encoding.h.

◆ SSTATUS32_SD

#define SSTATUS32_SD   0x80000000

Definition at line 89 of file riscv_encoding.h.

◆ SSTATUS64_SD

#define SSTATUS64_SD   0x8000000000000000

Definition at line 91 of file riscv_encoding.h.

◆ SSTATUS_FS

#define SSTATUS_FS   0x00006000

Definition at line 85 of file riscv_encoding.h.

◆ SSTATUS_MXR

#define SSTATUS_MXR   0x00080000

Definition at line 88 of file riscv_encoding.h.

◆ SSTATUS_SIE

#define SSTATUS_SIE   0x00000002

Definition at line 79 of file riscv_encoding.h.

◆ SSTATUS_SPIE

#define SSTATUS_SPIE   0x00000020

Definition at line 81 of file riscv_encoding.h.

◆ SSTATUS_SPP

#define SSTATUS_SPP   0x00000100

Definition at line 83 of file riscv_encoding.h.

◆ SSTATUS_SUM

#define SSTATUS_SUM   0x00040000

Definition at line 87 of file riscv_encoding.h.

◆ SSTATUS_UBE

#define SSTATUS_UBE   0x00000040

Definition at line 82 of file riscv_encoding.h.

◆ SSTATUS_UIE

#define SSTATUS_UIE   0x00000001

Definition at line 78 of file riscv_encoding.h.

◆ SSTATUS_UPIE

#define SSTATUS_UPIE   0x00000010

Definition at line 80 of file riscv_encoding.h.

◆ SSTATUS_UXL

#define SSTATUS_UXL   0x0000000300000000

Definition at line 90 of file riscv_encoding.h.

◆ SSTATUS_VS

#define SSTATUS_VS   0x00000600

Definition at line 84 of file riscv_encoding.h.

◆ SSTATUS_XS

#define SSTATUS_XS   0x00018000

Definition at line 86 of file riscv_encoding.h.

◆ STORE_PAGE_FAULT

#define STORE_PAGE_FAULT   (1 << CAUSE_STORE_PAGE_FAULT)

Definition at line 1125 of file riscv_encoding.h.

◆ TXEVT_TXEVT

#define TXEVT_TXEVT   (0x1)

Definition at line 225 of file riscv_encoding.h.

◆ UCODE_OV

#define UCODE_OV   (0x1)

Definition at line 218 of file riscv_encoding.h.

◆ USER_ECALL

#define USER_ECALL   (1 << CAUSE_USER_ECALL)

Definition at line 1122 of file riscv_encoding.h.

◆ USTATUS_UIE

#define USTATUS_UIE   0x00000001

Definition at line 93 of file riscv_encoding.h.

◆ USTATUS_UPIE

#define USTATUS_UPIE   0x00000010

Definition at line 94 of file riscv_encoding.h.

◆ VM_MBARE

#define VM_MBARE   0

Definition at line 368 of file riscv_encoding.h.

◆ VM_MBB

#define VM_MBB   1

Definition at line 369 of file riscv_encoding.h.

◆ VM_MBBID

#define VM_MBBID   2

Definition at line 370 of file riscv_encoding.h.

◆ VM_SV32

#define VM_SV32   8

Definition at line 371 of file riscv_encoding.h.

◆ VM_SV39

#define VM_SV39   9

Definition at line 372 of file riscv_encoding.h.

◆ VM_SV48

#define VM_SV48   10

Definition at line 373 of file riscv_encoding.h.

◆ WFE_WFE

#define WFE_WFE   (0x1)

Definition at line 224 of file riscv_encoding.h.

◆ x_exc_entry

#define x_exc_entry   exc_entry

Definition at line 1191 of file riscv_encoding.h.

◆ x_irq_entry

#define x_irq_entry   irq_entry

Definition at line 1192 of file riscv_encoding.h.

◆ XRET

#define XRET   mret

Definition at line 1187 of file riscv_encoding.h.

◆ XSTATUS_XIE

#define XSTATUS_XIE   MSTATUS_MIE

Definition at line 1190 of file riscv_encoding.h.