NMSIS-Core
Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
riscv_encoding.h
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/*
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* Copyright (c) 2019 Nuclei Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __RISCV_ENCODING_H__
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#define __RISCV_ENCODING_H__
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#include "riscv_bits.h"
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/* === Standard CSR bit mask === */
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#define MSTATUS_UIE 0x00000001
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#define MSTATUS_SIE 0x00000002
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#define MSTATUS_HIE 0x00000004
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#define MSTATUS_MIE 0x00000008
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#define MSTATUS_UPIE 0x00000010
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#define MSTATUS_SPIE 0x00000020
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#define MSTATUS_UBE 0x00000040
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#define MSTATUS_MPIE 0x00000080
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#define MSTATUS_SPP 0x00000100
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#define MSTATUS_VS 0x00000600
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#define MSTATUS_MPP 0x00001800
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#define MSTATUS_FS 0x00006000
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#define MSTATUS_XS 0x00018000
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#define MSTATUS_MPRV 0x00020000
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#define MSTATUS_SUM 0x00040000
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#define MSTATUS_MXR 0x00080000
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#define MSTATUS_TVM 0x00100000
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#define MSTATUS_TW 0x00200000
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#define MSTATUS_TSR 0x00400000
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#define MSTATUS32_SD 0x80000000
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#define MSTATUS_UXL 0x0000000300000000
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#define MSTATUS_SXL 0x0000000C00000000
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#define MSTATUS_SBE 0x0000001000000000
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#define MSTATUS_MBE 0x0000002000000000
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#define MSTATUS_GVA 0x0000004000000000
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#define MSTATUS_MPV 0x0000008000000000
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#define MSTATUS64_SD 0x8000000000000000
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#define MSTATUS_FS_INITIAL 0x00002000
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#define MSTATUS_FS_CLEAN 0x00004000
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#define MSTATUS_FS_DIRTY 0x00006000
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#define MSTATUS_VS_INITIAL 0x00000200
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#define MSTATUS_VS_CLEAN 0x00000400
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#define MSTATUS_VS_DIRTY 0x00000600
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#define MSTATUSH_SBE 0x00000010
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#define MSTATUSH_MBE 0x00000020
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#define MSTATUSH_GVA 0x00000040
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#define MSTATUSH_MPV 0x00000080
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#define SSTATUS_UIE 0x00000001
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#define SSTATUS_SIE 0x00000002
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#define SSTATUS_UPIE 0x00000010
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#define SSTATUS_SPIE 0x00000020
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#define SSTATUS_UBE 0x00000040
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#define SSTATUS_SPP 0x00000100
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#define SSTATUS_VS 0x00000600
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#define SSTATUS_FS 0x00006000
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#define SSTATUS_XS 0x00018000
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#define SSTATUS_SUM 0x00040000
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#define SSTATUS_MXR 0x00080000
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#define SSTATUS32_SD 0x80000000
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#define SSTATUS_UXL 0x0000000300000000
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#define SSTATUS64_SD 0x8000000000000000
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#define USTATUS_UIE 0x00000001
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#define USTATUS_UPIE 0x00000010
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#define DCSR_XDEBUGVER (3U<<30)
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#define DCSR_NDRESET (1<<29)
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#define DCSR_FULLRESET (1<<28)
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#define DCSR_EBREAKM (1<<15)
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#define DCSR_EBREAKH (1<<14)
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#define DCSR_EBREAKS (1<<13)
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#define DCSR_EBREAKU (1<<12)
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#define DCSR_STOPCYCLE (1<<10)
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#define DCSR_STOPTIME (1<<9)
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#define DCSR_CAUSE (7<<6)
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#define DCSR_DEBUGINT (1<<5)
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#define DCSR_HALT (1<<3)
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#define DCSR_STEP (1<<2)
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#define DCSR_PRV (3<<0)
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#define DCSR_CAUSE_NONE 0
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#define DCSR_CAUSE_SWBP 1
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#define DCSR_CAUSE_HWBP 2
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#define DCSR_CAUSE_DEBUGINT 3
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#define DCSR_CAUSE_STEP 4
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#define DCSR_CAUSE_HALT 5
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#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4))
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#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5))
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#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
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#define MCONTROL_SELECT (1<<19)
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#define MCONTROL_TIMING (1<<18)
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#define MCONTROL_ACTION (0x3f<<12)
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#define MCONTROL_CHAIN (1<<11)
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#define MCONTROL_MATCH (0xf<<7)
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#define MCONTROL_M (1<<6)
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#define MCONTROL_H (1<<5)
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#define MCONTROL_S (1<<4)
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#define MCONTROL_U (1<<3)
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#define MCONTROL_EXECUTE (1<<2)
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#define MCONTROL_STORE (1<<1)
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#define MCONTROL_LOAD (1<<0)
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#define MCONTROL_TYPE_NONE 0
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#define MCONTROL_TYPE_MATCH 2
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#define MCONTROL_ACTION_DEBUG_EXCEPTION 0
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#define MCONTROL_ACTION_DEBUG_MODE 1
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#define MCONTROL_ACTION_TRACE_START 2
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#define MCONTROL_ACTION_TRACE_STOP 3
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#define MCONTROL_ACTION_TRACE_EMIT 4
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#define MCONTROL_MATCH_EQUAL 0
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#define MCONTROL_MATCH_NAPOT 1
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#define MCONTROL_MATCH_GE 2
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#define MCONTROL_MATCH_LT 3
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#define MCONTROL_MATCH_MASK_LOW 4
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#define MCONTROL_MATCH_MASK_HIGH 5
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#define MIP_SSIP (1 << IRQ_S_SOFT)
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#define MIP_HSIP (1 << IRQ_H_SOFT)
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#define MIP_MSIP (1 << IRQ_M_SOFT)
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#define MIP_STIP (1 << IRQ_S_TIMER)
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#define MIP_HTIP (1 << IRQ_H_TIMER)
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#define MIP_MTIP (1 << IRQ_M_TIMER)
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#define MIP_SEIP (1 << IRQ_S_EXT)
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#define MIP_HEIP (1 << IRQ_H_EXT)
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#define MIP_MEIP (1 << IRQ_M_EXT)
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#define MIE_SSIE MIP_SSIP
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#define MIE_HSIE MIP_HSIP
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#define MIE_MSIE MIP_MSIP
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#define MIE_STIE MIP_STIP
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#define MIE_HTIE MIP_HTIP
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#define MIE_MTIE MIP_MTIP
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#define MIE_SEIE MIP_SEIP
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#define MIE_HEIE MIP_HEIP
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#define MIE_MEIE MIP_MEIP
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#define MCAUSE_INTR (1ULL << (__riscv_xlen - 1))
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#define MCAUSE_CAUSE 0x00000FFFUL
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#define SCAUSE_INTR MCAUSE_INTR
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#define SCAUSE_CAUSE 0x000003FFUL
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#define MENVCFG_CBIE_EN (0x11 << 4)
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#define MENVCFG_CBIE_FLUSH (0x01 << 4)
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#define MENVCFG_CBIE_INVAL (0x11 << 4)
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#define MENVCFG_CBCFE (0x1 << 6)
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#define MENVCFG_CBZE (0x1 << 7)
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#define SENVCFG_CBIE_EN (0x11 << 4)
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#define SENVCFG_CBIE_FLUSH (0x01 << 4)
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#define SENVCFG_CBIE_INVAL (0x11 << 4)
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#define SENVCFG_CBCFE (0x1 << 6)
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#define SENVCFG_CBZE (0x1 << 7)
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/* === P-ext CSR bit mask === */
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#define UCODE_OV (0x1)
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/* === Nuclei custom CSR bit mask === */
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#define CSR_MCACHE_CTL_IE 0x00000001
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#define CSR_MCACHE_CTL_DE 0x00010000
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#define WFE_WFE (0x1)
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#define TXEVT_TXEVT (0x1)
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#define SLEEPVALUE_SLEEPVALUE (0x1)
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#define MCOUNTINHIBIT_IR (1<<2)
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#define MCOUNTINHIBIT_CY (1<<0)
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#define MILM_CTL_ILM_BPA (((1ULL<<((__riscv_xlen)-10))-1)<<10)
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#define MILM_CTL_ILM_RWECC (1<<3)
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#define MILM_CTL_ILM_ECC_EXCP_EN (1<<2)
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#define MILM_CTL_ILM_ECC_EN (1<<1)
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#define MILM_CTL_ILM_EN (1<<0)
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#define MDLM_CTL_DLM_BPA (((1ULL<<((__riscv_xlen)-10))-1)<<10)
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#define MDLM_CTL_DLM_RWECC (1<<3)
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#define MDLM_CTL_DLM_ECC_EXCP_EN (1<<2)
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#define MDLM_CTL_DLM_ECC_EN (1<<1)
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#define MDLM_CTL_DLM_EN (1<<0)
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#define MSUBM_PTYP (0x3<<8)
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#define MSUBM_TYP (0x3<<6)
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#define MDCAUSE_MDCAUSE (0x3)
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#define MMISC_CTL_LDSPEC_ENABLE (1<<12)
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#define MMISC_CTL_SIJUMP_ENABLE (1<<11)
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#define MMISC_CTL_IMRETURN_ENABLE (1<<10)
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#define MMISC_CTL_NMI_CAUSE_FFF (1<<9)
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#define MMISC_CTL_CODE_BUS_ERR (1<<8)
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#define MMISC_CTL_MISALIGN (1<<6)
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#define MMISC_CTL_ZC (1<<7)
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#define MMISC_CTL_BPU (1<<3)
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#define MCACHE_CTL_IC_EN (1<<0)
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#define MCACHE_CTL_IC_SCPD_MOD (1<<1)
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#define MCACHE_CTL_IC_ECC_EN (1<<2)
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#define MCACHE_CTL_IC_ECC_EXCP_EN (1<<3)
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#define MCACHE_CTL_IC_RWTECC (1<<4)
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#define MCACHE_CTL_IC_RWDECC (1<<5)
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#define MCACHE_CTL_IC_PF_EN (1<<6)
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#define MCACHE_CTL_IC_CANCEL_EN (1<<7)
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#define MCACHE_CTL_DC_EN (1<<16)
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#define MCACHE_CTL_DC_ECC_EN (1<<17)
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#define MCACHE_CTL_DC_ECC_EXCP_EN (1<<18)
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#define MCACHE_CTL_DC_RWTECC (1<<19)
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#define MCACHE_CTL_DC_RWDECC (1<<20)
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#define MTVT2_MTVT2EN (1<<0)
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#define MTVT2_COMMON_CODE_ENTRY (((1ULL<<((__riscv_xlen)-2))-1)<<2)
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#define MCFG_INFO_TEE (1<<0)
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#define MCFG_INFO_ECC (1<<1)
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#define MCFG_INFO_CLIC (1<<2)
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#define MCFG_INFO_PLIC (1<<3)
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#define MCFG_INFO_FIO (1<<4)
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#define MCFG_INFO_PPI (1<<5)
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#define MCFG_INFO_NICE (1<<6)
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#define MCFG_INFO_ILM (1<<7)
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#define MCFG_INFO_DLM (1<<8)
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#define MCFG_INFO_ICACHE (1<<9)
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#define MCFG_INFO_DCACHE (1<<10)
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#define MCFG_INFO_SMP (1<<11)
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#define MCFG_INFO_DSP_N1 (1<<12)
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#define MCFG_INFO_DSP_N2 (1<<13)
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#define MCFG_INFO_DSP_N3 (1<<14)
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#define MCFG_INFO_IREGION_EXIST (1<<16)
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#define MCFG_INFO_VP (0x3<<17)
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#define MICFG_IC_SET (0xF<<0)
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#define MICFG_IC_WAY (0x7<<4)
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#define MICFG_IC_LSIZE (0x7<<7)
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#define MICFG_IC_ECC (0x1<<10)
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#define MICFG_ILM_SIZE (0x1F<<16)
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#define MICFG_ILM_XONLY (0x1<<21)
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#define MICFG_ILM_ECC (0x1<<22)
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#define MDCFG_DC_SET (0xF<<0)
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#define MDCFG_DC_WAY (0x7<<4)
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#define MDCFG_DC_LSIZE (0x7<<7)
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#define MDCFG_DC_ECC (0x1<<10)
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#define MDCFG_DLM_SIZE (0x1F<<16)
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#define MDCFG_DLM_ECC (0x1<<21)
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#define MIRGB_INFO_IRG_BASE_ADDR_BOFS (10)
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#define MIRGB_INFO_IREGION_SIZE_BOFS (1)
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#define MPPICFG_INFO_PPI_SIZE (0x1F<<1)
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#define MPPICFG_INFO_PPI_BPA (((1ULL<<((__riscv_xlen)-10))-1)<<10)
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#define MFIOCFG_INFO_FIO_SIZE (0x1F<<1)
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#define MFIOCFG_INFO_FIO_BPA (((1ULL<<((__riscv_xlen)-10))-1)<<10)
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#define MECC_LOCK_ECC_LOCK (0x1)
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#define MECC_CODE_CODE (0x1FF)
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#define MECC_CODE_RAMID (0x1F<<16)
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#define MECC_CODE_SRAMID (0x1F<<24)
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#define CCM_SUEN_SUEN (0x1<<0)
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#define CCM_DATA_DATA (0x7<<0)
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#define CCM_COMMAND_COMMAND (0x1F<<0)
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/* IREGION Offsets */
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#define IREGION_IINFO_OFS (0x0)
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#define IREGION_DEBUG_OFS (0x10000)
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#define IREGION_ECLIC_OFS (0x20000)
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#define IREGION_TIMER_OFS (0x30000)
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#define IREGION_SMP_OFS (0x40000)
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#define IREGION_IDU_OFS (0x50000)
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#define IREGION_PL2_OFS (0x60000)
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#define IREGION_DPREFETCH_OFS (0x70000)
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#define IREGION_PLIC_OFS (0x4000000)
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/* === Stack protect === */
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#define MSTACK_CTRL_MODE (0x1<<2)
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#define MSTACK_CTRL_UDF_EN (0x1<<1)
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#define MSTACK_CTRL_OVF_TRACK_EN (0x1)
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#define SIP_SSIP MIP_SSIP
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#define SIP_STIP MIP_STIP
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#define PRV_U 0
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#define PRV_S 1
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#define PRV_H 2
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#define PRV_M 3
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#define VM_MBARE 0
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#define VM_MBB 1
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#define VM_MBBID 2
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#define VM_SV32 8
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#define VM_SV39 9
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#define VM_SV48 10
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#define SATP32_MODE 0x80000000
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#define SATP32_ASID 0x7FC00000
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#define SATP32_PPN 0x003FFFFF
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#define SATP64_MODE 0xF000000000000000
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#define SATP64_ASID 0x0FFFF00000000000
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#define SATP64_PPN 0x00000FFFFFFFFFFF
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#define SATP_MODE_OFF 0
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#define SATP_MODE_SV32 1
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#define SATP_MODE_SV39 8
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#define SATP_MODE_SV48 9
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#define SATP_MODE_SV57 10
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#define SATP_MODE_SV64 11
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#define IRQ_S_SOFT 1
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#define IRQ_H_SOFT 2
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#define IRQ_M_SOFT 3
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#define IRQ_S_TIMER 5
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#define IRQ_H_TIMER 6
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#define IRQ_M_TIMER 7
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#define IRQ_S_EXT 9
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#define IRQ_H_EXT 10
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#define IRQ_M_EXT 11
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#define IRQ_COP 12
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#define IRQ_HOST 13
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/* === FPU FRM Rounding Mode === */
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#define FRM_RNDMODE_RNE 0x0
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#define FRM_RNDMODE_RTZ 0x1
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#define FRM_RNDMODE_RDN 0x2
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#define FRM_RNDMODE_RUP 0x3
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#define FRM_RNDMODE_RMM 0x4
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#define FRM_RNDMODE_DYN 0x7
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/* === FPU FFLAGS Accrued Exceptions === */
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#define FFLAGS_AE_NX (1<<0)
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#define FFLAGS_AE_UF (1<<1)
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#define FFLAGS_AE_OF (1<<2)
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#define FFLAGS_AE_DZ (1<<3)
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#define FFLAGS_AE_NV (1<<4)
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#define FREG(idx) f##idx
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/* === PMP CFG Bits === */
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#define PMP_R 0x01
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#define PMP_W 0x02
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#define PMP_X 0x04
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#define PMP_A 0x18
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#define PMP_A_TOR 0x08
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#define PMP_A_NA4 0x10
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#define PMP_A_NAPOT 0x18
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#define PMP_L 0x80
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#define PMP_SHIFT 2
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#define PMP_COUNT 16
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/* === sPMP CFG Bits === */
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#define SPMP_R PMP_R
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#define SPMP_W PMP_W
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#define SPMP_X PMP_X
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#define SPMP_A PMP_A
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#define SPMP_A_TOR PMP_A_TOR
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#define SPMP_A_NA4 PMP_A_NA4
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#define SPMP_A_NAPOT PMP_A_NAPOT
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#define SPMP_U 0x40
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#define SPMP_L PMP_L
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#define SPMP_SHIFT PMP_SHIFT
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#define SPMP_COUNT 16
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// page table entry (PTE) fields
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#define PTE_V 0x001 // Valid
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#define PTE_R 0x002 // Read
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#define PTE_W 0x004 // Write
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#define PTE_X 0x008 // Execute
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#define PTE_U 0x010 // User
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#define PTE_G 0x020 // Global
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#define PTE_A 0x040 // Accessed
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#define PTE_D 0x080 // Dirty
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#define PTE_SOFT 0x300 // Reserved for Software
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#define PTE_PPN_SHIFT 10
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#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
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#ifdef __riscv
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#ifdef __riscv64
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# define MSTATUS_SD MSTATUS64_SD
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# define SSTATUS_SD SSTATUS64_SD
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# define RISCV_PGLEVEL_BITS 9
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#else
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# define MSTATUS_SD MSTATUS32_SD
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# define SSTATUS_SD SSTATUS32_SD
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# define RISCV_PGLEVEL_BITS 10
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#endif
/* __riscv64 */
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#define RISCV_PGSHIFT 12
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#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
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#endif
/* __riscv */
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/* === Standard RISC-V CSR Registers === */
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#define CSR_USTATUS 0x0
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#define CSR_FFLAGS 0x1
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#define CSR_FRM 0x2
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#define CSR_FCSR 0x3
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#define CSR_VSTART 0x8
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#define CSR_VXSAT 0x9
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#define CSR_VXRM 0xa
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#define CSR_VCSR 0xf
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#define CSR_SEED 0x15
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#define CSR_JVT 0x17
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#define CSR_CYCLE 0xc00
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#define CSR_TIME 0xc01
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#define CSR_INSTRET 0xc02
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#define CSR_HPMCOUNTER3 0xc03
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#define CSR_HPMCOUNTER4 0xc04
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#define CSR_HPMCOUNTER5 0xc05
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#define CSR_HPMCOUNTER6 0xc06
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#define CSR_HPMCOUNTER7 0xc07
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#define CSR_HPMCOUNTER8 0xc08
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#define CSR_HPMCOUNTER9 0xc09
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#define CSR_HPMCOUNTER10 0xc0a
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#define CSR_HPMCOUNTER11 0xc0b
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#define CSR_HPMCOUNTER12 0xc0c
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#define CSR_HPMCOUNTER13 0xc0d
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#define CSR_HPMCOUNTER14 0xc0e
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#define CSR_HPMCOUNTER15 0xc0f
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#define CSR_HPMCOUNTER16 0xc10
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#define CSR_HPMCOUNTER17 0xc11
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#define CSR_HPMCOUNTER18 0xc12
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#define CSR_HPMCOUNTER19 0xc13
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#define CSR_HPMCOUNTER20 0xc14
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#define CSR_HPMCOUNTER21 0xc15
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#define CSR_HPMCOUNTER22 0xc16
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#define CSR_HPMCOUNTER23 0xc17
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#define CSR_HPMCOUNTER24 0xc18
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#define CSR_HPMCOUNTER25 0xc19
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#define CSR_HPMCOUNTER26 0xc1a
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#define CSR_HPMCOUNTER27 0xc1b
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#define CSR_HPMCOUNTER28 0xc1c
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#define CSR_HPMCOUNTER29 0xc1d
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#define CSR_HPMCOUNTER30 0xc1e
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#define CSR_HPMCOUNTER31 0xc1f
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#define CSR_VL 0xc20
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#define CSR_VTYPE 0xc21
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#define CSR_VLENB 0xc22
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#define CSR_SSTATUS 0x100
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#define CSR_SEDELEG 0x102
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#define CSR_SIDELEG 0x103
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#define CSR_SIE 0x104
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#define CSR_STVEC 0x105
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#define CSR_STVT 0x107
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#define CSR_SCOUNTEREN 0x106
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#define CSR_SENVCFG 0x10a
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#define CSR_SSTATEEN0 0x10c
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#define CSR_SSTATEEN1 0x10d
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#define CSR_SSTATEEN2 0x10e
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#define CSR_SSTATEEN3 0x10f
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#define CSR_SSCRATCH 0x140
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#define CSR_SEPC 0x141
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#define CSR_SCAUSE 0x142
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#define CSR_STVAL 0x143
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#define CSR_SIP 0x144
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#define CSR_STIMECMP 0x14d
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#define CSR_SATP 0x180
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#define CSR_SCONTEXT 0x5a8
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#define CSR_VSSTATUS 0x200
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#define CSR_VSIE 0x204
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#define CSR_VSTVEC 0x205
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#define CSR_VSSCRATCH 0x240
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#define CSR_VSEPC 0x241
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#define CSR_VSCAUSE 0x242
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#define CSR_VSTVAL 0x243
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#define CSR_VSIP 0x244
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#define CSR_VSTIMECMP 0x24d
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#define CSR_VSATP 0x280
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#define CSR_HSTATUS 0x600
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#define CSR_HEDELEG 0x602
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#define CSR_HIDELEG 0x603
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#define CSR_HIE 0x604
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#define CSR_HTIMEDELTA 0x605
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#define CSR_HCOUNTEREN 0x606
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#define CSR_HGEIE 0x607
538
#define CSR_HENVCFG 0x60a
539
#define CSR_HSTATEEN0 0x60c
540
#define CSR_HSTATEEN1 0x60d
541
#define CSR_HSTATEEN2 0x60e
542
#define CSR_HSTATEEN3 0x60f
543
#define CSR_HTVAL 0x643
544
#define CSR_HIP 0x644
545
#define CSR_HVIP 0x645
546
#define CSR_HTINST 0x64a
547
#define CSR_HGATP 0x680
548
#define CSR_HCONTEXT 0x6a8
549
#define CSR_HGEIP 0xe12
550
#define CSR_SCOUNTOVF 0xda0
551
#define CSR_UTVT 0x7
552
#define CSR_UNXTI 0x45
553
#define CSR_UINTSTATUS 0x46
554
#define CSR_USCRATCHCSW 0x48
555
#define CSR_USCRATCHCSWL 0x49
556
#define CSR_STVT 0x107
557
#define CSR_SNXTI 0x145
558
#define CSR_SINTSTATUS 0x146
559
#define CSR_SSCRATCHCSW 0x148
560
#define CSR_SSCRATCHCSWL 0x149
561
#define CSR_MTVT 0x307
562
#define CSR_MNXTI 0x345
563
#define CSR_MINTSTATUS 0x346
564
#define CSR_MSCRATCHCSW 0x348
565
#define CSR_MSCRATCHCSWL 0x349
566
#define CSR_MSTATUS 0x300
567
#define CSR_MISA 0x301
568
#define CSR_MEDELEG 0x302
569
#define CSR_MIDELEG 0x303
570
#define CSR_MIE 0x304
571
#define CSR_MTVEC 0x305
572
#define CSR_MCOUNTEREN 0x306
573
#define CSR_MENVCFG 0x30a
574
#define CSR_MSTATEEN0 0x30c
575
#define CSR_MSTATEEN1 0x30d
576
#define CSR_MSTATEEN2 0x30e
577
#define CSR_MSTATEEN3 0x30f
578
#define CSR_MCOUNTINHIBIT 0x320
579
#define CSR_MSCRATCH 0x340
580
#define CSR_MEPC 0x341
581
#define CSR_MCAUSE 0x342
582
#define CSR_MTVAL 0x343
583
#define CSR_MBADADDR 0x343
584
#define CSR_MIP 0x344
585
#define CSR_MTINST 0x34a
586
#define CSR_MTVAL2 0x34b
587
#define CSR_PMPCFG0 0x3a0
588
#define CSR_PMPCFG1 0x3a1
589
#define CSR_PMPCFG2 0x3a2
590
#define CSR_PMPCFG3 0x3a3
591
#define CSR_PMPCFG4 0x3a4
592
#define CSR_PMPCFG5 0x3a5
593
#define CSR_PMPCFG6 0x3a6
594
#define CSR_PMPCFG7 0x3a7
595
#define CSR_PMPCFG8 0x3a8
596
#define CSR_PMPCFG9 0x3a9
597
#define CSR_PMPCFG10 0x3aa
598
#define CSR_PMPCFG11 0x3ab
599
#define CSR_PMPCFG12 0x3ac
600
#define CSR_PMPCFG13 0x3ad
601
#define CSR_PMPCFG14 0x3ae
602
#define CSR_PMPCFG15 0x3af
603
#define CSR_PMPADDR0 0x3b0
604
#define CSR_PMPADDR1 0x3b1
605
#define CSR_PMPADDR2 0x3b2
606
#define CSR_PMPADDR3 0x3b3
607
#define CSR_PMPADDR4 0x3b4
608
#define CSR_PMPADDR5 0x3b5
609
#define CSR_PMPADDR6 0x3b6
610
#define CSR_PMPADDR7 0x3b7
611
#define CSR_PMPADDR8 0x3b8
612
#define CSR_PMPADDR9 0x3b9
613
#define CSR_PMPADDR10 0x3ba
614
#define CSR_PMPADDR11 0x3bb
615
#define CSR_PMPADDR12 0x3bc
616
#define CSR_PMPADDR13 0x3bd
617
#define CSR_PMPADDR14 0x3be
618
#define CSR_PMPADDR15 0x3bf
619
#define CSR_PMPADDR16 0x3c0
620
#define CSR_PMPADDR17 0x3c1
621
#define CSR_PMPADDR18 0x3c2
622
#define CSR_PMPADDR19 0x3c3
623
#define CSR_PMPADDR20 0x3c4
624
#define CSR_PMPADDR21 0x3c5
625
#define CSR_PMPADDR22 0x3c6
626
#define CSR_PMPADDR23 0x3c7
627
#define CSR_PMPADDR24 0x3c8
628
#define CSR_PMPADDR25 0x3c9
629
#define CSR_PMPADDR26 0x3ca
630
#define CSR_PMPADDR27 0x3cb
631
#define CSR_PMPADDR28 0x3cc
632
#define CSR_PMPADDR29 0x3cd
633
#define CSR_PMPADDR30 0x3ce
634
#define CSR_PMPADDR31 0x3cf
635
#define CSR_PMPADDR32 0x3d0
636
#define CSR_PMPADDR33 0x3d1
637
#define CSR_PMPADDR34 0x3d2
638
#define CSR_PMPADDR35 0x3d3
639
#define CSR_PMPADDR36 0x3d4
640
#define CSR_PMPADDR37 0x3d5
641
#define CSR_PMPADDR38 0x3d6
642
#define CSR_PMPADDR39 0x3d7
643
#define CSR_PMPADDR40 0x3d8
644
#define CSR_PMPADDR41 0x3d9
645
#define CSR_PMPADDR42 0x3da
646
#define CSR_PMPADDR43 0x3db
647
#define CSR_PMPADDR44 0x3dc
648
#define CSR_PMPADDR45 0x3dd
649
#define CSR_PMPADDR46 0x3de
650
#define CSR_PMPADDR47 0x3df
651
#define CSR_PMPADDR48 0x3e0
652
#define CSR_PMPADDR49 0x3e1
653
#define CSR_PMPADDR50 0x3e2
654
#define CSR_PMPADDR51 0x3e3
655
#define CSR_PMPADDR52 0x3e4
656
#define CSR_PMPADDR53 0x3e5
657
#define CSR_PMPADDR54 0x3e6
658
#define CSR_PMPADDR55 0x3e7
659
#define CSR_PMPADDR56 0x3e8
660
#define CSR_PMPADDR57 0x3e9
661
#define CSR_PMPADDR58 0x3ea
662
#define CSR_PMPADDR59 0x3eb
663
#define CSR_PMPADDR60 0x3ec
664
#define CSR_PMPADDR61 0x3ed
665
#define CSR_PMPADDR62 0x3ee
666
#define CSR_PMPADDR63 0x3ef
667
#define CSR_MSECCFG 0x747
668
#define CSR_TSELECT 0x7a0
669
#define CSR_TDATA1 0x7a1
670
#define CSR_TDATA2 0x7a2
671
#define CSR_TDATA3 0x7a3
672
#define CSR_TINFO 0x7a4
673
#define CSR_TCONTROL 0x7a5
674
#define CSR_MCONTEXT 0x7a8
675
#define CSR_MSCONTEXT 0x7aa
676
#define CSR_DCSR 0x7b0
677
#define CSR_DPC 0x7b1
678
#define CSR_DSCRATCH0 0x7b2
679
#define CSR_DSCRATCH1 0x7b3
680
#define CSR_MCYCLE 0xb00
681
#define CSR_MINSTRET 0xb02
682
#define CSR_MHPMCOUNTER3 0xb03
683
#define CSR_MHPMCOUNTER4 0xb04
684
#define CSR_MHPMCOUNTER5 0xb05
685
#define CSR_MHPMCOUNTER6 0xb06
686
#define CSR_MHPMCOUNTER7 0xb07
687
#define CSR_MHPMCOUNTER8 0xb08
688
#define CSR_MHPMCOUNTER9 0xb09
689
#define CSR_MHPMCOUNTER10 0xb0a
690
#define CSR_MHPMCOUNTER11 0xb0b
691
#define CSR_MHPMCOUNTER12 0xb0c
692
#define CSR_MHPMCOUNTER13 0xb0d
693
#define CSR_MHPMCOUNTER14 0xb0e
694
#define CSR_MHPMCOUNTER15 0xb0f
695
#define CSR_MHPMCOUNTER16 0xb10
696
#define CSR_MHPMCOUNTER17 0xb11
697
#define CSR_MHPMCOUNTER18 0xb12
698
#define CSR_MHPMCOUNTER19 0xb13
699
#define CSR_MHPMCOUNTER20 0xb14
700
#define CSR_MHPMCOUNTER21 0xb15
701
#define CSR_MHPMCOUNTER22 0xb16
702
#define CSR_MHPMCOUNTER23 0xb17
703
#define CSR_MHPMCOUNTER24 0xb18
704
#define CSR_MHPMCOUNTER25 0xb19
705
#define CSR_MHPMCOUNTER26 0xb1a
706
#define CSR_MHPMCOUNTER27 0xb1b
707
#define CSR_MHPMCOUNTER28 0xb1c
708
#define CSR_MHPMCOUNTER29 0xb1d
709
#define CSR_MHPMCOUNTER30 0xb1e
710
#define CSR_MHPMCOUNTER31 0xb1f
711
#define CSR_MHPMEVENT3 0x323
712
#define CSR_MHPMEVENT4 0x324
713
#define CSR_MHPMEVENT5 0x325
714
#define CSR_MHPMEVENT6 0x326
715
#define CSR_MHPMEVENT7 0x327
716
#define CSR_MHPMEVENT8 0x328
717
#define CSR_MHPMEVENT9 0x329
718
#define CSR_MHPMEVENT10 0x32a
719
#define CSR_MHPMEVENT11 0x32b
720
#define CSR_MHPMEVENT12 0x32c
721
#define CSR_MHPMEVENT13 0x32d
722
#define CSR_MHPMEVENT14 0x32e
723
#define CSR_MHPMEVENT15 0x32f
724
#define CSR_MHPMEVENT16 0x330
725
#define CSR_MHPMEVENT17 0x331
726
#define CSR_MHPMEVENT18 0x332
727
#define CSR_MHPMEVENT19 0x333
728
#define CSR_MHPMEVENT20 0x334
729
#define CSR_MHPMEVENT21 0x335
730
#define CSR_MHPMEVENT22 0x336
731
#define CSR_MHPMEVENT23 0x337
732
#define CSR_MHPMEVENT24 0x338
733
#define CSR_MHPMEVENT25 0x339
734
#define CSR_MHPMEVENT26 0x33a
735
#define CSR_MHPMEVENT27 0x33b
736
#define CSR_MHPMEVENT28 0x33c
737
#define CSR_MHPMEVENT29 0x33d
738
#define CSR_MHPMEVENT30 0x33e
739
#define CSR_MHPMEVENT31 0x33f
740
#define CSR_MVENDORID 0xf11
741
#define CSR_MARCHID 0xf12
742
#define CSR_MIMPID 0xf13
743
#define CSR_MHARTID 0xf14
744
#define CSR_MCONFIGPTR 0xf15
745
#define CSR_STIMECMPH 0x15d
746
#define CSR_VSTIMECMPH 0x25d
747
#define CSR_HTIMEDELTAH 0x615
748
#define CSR_HENVCFGH 0x61a
749
#define CSR_HSTATEEN0H 0x61c
750
#define CSR_HSTATEEN1H 0x61d
751
#define CSR_HSTATEEN2H 0x61e
752
#define CSR_HSTATEEN3H 0x61f
753
#define CSR_CYCLEH 0xc80
754
#define CSR_TIMEH 0xc81
755
#define CSR_INSTRETH 0xc82
756
#define CSR_HPMCOUNTER3H 0xc83
757
#define CSR_HPMCOUNTER4H 0xc84
758
#define CSR_HPMCOUNTER5H 0xc85
759
#define CSR_HPMCOUNTER6H 0xc86
760
#define CSR_HPMCOUNTER7H 0xc87
761
#define CSR_HPMCOUNTER8H 0xc88
762
#define CSR_HPMCOUNTER9H 0xc89
763
#define CSR_HPMCOUNTER10H 0xc8a
764
#define CSR_HPMCOUNTER11H 0xc8b
765
#define CSR_HPMCOUNTER12H 0xc8c
766
#define CSR_HPMCOUNTER13H 0xc8d
767
#define CSR_HPMCOUNTER14H 0xc8e
768
#define CSR_HPMCOUNTER15H 0xc8f
769
#define CSR_HPMCOUNTER16H 0xc90
770
#define CSR_HPMCOUNTER17H 0xc91
771
#define CSR_HPMCOUNTER18H 0xc92
772
#define CSR_HPMCOUNTER19H 0xc93
773
#define CSR_HPMCOUNTER20H 0xc94
774
#define CSR_HPMCOUNTER21H 0xc95
775
#define CSR_HPMCOUNTER22H 0xc96
776
#define CSR_HPMCOUNTER23H 0xc97
777
#define CSR_HPMCOUNTER24H 0xc98
778
#define CSR_HPMCOUNTER25H 0xc99
779
#define CSR_HPMCOUNTER26H 0xc9a
780
#define CSR_HPMCOUNTER27H 0xc9b
781
#define CSR_HPMCOUNTER28H 0xc9c
782
#define CSR_HPMCOUNTER29H 0xc9d
783
#define CSR_HPMCOUNTER30H 0xc9e
784
#define CSR_HPMCOUNTER31H 0xc9f
785
#define CSR_MSTATUSH 0x310
786
#define CSR_MENVCFGH 0x31a
787
#define CSR_MSTATEEN0H 0x31c
788
#define CSR_MSTATEEN1H 0x31d
789
#define CSR_MSTATEEN2H 0x31e
790
#define CSR_MSTATEEN3H 0x31f
791
#define CSR_MHPMEVENT3H 0x723
792
#define CSR_MHPMEVENT4H 0x724
793
#define CSR_MHPMEVENT5H 0x725
794
#define CSR_MHPMEVENT6H 0x726
795
#define CSR_MHPMEVENT7H 0x727
796
#define CSR_MHPMEVENT8H 0x728
797
#define CSR_MHPMEVENT9H 0x729
798
#define CSR_MHPMEVENT10H 0x72a
799
#define CSR_MHPMEVENT11H 0x72b
800
#define CSR_MHPMEVENT12H 0x72c
801
#define CSR_MHPMEVENT13H 0x72d
802
#define CSR_MHPMEVENT14H 0x72e
803
#define CSR_MHPMEVENT15H 0x72f
804
#define CSR_MHPMEVENT16H 0x730
805
#define CSR_MHPMEVENT17H 0x731
806
#define CSR_MHPMEVENT18H 0x732
807
#define CSR_MHPMEVENT19H 0x733
808
#define CSR_MHPMEVENT20H 0x734
809
#define CSR_MHPMEVENT21H 0x735
810
#define CSR_MHPMEVENT22H 0x736
811
#define CSR_MHPMEVENT23H 0x737
812
#define CSR_MHPMEVENT24H 0x738
813
#define CSR_MHPMEVENT25H 0x739
814
#define CSR_MHPMEVENT26H 0x73a
815
#define CSR_MHPMEVENT27H 0x73b
816
#define CSR_MHPMEVENT28H 0x73c
817
#define CSR_MHPMEVENT29H 0x73d
818
#define CSR_MHPMEVENT30H 0x73e
819
#define CSR_MHPMEVENT31H 0x73f
820
#define CSR_MSECCFGH 0x757
821
#define CSR_MCYCLEH 0xb80
822
#define CSR_MINSTRETH 0xb82
823
#define CSR_MHPMCOUNTER3H 0xb83
824
#define CSR_MHPMCOUNTER4H 0xb84
825
#define CSR_MHPMCOUNTER5H 0xb85
826
#define CSR_MHPMCOUNTER6H 0xb86
827
#define CSR_MHPMCOUNTER7H 0xb87
828
#define CSR_MHPMCOUNTER8H 0xb88
829
#define CSR_MHPMCOUNTER9H 0xb89
830
#define CSR_MHPMCOUNTER10H 0xb8a
831
#define CSR_MHPMCOUNTER11H 0xb8b
832
#define CSR_MHPMCOUNTER12H 0xb8c
833
#define CSR_MHPMCOUNTER13H 0xb8d
834
#define CSR_MHPMCOUNTER14H 0xb8e
835
#define CSR_MHPMCOUNTER15H 0xb8f
836
#define CSR_MHPMCOUNTER16H 0xb90
837
#define CSR_MHPMCOUNTER17H 0xb91
838
#define CSR_MHPMCOUNTER18H 0xb92
839
#define CSR_MHPMCOUNTER19H 0xb93
840
#define CSR_MHPMCOUNTER20H 0xb94
841
#define CSR_MHPMCOUNTER21H 0xb95
842
#define CSR_MHPMCOUNTER22H 0xb96
843
#define CSR_MHPMCOUNTER23H 0xb97
844
#define CSR_MHPMCOUNTER24H 0xb98
845
#define CSR_MHPMCOUNTER25H 0xb99
846
#define CSR_MHPMCOUNTER26H 0xb9a
847
#define CSR_MHPMCOUNTER27H 0xb9b
848
#define CSR_MHPMCOUNTER28H 0xb9c
849
#define CSR_MHPMCOUNTER29H 0xb9d
850
#define CSR_MHPMCOUNTER30H 0xb9e
851
#define CSR_MHPMCOUNTER31H 0xb9f
852
853
/* === TEE CSR Registers === */
854
#define CSR_SPMPCFG0 0x1A0
855
#define CSR_SPMPCFG1 0x1A1
856
#define CSR_SPMPCFG2 0x1A2
857
#define CSR_SPMPCFG3 0x1A3
858
#define CSR_SPMPADDR0 0x1B0
859
#define CSR_SPMPADDR1 0x1B1
860
#define CSR_SPMPADDR2 0x1B2
861
#define CSR_SPMPADDR3 0x1B3
862
#define CSR_SPMPADDR4 0x1B4
863
#define CSR_SPMPADDR5 0x1B5
864
#define CSR_SPMPADDR6 0x1B6
865
#define CSR_SPMPADDR7 0x1B7
866
#define CSR_SPMPADDR8 0x1B8
867
#define CSR_SPMPADDR9 0x1B9
868
#define CSR_SPMPADDR10 0x1BA
869
#define CSR_SPMPADDR11 0x1BB
870
#define CSR_SPMPADDR12 0x1BC
871
#define CSR_SPMPADDR13 0x1BD
872
#define CSR_SPMPADDR14 0x1BE
873
#define CSR_SPMPADDR15 0x1BF
874
875
#define CSR_SPMUCFG0 0x1A0
876
#define CSR_SPMUCFG1 0x1A1
877
#define CSR_SPMUCFG2 0x1A2
878
#define CSR_SPMUCFG3 0x1A3
879
#define CSR_SPMUADDR0 0x1B0
880
#define CSR_SPMUADDR1 0x1B1
881
#define CSR_SPMUADDR2 0x1B2
882
#define CSR_SPMUADDR3 0x1B3
883
#define CSR_SPMUADDR4 0x1B4
884
#define CSR_SPMUADDR5 0x1B5
885
#define CSR_SPMUADDR6 0x1B6
886
#define CSR_SPMUADDR7 0x1B7
887
#define CSR_SPMUADDR8 0x1B8
888
#define CSR_SPMUADDR9 0x1B9
889
#define CSR_SPMUADDR10 0x1BA
890
#define CSR_SPMUADDR11 0x1BB
891
#define CSR_SPMUADDR12 0x1BC
892
#define CSR_SPMUADDR13 0x1BD
893
#define CSR_SPMUADDR14 0x1BE
894
#define CSR_SPMUADDR15 0x1BF
895
896
#define CSR_SPMUSWITCH0 0x170
897
#define CSR_SPMUSWITCH1 0x171
898
899
/* === CLIC CSR Registers === */
900
#define CSR_MTVT 0x307
901
#define CSR_MNXTI 0x345
902
#define CSR_MINTSTATUS 0x346
903
#define CSR_MSCRATCHCSW 0x348
904
#define CSR_MSCRATCHCSWL 0x349
905
#define CSR_MCLICBASE 0x350
906
907
/* === P-Extension Registers === */
908
#define CSR_UCODE 0x801
909
910
/* === Nuclei custom CSR Registers === */
911
//#define CSR_MCOUNTINHIBIT 0x320
912
#define CSR_MILM_CTL 0x7C0
913
#define CSR_MDLM_CTL 0x7C1
914
#define CSR_MECC_CODE 0x7C2
915
#define CSR_MNVEC 0x7C3
916
#define CSR_MSUBM 0x7C4
917
#define CSR_MDCAUSE 0x7C9
918
#define CSR_MCACHE_CTL 0x7CA
919
#define CSR_MMISC_CTL 0x7D0
920
#define CSR_MSAVESTATUS 0x7D6
921
#define CSR_MSAVEEPC1 0x7D7
922
#define CSR_MSAVECAUSE1 0x7D8
923
#define CSR_MSAVEEPC2 0x7D9
924
#define CSR_MSAVECAUSE2 0x7DA
925
#define CSR_MSAVEDCAUSE1 0x7DB
926
#define CSR_MSAVEDCAUSE2 0x7DC
927
#define CSR_MTLB_CTL 0x7DD
928
#define CSR_MECC_LOCK 0x7DE
929
#define CSR_MFP16MODE 0x7E2
930
#define CSR_LSTEPFORC 0x7E9
931
#define CSR_PUSHMSUBM 0x7EB
932
#define CSR_MTVT2 0x7EC
933
#define CSR_JALMNXTI 0x7ED
934
#define CSR_PUSHMCAUSE 0x7EE
935
#define CSR_PUSHMEPC 0x7EF
936
#define CSR_MPPICFG_INFO 0x7F0
937
#define CSR_MFIOCFG_INFO 0x7F1
938
939
/* === NCDEV === */
940
#define CSR_MDEVB 0x7F3
941
#define CSR_MDEVM 0x7F4
942
#define CSR_MNOCB 0x7F5
943
#define CSR_MNOCM 0x7F6
944
#define CSR_MATTRI0_BASE 0x7F3
945
#define CSR_MATTRI0_MASK 0x7F4
946
#define CSR_MATTRI1_BASE 0x7F5
947
#define CSR_MATTRI1_MASK 0x7F6
948
#define CSR_MATTRI2_BASE 0x7F9
949
#define CSR_MATTRI2_MASK 0x7FA
950
#define CSR_MATTRI3_BASE 0x7FB
951
#define CSR_MATTRI3_MASK 0x7FC
952
#define CSR_MATTRI4_BASE 0x7FD
953
#define CSR_MATTRI4_MASK 0x7FE
954
955
/* === IREGION === */
956
#define CSR_MSMPCFG_INFO 0x7F7
957
#define CSR_MIRGB_INFO 0x7F7
958
959
#define CSR_SLEEPVALUE 0x811
960
#define CSR_TXEVT 0x812
961
#define CSR_WFE 0x810
962
#define CSR_JALSNXTI 0x947
963
#define CSR_STVT2 0x948
964
#define CSR_PUSHSCAUSE 0x949
965
#define CSR_PUSHSEPC 0x94A
966
#define CSR_SDCAUSE 0x9C0
967
#define CSR_MICFG_INFO 0xFC0
968
#define CSR_MDCFG_INFO 0xFC1
969
#define CSR_MCFG_INFO 0xFC2
970
#define CSR_MTLBCFG_INFO 0xFC3
971
972
/* === ECC === */
973
#define CSR_MECC_STATUS 0xBC4
974
975
/* === Stack protect === */
976
#define CSR_MSTACK_CTRL 0x7C6
977
#define CSR_MSTACK_BOUND 0x7C7
978
#define CSR_MSTACK_BASE 0x7C8
979
980
/* === Nuclei CCM Registers === */
981
#define CSR_CCM_MBEGINADDR 0x7CB
982
#define CSR_CCM_MCOMMAND 0x7CC
983
#define CSR_CCM_MDATA 0x7CD
984
#define CSR_CCM_SUEN 0x7CE
985
#define CSR_CCM_SBEGINADDR 0x5CB
986
#define CSR_CCM_SCOMMAND 0x5CC
987
#define CSR_CCM_SDATA 0x5CD
988
#define CSR_CCM_UBEGINADDR 0x4CB
989
#define CSR_CCM_UCOMMAND 0x4CC
990
#define CSR_CCM_UDATA 0x4CD
991
#define CSR_CCM_FPIPE 0x4CF
992
995
/* Exception Code in MCAUSE CSR */
996
#define CAUSE_MISALIGNED_FETCH 0x0
997
#define CAUSE_FAULT_FETCH 0x1
998
#define CAUSE_ILLEGAL_INSTRUCTION 0x2
999
#define CAUSE_BREAKPOINT 0x3
1000
#define CAUSE_MISALIGNED_LOAD 0x4
1001
#define CAUSE_FAULT_LOAD 0x5
1002
#define CAUSE_MISALIGNED_STORE 0x6
1003
#define CAUSE_FAULT_STORE 0x7
1004
#define CAUSE_USER_ECALL 0x8
1005
#define CAUSE_SUPERVISOR_ECALL 0x9
1006
#define CAUSE_HYPERVISOR_ECALL 0xa
1007
#define CAUSE_MACHINE_ECALL 0xb
1008
#define CAUSE_FETCH_PAGE_FAULT 0xc
1009
#define CAUSE_LOAD_PAGE_FAULT 0xd
1010
#define CAUSE_STORE_PAGE_FAULT 0xf
1011
1012
/* Delegatable Exception Code Mask in MCAUSE CSR*/
1013
#define MISALIGNED_FETCH (1 << CAUSE_MISALIGNED_FETCH)
1014
#define FAULT_FETCH (1 << CAUSE_FAULT_FETCH)
1015
#define ILLEGAL_INSTRUCTION (1 << CAUSE_ILLEGAL_INSTRUCTION)
1016
#define BREAKPOINT (1 << CAUSE_BREAKPOINT)
1017
#define MISALIGNED_LOAD (1 << CAUSE_MISALIGNED_LOAD)
1018
#define FAULT_LOAD (1 << CAUSE_FAULT_LOAD)
1019
#define MISALIGNED_STORE (1 << CAUSE_MISALIGNED_STORE)
1020
#define FAULT_STORE (1 << CAUSE_FAULT_STORE)
1021
#define USER_ECALL (1 << CAUSE_USER_ECALL)
1022
#define FETCH_PAGE_FAULT (1 << CAUSE_FETCH_PAGE_FAULT)
1023
#define LOAD_PAGE_FAULT (1 << CAUSE_LOAD_PAGE_FAULT)
1024
#define STORE_PAGE_FAULT (1 << CAUSE_STORE_PAGE_FAULT)
1025
1026
/* Exception Subcode in MDCAUSE CSR */
1027
#define DCAUSE_FAULT_FETCH_PMP 0x1
1028
#define DCAUSE_FAULT_FETCH_INST 0x2
1029
1030
#define DCAUSE_FAULT_LOAD_PMP 0x1
1031
#define DCAUSE_FAULT_LOAD_INST 0x2
1032
#define DCAUSE_FAULT_LOAD_NICE 0x3
1033
1034
#define DCAUSE_FAULT_STORE_PMP 0x1
1035
#define DCAUSE_FAULT_STORE_INST 0x2
1036
1039
#ifdef __cplusplus
1040
}
1041
#endif
1042
#endif
/* __RISCV_ENCODING_H__ */
Core
Include
riscv_encoding.h
Generated on Fri Nov 3 2023 09:13:32 for NMSIS-Core by
1.8.17