NMSIS-Core  Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
core_feature_timer.h
1 /*
2  * Copyright (c) 2019 Nuclei Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 #ifndef __CORE_FEATURE_TIMER_H__
19 #define __CORE_FEATURE_TIMER_H__
24 /*
25  * System Timer Feature Configuration Macro:
26  * 1. __SYSTIMER_PRESENT: Must, Define whether Private System Timer is present or not.
27  * * 0: Not present
28  * * 1: Present
29  * 2. __SYSTIMER_BASEADDR: Must, Define the base address of the System Timer.
30  * 3. __SYSTIMER_HARTID: Optional, Define the system timer hart index of the cpu, important for case when cpu hartid and cpu hart index are different, only set it if your cpu is single core.
31  */
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
36 #include "core_feature_base.h"
37 
38 #if defined(__SYSTIMER_PRESENT) && (__SYSTIMER_PRESENT == 1)
55 typedef struct {
56  __IOM uint64_t MTIMER;
57  __IOM uint64_t MTIMERCMP;
58  __IOM uint32_t RESERVED0[0x3F7];
59  __IOM uint32_t MTIME_SRW_CTRL;
60  __IOM uint32_t MSFTRST;
61  __IOM uint32_t SSIP;
62  __IOM uint32_t MTIMECTL;
63  __IOM uint32_t MSIP;
65 
66 /* Timer Control / Status Register Definitions */
67 #define SysTimer_MTIMECTL_TIMESTOP_Pos 0U
68 #define SysTimer_MTIMECTL_TIMESTOP_Msk (1UL << SysTimer_MTIMECTL_TIMESTOP_Pos)
69 #define SysTimer_MTIMECTL_CMPCLREN_Pos 1U
70 #define SysTimer_MTIMECTL_CMPCLREN_Msk (1UL << SysTimer_MTIMECTL_CMPCLREN_Pos)
71 #define SysTimer_MTIMECTL_CLKSRC_Pos 2U
72 #define SysTimer_MTIMECTL_CLKSRC_Msk (1UL << SysTimer_MTIMECTL_CLKSRC_Pos)
73 #define SysTimer_MTIMECTL_HDBG_Pos 4U
74 #define SysTimer_MTIMECTL_HDBG_Msk (1UL << SysTimer_MTIMECTL_HDBG_Pos)
77 #define SysTimer_MSIP_MSIP_Pos 0U
78 #define SysTimer_MSIP_MSIP_Msk (1UL << SysTimer_MSIP_MSIP_Pos)
80 #define SysTimer_SSIP_SSIP_Pos 0U
81 #define SysTimer_SSIP_SSIP_Msk (1UL << SysTimer_SSIP_SSIP_Pos)
83 #define SysTimer_MTIMER_Msk (0xFFFFFFFFFFFFFFFFULL)
84 #define SysTimer_MTIMERCMP_Msk (0xFFFFFFFFFFFFFFFFULL)
85 #define SysTimer_MTIMECTL_Msk (0xFFFFFFFFUL)
86 #define SysTimer_MSIP_Msk (0xFFFFFFFFUL)
87 #define SysTimer_MSFTRST_Msk (0xFFFFFFFFUL)
89 #define SysTimer_MSFRST_KEY (0x80000A5FUL)
91 #define SysTimer_CLINT_MSIP_OFS (0x1000UL)
92 #define SysTimer_CLINT_MTIMECMP_OFS (0x5000UL)
93 #define SysTimer_CLINT_MTIME_OFS (0xCFF8UL)
94 #define SysTimer_CLINT_SSIP_OFS (0xD000UL)
96 #ifndef __SYSTIMER_BASEADDR
97 /* Base address of SYSTIMER(__SYSTIMER_BASEADDR) should be defined in <Device.h> */
98 #error "__SYSTIMER_BASEADDR is not defined, please check!"
99 #endif
100 /* System Timer Memory mapping of Device */
101 #define SysTimer_BASE __SYSTIMER_BASEADDR
102 #define SysTimer ((SysTimer_Type *) SysTimer_BASE)
104 /* System Timer Clint register base */
105 #define SysTimer_CLINT_MSIP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MSIP_OFS) + ((hartid) << 2))
106 #define SysTimer_CLINT_MTIMECMP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MTIMECMP_OFS) + ((hartid) << 3))
107 #define SysTimer_CLINT_MTIME_BASE (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MTIME_OFS))
108 #define SysTimer_CLINT_SSIP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_SSIP_OFS) + ((hartid) << 2))
109  /* end of group NMSIS_Core_SysTimer_Registers */
111 
112 /* ################################## SysTimer function ############################################ */
126 #ifndef __SYSTIMER_HARTID
127 #define SysTimer_GetHartID() (__get_hart_index())
128 #else
129 #define SysTimer_GetHartID() (__SYSTIMER_HARTID)
130 #endif
131 
132 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
133 #ifndef __SYSTIMER_HARTID
134 #define SysTimer_GetHartID_S() (__get_hart_index_s())
135 #else
136 #define SysTimer_GetHartID_S() (__SYSTIMER_HARTID)
137 #endif
138 #endif
139 
150 {
151 #if __RISCV_XLEN == 32
152  uint8_t *addr;
153  addr = (uint8_t *)(&(SysTimer->MTIMER));
154  __SW(addr, 0); // prevent carry
155  __SW(addr + 4, (uint32_t)(value >> 32));
156  __SW(addr, (uint32_t)(value));
157 #else
158  SysTimer->MTIMER = value;
159 #endif
160 }
161 
172 {
173 #if __RISCV_XLEN == 32
174  volatile uint32_t high0, low, high;
175  uint64_t full;
176  uint8_t *addr;
177 
178  addr = (uint8_t *)(&(SysTimer->MTIMER));
179 
180  high0 = __LW(addr + 4);
181  low = __LW(addr);
182  high = __LW(addr + 4);
183  if (high0 != high) {
184  low = __LW(addr);
185  }
186  full = (((uint64_t)high) << 32) | low;
187  return full;
188 #else
189  return SysTimer->MTIMER;
190 #endif
191 }
192 
206 __STATIC_FORCEINLINE void SysTimer_SetHartCompareValue(uint64_t value, unsigned long hartid)
207 {
208  if (hartid == 0) {
209 #if __RISCV_XLEN == 32
210  uint8_t *addr;
211  addr = (uint8_t *)(&(SysTimer->MTIMERCMP));
212  __SW(addr, -1U); // prevent load > timecmp
213  __SW(addr + 4, (uint32_t)(value >> 32));
214  __SW(addr, (uint32_t)(value));
215 #else
216  SysTimer->MTIMERCMP = value;
217 #endif
218  } else {
219  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MTIMECMP_BASE(hartid));
220 #if __RISCV_XLEN == 32
221  __SW(addr, -1U); // prevent load > timecmp
222  __SW(addr + 4, (uint32_t)(value >> 32));
223  __SW(addr, (uint32_t)value);
224 #else
225  __SD(addr, value);
226 #endif
227  }
228 }
229 
243 {
244  unsigned long hartid = SysTimer_GetHartID();
245  SysTimer_SetHartCompareValue(value, hartid);
246 }
247 
260 {
261  if (hartid == 0) {
262  return SysTimer->MTIMERCMP;
263  } else {
264  uint64_t full;
265  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MTIMECMP_BASE(hartid));
266 #if __RISCV_XLEN == 32
267  // MTIMECMP didn't increase
268  uint32_t high, low;
269 
270  high = __LW(addr + 4);
271  low = __LW(addr);
272  full = (((uint64_t)high) << 32) | low;
273 #else
274  full = __LD(addr);
275 #endif
276  return full;
277  }
278 }
279 
290 {
291  unsigned long hartid = SysTimer_GetHartID();
292  return SysTimer_GetHartCompareValue(hartid);
293 }
294 
302 {
304 }
305 
313 {
315 }
316 
332 {
333  SysTimer->MTIMECTL = (mctl & SysTimer_MTIMECTL_Msk);
334 }
335 
345 {
346  return (SysTimer->MTIMECTL & SysTimer_MTIMECTL_Msk);
347 }
348 
360 __STATIC_FORCEINLINE void SysTimer_SetHartSWIRQ(unsigned long hartid)
361 {
362  if (hartid == 0) {
364  } else {
365  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
367  }
368 }
369 
380 {
381  unsigned long hartid = SysTimer_GetHartID();
382  SysTimer_SetHartSWIRQ(hartid);
383 }
384 
397 {
398  if (hartid == 0) {
400  } else {
401  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
402  __SW(addr, 0);
403  }
404 }
405 
416 {
417  unsigned long hartid = SysTimer_GetHartID();
418  SysTimer_ClearHartSWIRQ(hartid);
419 }
420 
435 __STATIC_FORCEINLINE uint32_t SysTimer_GetHartMsipValue(unsigned long hartid)
436 {
437  if (hartid == 0) {
438  return (uint32_t)(SysTimer->MSIP);
439  } else {
440  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
441  return __LW(addr);
442  }
443 }
444 
458 {
459  unsigned long hartid = SysTimer_GetHartID();
460  return SysTimer_GetHartMsipValue(hartid);
461 }
462 
473 __STATIC_FORCEINLINE void SysTimer_SetHartMsipValue(uint32_t msip, unsigned long hartid)
474 {
475  if (hartid == 0) {
476  SysTimer->MSIP = (msip);
477  } else {
478  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
479  __SW(addr, msip);
480  }
481 }
482 
491 {
492  unsigned long hartid = SysTimer_GetHartID();
493  SysTimer_SetHartMsipValue(msip, hartid);
494 }
495 
496 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
510 {
511 #if __RISCV_XLEN == 32
512  __RV_CSR_WRITE(CSR_STIMECMP, -1U); // prevent load > timecmp
513  __RV_CSR_WRITE(CSR_STIMECMPH, (uint32_t)(value >> 32));
514  __RV_CSR_WRITE(CSR_STIMECMP, (uint32_t)value);
515 #else
517 #endif
518 }
519 
530 {
531  uint64_t full;
532 #if __RISCV_XLEN == 32
533  uint32_t high, low;
534 
537  full = (((uint64_t)high) << 32) | low;
538 #else
539  full = __RV_CSR_READ(CSR_STIMECMP);
540 #endif
541  return full;
542 }
543 
555 {
556  if (hartid == 0) {
558  } else {
559  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
561  }
562 }
563 
574 {
575  unsigned long hartid = SysTimer_GetHartID_S();
576  SysTimer_SetHartSWIRQ_S(hartid);
577 }
578 
590 {
591  if (hartid == 0) {
593  } else {
594  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
595  __SW(addr, 0);
596  }
597 }
598 
609 {
610  unsigned long hartid = SysTimer_GetHartID_S();
612 }
613 
627 __STATIC_FORCEINLINE uint32_t SysTimer_GetHartSsipValue(unsigned long hartid)
628 {
629  if (hartid == 0) {
630  return (uint32_t)(SysTimer->SSIP);
631  } else {
632  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
633  return __LW(addr);
634  }
635 }
636 
650 {
651  unsigned long hartid = SysTimer_GetHartID_S();
652  return SysTimer_GetHartSsipValue(hartid);
653 }
654 
664 __STATIC_FORCEINLINE void SysTimer_SetHartSsipValue(uint32_t ssip, unsigned long hartid)
665 {
666  if (hartid == 0) {
667  SysTimer->SSIP = (ssip);
668  } else {
669  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
670  __SW(addr, ssip);
671  }
672 }
673 
682 {
683  unsigned long hartid = SysTimer_GetHartID();
684  SysTimer_SetHartSsipValue(ssip, hartid);
685 }
686 
693 __STATIC_FORCEINLINE void SysTimer_SendIPI_S(unsigned long hartid)
694 {
695  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
696  __SW(addr, 1);
697 }
698 
705 __STATIC_FORCEINLINE void SysTimer_ClearIPI_S(unsigned long hartid)
706 {
707  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_SSIP_BASE(hartid));
708  __SW(addr, 0);
709 }
710 
719 {
721 #if __RISCV_XLEN == 32
723 #else
725 #endif
726 }
727 
735 {
737 #if __RISCV_XLEN == 32
739 #else
741 #endif
742 }
743 #endif
744 
756 {
757  SysTimer->MSFTRST = SysTimer_MSFRST_KEY;
758  // will reset cpu, never return
759  while (1);
760 }
761 
768 __STATIC_FORCEINLINE void SysTimer_SendIPI(unsigned long hartid)
769 {
770  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
771  __SW(addr, 1);
772 }
773 
780 __STATIC_FORCEINLINE void SysTimer_ClearIPI(unsigned long hartid)
781 {
782  uint8_t *addr = (uint8_t *)(SysTimer_CLINT_MSIP_BASE(hartid));
783  __SW(addr, 0);
784 }
785 
793 {
794  SysTimer->MTIME_SRW_CTRL = 0;
795 }
796 
804 {
805  SysTimer->MTIME_SRW_CTRL = 1;
806 }
807 
808 #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
809 
834 __STATIC_INLINE uint32_t SysTick_Config(uint64_t ticks)
835 {
836  uint64_t loadticks = SysTimer_GetLoadValue();
837  SysTimer_SetCompareValue(ticks + loadticks);
838 
839 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
843 #endif
844  return (0UL);
845 }
846 
874 __STATIC_INLINE uint32_t SysTick_HartConfig(uint64_t ticks, unsigned long hartid)
875 {
876  uint64_t loadticks = SysTimer_GetLoadValue();
877  SysTimer_SetHartCompareValue(ticks + loadticks, hartid);
878 
879 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
883 #endif
884  return (0UL);
885 }
886 
910 __STATIC_FORCEINLINE uint32_t SysTick_Reload(uint64_t ticks)
911 {
912  uint64_t cur_ticks = SysTimer_GetLoadValue();
913 
914  uint64_t reload_ticks = ticks + cur_ticks;
915 
916  SysTimer_SetCompareValue(reload_ticks);
917 
918  return (0UL);
919 }
920 
946 __STATIC_FORCEINLINE uint32_t SysTick_HartReload(uint64_t ticks, unsigned long hartid)
947 {
948  uint64_t cur_ticks = SysTimer_GetLoadValue();
949  uint64_t reload_ticks = ticks + cur_ticks;
950 
951  SysTimer_SetHartCompareValue(reload_ticks, hartid);
952 
953  return (0UL);
954 }
955 
956 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
967 __STATIC_INLINE uint32_t SysTick_Config_S(uint64_t ticks)
968 {
969  uint64_t loadticks = __get_rv_time();
970  SysTimer_SetCompareValue_S(ticks + loadticks);
971 
972 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
973 #if defined(__TEE_PRESENT) && (__TEE_PRESENT == 1)
975  ECLIC_SetLevelIRQ_S(SysTimer_S_IRQn, 0);
976  ECLIC_EnableIRQ_S(SysTimer_S_IRQn);
977 #endif
978 #endif
979  return (0UL);
980 }
981 
990 __STATIC_FORCEINLINE uint32_t SysTick_Reload_S(uint64_t ticks)
991 {
992  uint64_t cur_ticks = __get_rv_time();
993 
994  uint64_t reload_ticks = ticks + cur_ticks;
995 
996  SysTimer_SetCompareValue_S(reload_ticks);
997 
998  return (0UL);
999 }
1000 #endif
1001 
1002 #endif /* defined(__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) */ /* End of Doxygen Group NMSIS_Core_SysTimer */
1004 
1005 #endif /* defined(__SYSTIMER_PRESENT) && (__SYSTIMER_PRESENT == 1) */
1006 
1007 #ifdef __cplusplus
1008 }
1009 #endif
1010 #endif /* __CORE_FEATURE_TIMER_H__ */
__STATIC_FORCEINLINE void __SW(volatile void *addr, uint32_t val)
Write 32bit value to address (32 bit)
__STATIC_FORCEINLINE uint32_t __LW(volatile void *addr)
Load 32bit value from address (32 bit)
#define MCOUNTEREN_TIME
#define MENVCFGH_STCE
#define MENVCFG_STCE
#define __RV_CSR_CLEAR(csr, val)
CSR operation Macro for csrc instruction.
#define __RV_CSR_READ(csr)
CSR operation Macro for csrr instruction.
__STATIC_FORCEINLINE uint64_t __get_rv_time(void)
Read whole 64 bits value of real-time clock.
#define __RV_CSR_WRITE(csr, val)
CSR operation Macro for csrw instruction.
#define __RV_CSR_SET(csr, val)
CSR operation Macro for csrs instruction.
#define CSR_MCOUNTEREN
#define CSR_STIMECMPH
#define CSR_STIMECMP
#define CSR_MENVCFG
#define CSR_MENVCFGH
#define __STATIC_FORCEINLINE
Define a static function that should be always inlined by the compiler.
Definition: nmsis_gcc.h:70
#define __STATIC_INLINE
Define a static function that may be inlined by the compiler.
Definition: nmsis_gcc.h:65
#define ECLIC_NON_VECTOR_INTERRUPT
Non-Vector Interrupt Mode of ECLIC.
#define ECLIC_SetShvIRQ
#define ECLIC_SetShvIRQ_S
#define ECLIC_SetLevelIRQ
#define ECLIC_EnableIRQ_S
#define ECLIC_EnableIRQ
#define ECLIC_SetLevelIRQ_S
@ SysTimer_IRQn
System Timer Interrupt.
#define __IOM
Defines 'read/write' structure member permissions.
#define SysTimer_MSFRST_KEY
SysTick Timer Software Reset Request Key.
#define SysTimer_CLINT_MTIMECMP_BASE(hartid)
#define SysTimer
SysTick configuration struct.
#define SysTimer_MSIP_MSIP_Msk
SysTick Timer MSIP: MSIP Mask.
#define SysTimer_CLINT_MSIP_BASE(hartid)
#define SysTimer_MTIMECTL_Msk
SysTick Timer MTIMECTL/MSTOP value Mask.
#define SysTimer_CLINT_SSIP_BASE(hartid)
#define SysTimer_MTIMECTL_TIMESTOP_Msk
SysTick Timer MTIMECTL: TIMESTOP Mask.
#define SysTimer_SSIP_SSIP_Msk
SysTick Timer SSIP: SSIP Mask.
__STATIC_FORCEINLINE uint32_t SysTimer_GetSsipValue(void)
Get system timer SSIP register value.
__STATIC_FORCEINLINE uint32_t SysTimer_GetMsipValue(void)
Get system timer MSIP register value in machine mode.
__STATIC_FORCEINLINE void SysTimer_SetHartSWIRQ(unsigned long hartid)
Trigger or set software interrupt via system timer by hartid.
__STATIC_FORCEINLINE void SysTimer_SetLoadValue(uint64_t value)
Set system timer load value.
__STATIC_FORCEINLINE void SysTimer_EnableSAccess(void)
Enable supervisor mode systimer register read/write access right.
#define SysTimer_GetHartID()
SysTimer_GetHartID() is used to get timer hartid which might not be the same as cpu hart id,...
__STATIC_FORCEINLINE void SysTimer_DisableSSTC(void)
Disable SSTC stimecmp csr access right for supervisor mode.
__STATIC_FORCEINLINE void SysTimer_DisableSAccess(void)
Disable supervisor mode systimer register read/write access right.
#define SysTimer_GetHartID_S()
__STATIC_FORCEINLINE void SysTimer_ClearIPI_S(unsigned long hartid)
clear ipi to target hart using Systimer Clint SSIP
__STATIC_FORCEINLINE uint32_t SysTick_Reload_S(uint64_t ticks)
System Tick Reload in supervisor mode.
__STATIC_INLINE uint32_t SysTick_Config(uint64_t ticks)
System Tick Configuration.
__STATIC_FORCEINLINE uint32_t SysTimer_GetHartSsipValue(unsigned long hartid)
Get system timer SSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_SendIPI(unsigned long hartid)
send ipi to target hart using Systimer Clint MSIP
__STATIC_FORCEINLINE uint64_t SysTimer_GetCompareValue(void)
Get system timer compare value in machine mode.
__STATIC_FORCEINLINE void SysTimer_SetCompareValue(uint64_t value)
Set system timer compare value in machine mode.
__STATIC_FORCEINLINE void SysTimer_ClearHartSWIRQ_S(unsigned long hartid)
Clear system timer supervisor mode software interrupt pending request by hartid.
__STATIC_FORCEINLINE void SysTimer_ClearSWIRQ(void)
Clear system timer software interrupt pending request in machine mode.
__STATIC_FORCEINLINE void SysTimer_ClearIPI(unsigned long hartid)
clear ipi to target hart using Systimer Clint MSIP
__STATIC_FORCEINLINE uint64_t SysTimer_GetLoadValue(void)
Get system timer load value.
__STATIC_FORCEINLINE uint32_t SysTimer_GetHartMsipValue(unsigned long hartid)
Get system timer MSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_EnableSSTC(void)
Enable SSTC access right for supervisor mode.
__STATIC_FORCEINLINE void SysTimer_SetHartSWIRQ_S(unsigned long hartid)
Trigger or set supervisor mode software interrupt via system timer by hartid.
__STATIC_FORCEINLINE uint64_t SysTimer_GetCompareValue_S(void)
Get system timer smode compare value.
__STATIC_FORCEINLINE void SysTimer_ClearHartSWIRQ(unsigned long hartid)
Clear system timer software interrupt pending request by hartid.
__STATIC_FORCEINLINE void SysTimer_SetHartSsipValue(uint32_t ssip, unsigned long hartid)
Set system timer SSIP register value by hartid.
__STATIC_FORCEINLINE uint64_t SysTimer_GetHartCompareValue(unsigned long hartid)
Get system timer compare value by hartid.
__STATIC_FORCEINLINE void SysTimer_SetHartMsipValue(uint32_t msip, unsigned long hartid)
Set system timer MSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_Start(void)
Enable system timer counter running.
__STATIC_FORCEINLINE uint32_t SysTick_Reload(uint64_t ticks)
System Tick Reload.
__STATIC_INLINE uint32_t SysTick_HartConfig(uint64_t ticks, unsigned long hartid)
System Tick Configuration By hartid.
__STATIC_FORCEINLINE void SysTimer_SetSWIRQ(void)
Trigger or set software interrupt via system timer in machine mode.
__STATIC_FORCEINLINE void SysTimer_SetMsipValue(uint32_t msip)
Set system timer MSIP register value in machine mode.
__STATIC_INLINE uint32_t SysTick_Config_S(uint64_t ticks)
System Tick Configuration in supervisor mode.
__STATIC_FORCEINLINE void SysTimer_SetSWIRQ_S(void)
Trigger or set supervisor software interrupt via system timer.
__STATIC_FORCEINLINE void SysTimer_SetHartCompareValue(uint64_t value, unsigned long hartid)
Set system timer compare value by hartid.
__STATIC_FORCEINLINE void SysTimer_SoftwareReset(void)
Do software reset request.
__STATIC_FORCEINLINE void SysTimer_ClearSWIRQ_S(void)
Clear system timer supervisor mode software interrupt pending request.
__STATIC_FORCEINLINE uint32_t SysTick_HartReload(uint64_t ticks, unsigned long hartid)
System Tick Reload By hartid.
__STATIC_FORCEINLINE void SysTimer_SendIPI_S(unsigned long hartid)
send ipi to target hart using Systimer Clint SSIP
__STATIC_FORCEINLINE void SysTimer_SetSsipValue(uint32_t ssip)
Set system timer SSIP register value.
__STATIC_FORCEINLINE void SysTimer_SetControlValue(uint32_t mctl)
Set system timer control value.
__STATIC_FORCEINLINE void SysTimer_Stop(void)
Stop system timer counter running.
__STATIC_FORCEINLINE uint32_t SysTimer_GetControlValue(void)
Get system timer control value.
__STATIC_FORCEINLINE void SysTimer_SetCompareValue_S(uint64_t value)
Set system timer smode compare value.
Structure type to access the System Timer (SysTimer).
__IOM uint32_t MTIMECTL
Offset: 0xFF8 (R/W) System Timer Control Register, previously MSTOP register.
__IOM uint64_t MTIMER
Offset: 0x000 (R/W) System Timer current value 64bits Register.
__IOM uint32_t MSFTRST
Offset: 0xFF0 (R/W) System Timer Software Core Reset Register.
__IOM uint32_t SSIP
Offset: 0xFF4 (R/W) S-Mode System Timer SW interrupt Register.
__IOM uint32_t MSIP
Offset: 0xFFC (R/W) M-Mode System Timer SW interrupt Register.
__IOM uint64_t MTIMERCMP
Offset: 0x008 (R/W) System Timer compare Value 64bits Register.
__IOM uint32_t MTIME_SRW_CTRL
Offset: 0xFEC (R/W) Control S-mode can access this timer or not.