18 #ifndef __CORE_FEATURE_TIMER_H__
19 #define __CORE_FEATURE_TIMER_H__
36 #include "core_feature_base.h"
38 #if defined(__SYSTIMER_PRESENT) && (__SYSTIMER_PRESENT == 1)
56 #if defined(CPU_SERIES) && CPU_SERIES == 100
57 __IOM uint32_t MTIMER;
58 __IOM uint32_t RESERVED1;
59 __IOM uint32_t MTIMERCMP;
60 __IOM uint32_t RESERVED2;
65 __IOM uint32_t RESERVED0[0x3F7];
74 #define SysTimer_MTIMECTL_TIMESTOP_Pos 0U
75 #define SysTimer_MTIMECTL_TIMESTOP_Msk (1UL << SysTimer_MTIMECTL_TIMESTOP_Pos)
76 #define SysTimer_MTIMECTL_CMPCLREN_Pos 1U
77 #define SysTimer_MTIMECTL_CMPCLREN_Msk (1UL << SysTimer_MTIMECTL_CMPCLREN_Pos)
78 #define SysTimer_MTIMECTL_CLKSRC_Pos 2U
79 #define SysTimer_MTIMECTL_CLKSRC_Msk (1UL << SysTimer_MTIMECTL_CLKSRC_Pos)
80 #define SysTimer_MTIMECTL_HDBG_Pos 3U
81 #define SysTimer_MTIMECTL_HDBG_Msk (1UL << SysTimer_MTIMECTL_HDBG_Pos)
82 #define SysTimer_MTIMECTL_MTIME_SRC_Pos 4U
83 #define SysTimer_MTIMECTL_MTIME_SRC_Msk (1UL << SysTimer_MTIMECTL_MTIME_SRC_Pos)
85 #define SysTimer_MSIP_MSIP_Pos 0U
86 #define SysTimer_MSIP_MSIP_Msk (1UL << SysTimer_MSIP_MSIP_Pos)
88 #define SysTimer_SSIP_SSIP_Pos 0U
89 #define SysTimer_SSIP_SSIP_Msk (1UL << SysTimer_SSIP_SSIP_Pos)
91 #define SysTimer_MTIME_SRW_CTRL_SRW_Pos 0U
92 #define SysTimer_MTIME_SRW_CTRL_SRW_Msk (1UL << SysTimer_MTIME_SRW_CTRL_SRW_Pos)
94 #if defined(CPU_SERIES) && CPU_SERIES == 100
95 #define SysTimer_MTIMER_Msk (0xFFFFFFFFUL)
96 #define SysTimer_MTIMERCMP_Msk (0xFFFFFFFFUL)
98 #define SysTimer_MTIMER_Msk (0xFFFFFFFFFFFFFFFFULL)
99 #define SysTimer_MTIMERCMP_Msk (0xFFFFFFFFFFFFFFFFULL)
101 #define SysTimer_MTIMECTL_Msk (0xFFFFFFFFUL)
102 #define SysTimer_MSIP_Msk (0xFFFFFFFFUL)
103 #define SysTimer_MSFTRST_Msk (0xFFFFFFFFUL)
105 #define SysTimer_MSFRST_KEY (0x80000A5FUL)
107 #define SysTimer_CLINT_MSIP_OFS (0x1000UL)
108 #define SysTimer_CLINT_MTIMECMP_OFS (0x5000UL)
109 #define SysTimer_CLINT_MTIME_OFS (0xCFF8UL)
110 #define SysTimer_CLINT_SSIP_OFS (0xD000UL)
112 #ifndef __SYSTIMER_BASEADDR
114 #error "__SYSTIMER_BASEADDR is not defined, please check!"
117 #define SysTimer_BASE __SYSTIMER_BASEADDR
118 #define SysTimer ((SysTimer_Type *) SysTimer_BASE)
121 #define SysTimer_CLINT_MSIP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MSIP_OFS) + ((hartid) << 2))
122 #define SysTimer_CLINT_MTIMECMP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MTIMECMP_OFS) + ((hartid) << 3))
123 #define SysTimer_CLINT_MTIME_BASE (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_MTIME_OFS))
124 #define SysTimer_CLINT_SSIP_BASE(hartid) (unsigned long)((SysTimer_BASE) + (SysTimer_CLINT_SSIP_OFS) + ((hartid) << 2))
142 #ifndef __SYSTIMER_HARTID
143 #define SysTimer_GetHartID() (__get_hart_index())
145 #define SysTimer_GetHartID() (__SYSTIMER_HARTID)
148 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
149 #ifndef __SYSTIMER_HARTID
150 #define SysTimer_GetHartID_S() (__get_hart_index_s())
152 #define SysTimer_GetHartID_S() (__SYSTIMER_HARTID)
167 #if (__RISCV_XLEN == 32) && !(defined(CPU_SERIES) && CPU_SERIES == 100)
169 addr = (uint8_t *)(&(
SysTimer->MTIMER));
171 __SW(addr + 4, (uint32_t)(value >> 32));
172 __SW(addr, (uint32_t)(value));
189 #if (__RISCV_XLEN == 32) && !(defined(CPU_SERIES) && CPU_SERIES == 100)
190 volatile uint32_t high0, low, high;
194 addr = (uint8_t *)(&(
SysTimer->MTIMER));
196 high0 =
__LW(addr + 4);
198 high =
__LW(addr + 4);
202 full = (((uint64_t)high) << 32) | low;
224 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
228 #if __RISCV_XLEN == 32
230 addr = (uint8_t *)(&(
SysTimer->MTIMERCMP));
232 __SW(addr + 4, (uint32_t)(value >> 32));
233 __SW(addr, (uint32_t)(value));
239 #if __RISCV_XLEN == 32
241 __SW(addr + 4, (uint32_t)(value >> 32));
242 __SW(addr, (uint32_t)value);
264 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
285 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
293 #if __RISCV_XLEN == 32
297 high =
__LW(addr + 4);
299 full = (((uint64_t)high) << 32) | low;
319 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
394 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
417 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
438 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
461 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
485 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
511 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
531 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
552 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
560 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
575 #if __RISCV_XLEN == 32
596 #if __RISCV_XLEN == 32
601 full = (((uint64_t)high) << 32) | low;
785 #if __RISCV_XLEN == 32
801 #if __RISCV_XLEN == 32
834 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
850 #if (defined(CPU_SERIES) && CPU_SERIES == 100)
880 #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
911 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
951 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
1028 #if defined(__SSTC_PRESENT) && (__SSTC_PRESENT == 1)
1044 #if defined(__ECLIC_PRESENT) && (__ECLIC_PRESENT == 1)
1045 #if defined(__SMODE_PRESENT) && (__SMODE_PRESENT == 1)
__STATIC_FORCEINLINE void __SW(volatile void *addr, uint32_t val)
Write 32bit value to address (32 bit)
__STATIC_FORCEINLINE uint32_t __LW(volatile void *addr)
Load 32bit value from address (32 bit)
#define __RV_CSR_CLEAR(csr, val)
CSR operation Macro for csrc instruction.
#define __RV_CSR_READ(csr)
CSR operation Macro for csrr instruction.
__STATIC_INLINE rv_counter_t __get_rv_time(void)
Read whole 64 bits value of real-time clock.
#define __RV_CSR_WRITE(csr, val)
CSR operation Macro for csrw instruction.
#define __RV_CSR_SET(csr, val)
CSR operation Macro for csrs instruction.
#define __STATIC_FORCEINLINE
Define a static function that should be always inlined by the compiler.
#define __STATIC_INLINE
Define a static function that may be inlined by the compiler.
#define ECLIC_NON_VECTOR_INTERRUPT
Non-Vector Interrupt Mode of ECLIC.
#define ECLIC_SetShvIRQ_S
#define ECLIC_SetLevelIRQ
#define ECLIC_EnableIRQ_S
#define ECLIC_SetLevelIRQ_S
@ SysTimer_IRQn
System Timer Interrupt.
#define __IOM
Defines 'read/write' structure member permissions.
uint64_t rv_counter_t
Type of RISC-V Counter such as cycle, instret, time, depends on the XLEN defined in RISC-V,...
#define SysTimer_MSFRST_KEY
SysTick Timer Software Reset Request Key.
#define SysTimer_CLINT_MTIMECMP_BASE(hartid)
#define SysTimer
SysTick configuration struct.
#define SysTimer_MTIME_SRW_CTRL_SRW_Msk
SysTick Timer MTIME_SRW_CTRL: SRW Mask.
#define SysTimer_MSIP_MSIP_Msk
SysTick Timer MSIP: MSIP Mask.
#define SysTimer_CLINT_MSIP_BASE(hartid)
#define SysTimer_MTIMECTL_Msk
SysTick Timer MTIMECTL/MSTOP value Mask.
#define SysTimer_CLINT_SSIP_BASE(hartid)
#define SysTimer_MTIMECTL_TIMESTOP_Msk
SysTick Timer MTIMECTL: TIMESTOP Mask.
#define SysTimer_SSIP_SSIP_Msk
SysTick Timer SSIP: SSIP Mask.
__STATIC_FORCEINLINE uint32_t SysTimer_GetSsipValue(void)
Get system timer SSIP register value.
__STATIC_FORCEINLINE uint32_t SysTimer_GetMsipValue(void)
Get system timer MSIP register value in machine mode.
__STATIC_INLINE rv_counter_t SysTimer_GetHartCompareValue(unsigned long hartid)
Get system timer compare value by hartid.
__STATIC_FORCEINLINE void SysTimer_SetHartSWIRQ(unsigned long hartid)
Trigger or set software interrupt via system timer by hartid.
__STATIC_INLINE uint32_t SysTick_Config_S(rv_counter_t ticks)
System Tick Configuration in supervisor mode.
__STATIC_FORCEINLINE rv_counter_t SysTimer_GetCompareValue(void)
Get system timer compare value in machine mode.
__STATIC_INLINE void SysTimer_SetCompareValue_S(uint64_t value)
Set system timer smode compare value.
__STATIC_FORCEINLINE void SysTimer_EnableSAccess(void)
Enable supervisor mode systimer register read/write access right.
#define SysTimer_GetHartID()
SysTimer_GetHartID() is used to get timer hartid which might not be the same as cpu hart id,...
__STATIC_FORCEINLINE void SysTimer_DisableSSTC(void)
Disable SSTC stimecmp csr access right for supervisor mode.
__STATIC_FORCEINLINE void SysTimer_DisableSAccess(void)
Disable supervisor mode systimer register read/write access right.
__STATIC_INLINE rv_counter_t SysTimer_GetLoadValue(void)
Get system timer load value.
#define SysTimer_GetHartID_S()
__STATIC_INLINE uint32_t SysTick_Reload(rv_counter_t ticks)
System Tick Reload.
__STATIC_FORCEINLINE void SysTimer_ClearIPI_S(unsigned long hartid)
clear ipi to target hart using Systimer Clint SSIP
__STATIC_INLINE void SysTimer_SetHartCompareValue(rv_counter_t value, unsigned long hartid)
Set system timer compare value by hartid.
__STATIC_FORCEINLINE uint32_t SysTimer_GetHartSsipValue(unsigned long hartid)
Get system timer SSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_SendIPI(unsigned long hartid)
send ipi to target hart using Systimer Clint MSIP
__STATIC_INLINE uint32_t SysTick_HartReload(rv_counter_t ticks, unsigned long hartid)
System Tick Reload By hartid.
__STATIC_FORCEINLINE void SysTimer_ClearHartSWIRQ_S(unsigned long hartid)
Clear system timer supervisor mode software interrupt pending request by hartid.
__STATIC_FORCEINLINE void SysTimer_ClearSWIRQ(void)
Clear system timer software interrupt pending request in machine mode.
__STATIC_FORCEINLINE void SysTimer_ClearIPI(unsigned long hartid)
clear ipi to target hart using Systimer Clint MSIP
__STATIC_FORCEINLINE void SysTimer_SetCompareValue(rv_counter_t value)
Set system timer compare value in machine mode.
__STATIC_INLINE uint32_t SysTick_Reload_S(rv_counter_t ticks)
System Tick Reload in supervisor mode.
__STATIC_FORCEINLINE uint32_t SysTimer_GetHartMsipValue(unsigned long hartid)
Get system timer MSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_EnableSSTC(void)
Enable SSTC access right for supervisor mode.
__STATIC_FORCEINLINE void SysTimer_SetHartSWIRQ_S(unsigned long hartid)
Trigger or set supervisor mode software interrupt via system timer by hartid.
__STATIC_FORCEINLINE void SysTimer_ClearHartSWIRQ(unsigned long hartid)
Clear system timer software interrupt pending request by hartid.
__STATIC_FORCEINLINE void SysTimer_SetHartSsipValue(uint32_t ssip, unsigned long hartid)
Set system timer SSIP register value by hartid.
__STATIC_INLINE void SysTimer_SetLoadValue(rv_counter_t value)
Set system timer load value.
__STATIC_FORCEINLINE void SysTimer_SetHartMsipValue(uint32_t msip, unsigned long hartid)
Set system timer MSIP register value by hartid.
__STATIC_FORCEINLINE void SysTimer_Start(void)
Enable system timer counter running.
__STATIC_INLINE uint32_t SysTick_Config(rv_counter_t ticks)
System Tick Configuration.
__STATIC_FORCEINLINE void SysTimer_SetSWIRQ(void)
Trigger or set software interrupt via system timer in machine mode.
__STATIC_FORCEINLINE void SysTimer_SetMsipValue(uint32_t msip)
Set system timer MSIP register value in machine mode.
__STATIC_FORCEINLINE void SysTimer_SetSWIRQ_S(void)
Trigger or set supervisor software interrupt via system timer.
__STATIC_FORCEINLINE void SysTimer_SoftwareReset(void)
Do software reset request.
__STATIC_FORCEINLINE void SysTimer_ClearSWIRQ_S(void)
Clear system timer supervisor mode software interrupt pending request.
__STATIC_INLINE uint64_t SysTimer_GetCompareValue_S(void)
Get system timer smode compare value.
__STATIC_FORCEINLINE void SysTimer_SendIPI_S(unsigned long hartid)
send ipi to target hart using Systimer Clint SSIP
__STATIC_FORCEINLINE void SysTimer_SetSsipValue(uint32_t ssip)
Set system timer SSIP register value.
__STATIC_INLINE uint32_t SysTick_HartConfig(rv_counter_t ticks, unsigned long hartid)
System Tick Configuration By hartid.
__STATIC_FORCEINLINE void SysTimer_SetControlValue(uint32_t mctl)
Set system timer control value.
__STATIC_FORCEINLINE void SysTimer_Stop(void)
Stop system timer counter running.
__STATIC_FORCEINLINE uint32_t SysTimer_GetControlValue(void)
Get system timer control value.
Structure type to access the System Timer (SysTimer).
__IOM uint32_t MTIMECTL
Offset: 0xFF8 (R/W) System Timer Control Register, previously MSTOP register.
__IOM uint64_t MTIMER
Offset: 0x000 (R/W) System Timer current value 64bits Register.
__IOM uint32_t MSFTRST
Offset: 0xFF0 (R/W) System Timer Software Core Reset Register.
__IOM uint32_t SSIP
Offset: 0xFF4 (R/W) S-Mode System Timer SW interrupt Register, not present in N100.
__IOM uint32_t MSIP
Offset: 0xFFC (R/W) M-Mode System Timer SW interrupt Register.
__IOM uint64_t MTIMERCMP
Offset: 0x008 (R/W) System Timer compare Value 64bits Register.
__IOM uint32_t MTIME_SRW_CTRL
Offset: 0xFEC (R/W) Control S-mode can access this timer or not, not present in N100.