NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
Register Define and Type Definitions Of ECLIC

Type definitions and defines for eclic registers. More...

Data Structures

union  CLICCFG_Type
 Union type to access CLICFG configure register. More...
 
union  CLICINFO_Type
 Union type to access CLICINFO information register. More...
 
struct  CLIC_CTRL_Type
 Access to the machine mode register structure of INTIP, INTIE, INTATTR, INTCTL. More...
 
struct  CLIC_Type
 Access to the structure of ECLIC Memory Map, which is compatible with TEE. More...
 

Macros

#define CLIC_CLICCFG_NLBIT_Pos   1U
 CLIC CLICCFG: NLBIT Position. More...
 
#define CLIC_CLICCFG_NLBIT_Msk   (0xFUL << CLIC_CLICCFG_NLBIT_Pos)
 CLIC CLICCFG: NLBIT Mask. More...
 
#define CLIC_CLICINFO_CTLBIT_Pos   21U
 CLIC INTINFO: __ECLIC_GetInfoCtlbits() Position. More...
 
#define CLIC_CLICINFO_CTLBIT_Msk   (0xFUL << CLIC_CLICINFO_CTLBIT_Pos)
 CLIC INTINFO: __ECLIC_GetInfoCtlbits() Mask. More...
 
#define CLIC_CLICINFO_VER_Pos   13U
 CLIC CLICINFO: VERSION Position. More...
 
#define CLIC_CLICINFO_VER_Msk   (0xFFUL << CLIC_CLICCFG_NLBIT_Pos)
 CLIC CLICINFO: VERSION Mask. More...
 
#define CLIC_CLICINFO_NUM_Pos   0U
 CLIC CLICINFO: NUM Position. More...
 
#define CLIC_CLICINFO_NUM_Msk   (0xFFFUL << CLIC_CLICINFO_NUM_Pos)
 CLIC CLICINFO: NUM Mask. More...
 
#define CLIC_INTIP_IP_Pos   0U
 CLIC INTIP: IP Position. More...
 
#define CLIC_INTIP_IP_Msk   (0x1UL << CLIC_INTIP_IP_Pos)
 CLIC INTIP: IP Mask. More...
 
#define CLIC_INTIE_IE_Pos   0U
 CLIC INTIE: IE Position. More...
 
#define CLIC_INTIE_IE_Msk   (0x1UL << CLIC_INTIE_IE_Pos)
 CLIC INTIE: IE Mask. More...
 
#define CLIC_INTATTR_MODE_Pos   6U
 CLIC INTATTA: Mode Position. More...
 
#define CLIC_INTATTR_MODE_Msk   (0x3U << CLIC_INTATTR_MODE_Pos)
 CLIC INTATTA: Mode Mask. More...
 
#define CLIC_INTATTR_TRIG_Pos   1U
 CLIC INTATTR: TRIG Position. More...
 
#define CLIC_INTATTR_TRIG_Msk   (0x3UL << CLIC_INTATTR_TRIG_Pos)
 CLIC INTATTR: TRIG Mask. More...
 
#define CLIC_INTATTR_SHV_Pos   0U
 CLIC INTATTR: SHV Position. More...
 
#define CLIC_INTATTR_SHV_Msk   (0x1UL << CLIC_INTATTR_SHV_Pos)
 CLIC INTATTR: SHV Mask. More...
 
#define ECLIC_MAX_NLBITS   8U
 Max nlbit of the CLICINTCTLBITS. More...
 
#define ECLIC_MODE_MTVEC_Msk   3U
 ECLIC Mode mask for MTVT CSR Register. More...
 
#define ECLIC_NON_VECTOR_INTERRUPT   0x0
 Non-Vector Interrupt Mode of ECLIC. More...
 
#define ECLIC_VECTOR_INTERRUPT   0x1
 Vector Interrupt Mode of ECLIC. More...
 
#define ECLIC_BASE   __ECLIC_BASEADDR
 ECLIC Base Address. More...
 
#define ECLIC   ((CLIC_Type *) ECLIC_BASE)
 CLIC configuration struct. More...
 

Enumerations

enum  ECLIC_TRIGGER {
  ECLIC_LEVEL_TRIGGER = 0x0,
  ECLIC_POSTIVE_EDGE_TRIGGER = 0x1,
  ECLIC_NEGTIVE_EDGE_TRIGGER = 0x3,
  ECLIC_MAX_TRIGGER = 0x3
}
 ECLIC Trigger Enum for different Trigger Type. More...
 

Detailed Description

Type definitions and defines for eclic registers.

Macro Definition Documentation

◆ CLIC_CLICCFG_NLBIT_Msk

#define CLIC_CLICCFG_NLBIT_Msk   (0xFUL << CLIC_CLICCFG_NLBIT_Pos)

CLIC CLICCFG: NLBIT Mask.

Definition at line 121 of file core_feature_eclic.h.

◆ CLIC_CLICCFG_NLBIT_Pos

#define CLIC_CLICCFG_NLBIT_Pos   1U

CLIC CLICCFG: NLBIT Position.

Definition at line 120 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_CTLBIT_Msk

#define CLIC_CLICINFO_CTLBIT_Msk   (0xFUL << CLIC_CLICINFO_CTLBIT_Pos)

CLIC INTINFO: __ECLIC_GetInfoCtlbits() Mask.

Definition at line 124 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_CTLBIT_Pos

#define CLIC_CLICINFO_CTLBIT_Pos   21U

CLIC INTINFO: __ECLIC_GetInfoCtlbits() Position.

Definition at line 123 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_NUM_Msk

#define CLIC_CLICINFO_NUM_Msk   (0xFFFUL << CLIC_CLICINFO_NUM_Pos)

CLIC CLICINFO: NUM Mask.

Definition at line 130 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_NUM_Pos

#define CLIC_CLICINFO_NUM_Pos   0U

CLIC CLICINFO: NUM Position.

Definition at line 129 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_VER_Msk

#define CLIC_CLICINFO_VER_Msk   (0xFFUL << CLIC_CLICCFG_NLBIT_Pos)

CLIC CLICINFO: VERSION Mask.

Definition at line 127 of file core_feature_eclic.h.

◆ CLIC_CLICINFO_VER_Pos

#define CLIC_CLICINFO_VER_Pos   13U

CLIC CLICINFO: VERSION Position.

Definition at line 126 of file core_feature_eclic.h.

◆ CLIC_INTATTR_MODE_Msk

#define CLIC_INTATTR_MODE_Msk   (0x3U << CLIC_INTATTR_MODE_Pos)

CLIC INTATTA: Mode Mask.

Definition at line 140 of file core_feature_eclic.h.

◆ CLIC_INTATTR_MODE_Pos

#define CLIC_INTATTR_MODE_Pos   6U

CLIC INTATTA: Mode Position.

Definition at line 139 of file core_feature_eclic.h.

◆ CLIC_INTATTR_SHV_Msk

#define CLIC_INTATTR_SHV_Msk   (0x1UL << CLIC_INTATTR_SHV_Pos)

CLIC INTATTR: SHV Mask.

Definition at line 147 of file core_feature_eclic.h.

◆ CLIC_INTATTR_SHV_Pos

#define CLIC_INTATTR_SHV_Pos   0U

CLIC INTATTR: SHV Position.

Definition at line 146 of file core_feature_eclic.h.

◆ CLIC_INTATTR_TRIG_Msk

#define CLIC_INTATTR_TRIG_Msk   (0x3UL << CLIC_INTATTR_TRIG_Pos)

CLIC INTATTR: TRIG Mask.

Definition at line 144 of file core_feature_eclic.h.

◆ CLIC_INTATTR_TRIG_Pos

#define CLIC_INTATTR_TRIG_Pos   1U

CLIC INTATTR: TRIG Position.

Definition at line 143 of file core_feature_eclic.h.

◆ CLIC_INTIE_IE_Msk

#define CLIC_INTIE_IE_Msk   (0x1UL << CLIC_INTIE_IE_Pos)

CLIC INTIE: IE Mask.

Definition at line 136 of file core_feature_eclic.h.

◆ CLIC_INTIE_IE_Pos

#define CLIC_INTIE_IE_Pos   0U

CLIC INTIE: IE Position.

Definition at line 135 of file core_feature_eclic.h.

◆ CLIC_INTIP_IP_Msk

#define CLIC_INTIP_IP_Msk   (0x1UL << CLIC_INTIP_IP_Pos)

CLIC INTIP: IP Mask.

Definition at line 133 of file core_feature_eclic.h.

◆ CLIC_INTIP_IP_Pos

#define CLIC_INTIP_IP_Pos   0U

CLIC INTIP: IP Position.

Definition at line 132 of file core_feature_eclic.h.

◆ ECLIC

#define ECLIC   ((CLIC_Type *) ECLIC_BASE)

CLIC configuration struct.

Definition at line 175 of file core_feature_eclic.h.

◆ ECLIC_BASE

#define ECLIC_BASE   __ECLIC_BASEADDR

ECLIC Base Address.

Definition at line 174 of file core_feature_eclic.h.

◆ ECLIC_MAX_NLBITS

#define ECLIC_MAX_NLBITS   8U

Max nlbit of the CLICINTCTLBITS.

Definition at line 149 of file core_feature_eclic.h.

◆ ECLIC_MODE_MTVEC_Msk

#define ECLIC_MODE_MTVEC_Msk   3U

ECLIC Mode mask for MTVT CSR Register.

Definition at line 150 of file core_feature_eclic.h.

◆ ECLIC_NON_VECTOR_INTERRUPT

#define ECLIC_NON_VECTOR_INTERRUPT   0x0

Non-Vector Interrupt Mode of ECLIC.

Definition at line 152 of file core_feature_eclic.h.

◆ ECLIC_VECTOR_INTERRUPT

#define ECLIC_VECTOR_INTERRUPT   0x1

Vector Interrupt Mode of ECLIC.

Definition at line 153 of file core_feature_eclic.h.

Enumeration Type Documentation

◆ ECLIC_TRIGGER

ECLIC Trigger Enum for different Trigger Type.

Enumerator
ECLIC_LEVEL_TRIGGER 

Level Triggerred, trig[0] = 0.

ECLIC_POSTIVE_EDGE_TRIGGER 

Postive/Rising Edge Triggered, trig[0] = 1, trig[1] = 0.

ECLIC_NEGTIVE_EDGE_TRIGGER 

Negtive/Falling Edge Triggered, trig[0] = 1, trig[1] = 1.

ECLIC_MAX_TRIGGER 

MAX Supported Trigger Mode.

Definition at line 156 of file core_feature_eclic.h.

156  {
157  ECLIC_LEVEL_TRIGGER = 0x0,
160  ECLIC_MAX_TRIGGER = 0x3
161 } ECLIC_TRIGGER_Type;
ECLIC_NEGTIVE_EDGE_TRIGGER
@ ECLIC_NEGTIVE_EDGE_TRIGGER
Negtive/Falling Edge Triggered, trig[0] = 1, trig[1] = 1.
Definition: core_feature_eclic.h:159
ECLIC_POSTIVE_EDGE_TRIGGER
@ ECLIC_POSTIVE_EDGE_TRIGGER
Postive/Rising Edge Triggered, trig[0] = 1, trig[1] = 0.
Definition: core_feature_eclic.h:158
ECLIC_LEVEL_TRIGGER
@ ECLIC_LEVEL_TRIGGER
Level Triggerred, trig[0] = 0.
Definition: core_feature_eclic.h:157
ECLIC_MAX_TRIGGER
@ ECLIC_MAX_TRIGGER
MAX Supported Trigger Mode.
Definition: core_feature_eclic.h:160