NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices

8-bit Multiply with 32-bit Add Instructions More...

Functions

__STATIC_FORCEINLINE long __RV_SMAQA (long t, unsigned long a, unsigned long b)
 SMAQA (Signed Multiply Four Bytes with 32-bit Adds) More...
 
__STATIC_FORCEINLINE long __RV_SMAQA_SU (long t, unsigned long a, unsigned long b)
 SMAQA.SU (Signed and Unsigned Multiply Four Bytes with 32-bit Adds) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UMAQA (unsigned long t, unsigned long a, unsigned long b)
 UMAQA (Unsigned Multiply Four Bytes with 32- bit Adds) More...
 

Detailed Description

8-bit Multiply with 32-bit Add Instructions

there are 3 8-bit Multiply with 32-bit Add Instructions

Function Documentation

◆ __RV_SMAQA()

__STATIC_FORCEINLINE long __RV_SMAQA ( long  t,
unsigned long  a,
unsigned long  b 
)

SMAQA (Signed Multiply Four Bytes with 32-bit Adds)

Type: Partial-SIMD (Reduction)

Syntax:

SMAQA Rd, Rs1, Rs2

Purpose:
Do four signed 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:
This instruction multiplies the four signed 8-bit elements of 32-bit chunks of Rs1 with the four signed 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the signed content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

res[x] = Rd.W[x] +
(Rs1.W[x].B[3] s* Rs2.W[x].B[3]) + (Rs1.W[x].B[2] s* Rs2.W[x].B[2]) +
(Rs1.W[x].B[1] s* Rs2.W[x].B[1]) + (Rs1.W[x].B[0] s* Rs2.W[x].B[0]);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1,0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 8181 of file core_feature_dsp.h.

8182 {
8183  __ASM volatile("smaqa %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
8184  return t;
8185 }

References __ASM.

◆ __RV_SMAQA_SU()

__STATIC_FORCEINLINE long __RV_SMAQA_SU ( long  t,
unsigned long  a,
unsigned long  b 
)

SMAQA.SU (Signed and Unsigned Multiply Four Bytes with 32-bit Adds)

Type: Partial-SIMD (Reduction)

Syntax:

SMAQA.SU Rd, Rs1, Rs2

Purpose:
Do four signed x unsigned 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:
This instruction multiplies the four signed 8-bit elements of 32-bit chunks of Rs1 with the four unsigned 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the signed content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

res[x] = Rd.W[x] +
(Rs1.W[x].B[3] su* Rs2.W[x].B[3]) + (Rs1.W[x].B[2] su* Rs2.W[x].B[2]) +
(Rs1.W[x].B[1] su* Rs2.W[x].B[1]) + (Rs1.W[x].B[0] su* Rs2.W[x].B[0]);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1...0
Parameters
[in]tlong type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 8226 of file core_feature_dsp.h.

8227 {
8228  __ASM volatile("smaqa.su %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
8229  return t;
8230 }

References __ASM.

◆ __RV_UMAQA()

__STATIC_FORCEINLINE unsigned long __RV_UMAQA ( unsigned long  t,
unsigned long  a,
unsigned long  b 
)

UMAQA (Unsigned Multiply Four Bytes with 32- bit Adds)

Type: DSP

Syntax:

UMAQA Rd, Rs1, Rs2

Purpose:
Do four unsigned 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:
This instruction multiplies the four unsigned 8-bit elements of 32-bit chunks of Rs1 with the four unsigned 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the unsigned content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

res[x] = Rd.W[x] + (Rs1.W[x].B[3] u* Rs2.W[x].B[3]) +
(Rs1.W[x].B[2] u* Rs2.W[x].B[2]) + (Rs1.W[x].B[1] u* Rs2.W[x].B[1]) +
(Rs1.W[x].B[0] u* Rs2.W[x].B[0]);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1...0
Parameters
[in]tunsigned long type of value stored in t
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 12301 of file core_feature_dsp.h.

12302 {
12303  __ASM volatile("umaqa %0, %1, %2" : "+r"(t) : "r"(a), "r"(b));
12304  return t;
12305 }

References __ASM.

__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55