NMSIS-Core  Version 1.4.1
NMSIS-Core support for Nuclei processor-based devices
Functions
SIMD 16-bit Add/Subtract Instructions
Intrinsic Functions for SIMD Instructions » SIMD Data Processing Instructions

SIMD 16-bit Add/Subtract Instructions. More...

Functions

__STATIC_FORCEINLINE unsigned long __RV_ADD16 (unsigned long a, unsigned long b)
 ADD16 (SIMD 16-bit Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_CRAS16 (unsigned long a, unsigned long b)
 CRAS16 (SIMD 16-bit Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_CRSA16 (unsigned long a, unsigned long b)
 CRSA16 (SIMD 16-bit Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KADD16 (unsigned long a, unsigned long b)
 KADD16 (SIMD 16-bit Signed Saturating Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KCRAS16 (unsigned long a, unsigned long b)
 KCRAS16 (SIMD 16-bit Signed Saturating Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KCRSA16 (unsigned long a, unsigned long b)
 KCRSA16 (SIMD 16-bit Signed Saturating Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSTAS16 (unsigned long a, unsigned long b)
 KSTAS16 (SIMD 16-bit Signed Saturating Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSTSA16 (unsigned long a, unsigned long b)
 KSTSA16 (SIMD 16-bit Signed Saturating Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSUB16 (unsigned long a, unsigned long b)
 KSUB16 (SIMD 16-bit Signed Saturating Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RADD16 (unsigned long a, unsigned long b)
 RADD16 (SIMD 16-bit Signed Halving Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RCRAS16 (unsigned long a, unsigned long b)
 RCRAS16 (SIMD 16-bit Signed Halving Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RCRSA16 (unsigned long a, unsigned long b)
 RCRSA16 (SIMD 16-bit Signed Halving Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSTAS16 (unsigned long a, unsigned long b)
 RSTAS16 (SIMD 16-bit Signed Halving Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSTSA16 (unsigned long a, unsigned long b)
 RSTSA16 (SIMD 16-bit Signed Halving Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSUB16 (unsigned long a, unsigned long b)
 RSUB16 (SIMD 16-bit Signed Halving Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_STAS16 (unsigned long a, unsigned long b)
 STAS16 (SIMD 16-bit Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_STSA16 (unsigned long a, unsigned long b)
 STSA16 (SIMD 16-bit Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_SUB16 (unsigned long a, unsigned long b)
 SUB16 (SIMD 16-bit Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKADD16 (unsigned long a, unsigned long b)
 UKADD16 (SIMD 16-bit Unsigned Saturating Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKCRAS16 (unsigned long a, unsigned long b)
 UKCRAS16 (SIMD 16-bit Unsigned Saturating Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKCRSA16 (unsigned long a, unsigned long b)
 UKCRSA16 (SIMD 16-bit Unsigned Saturating Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSTAS16 (unsigned long a, unsigned long b)
 UKSTAS16 (SIMD 16-bit Unsigned Saturating Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSTSA16 (unsigned long a, unsigned long b)
 UKSTSA16 (SIMD 16-bit Unsigned Saturating Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSUB16 (unsigned long a, unsigned long b)
 UKSUB16 (SIMD 16-bit Unsigned Saturating Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URADD16 (unsigned long a, unsigned long b)
 URADD16 (SIMD 16-bit Unsigned Halving Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URCRAS16 (unsigned long a, unsigned long b)
 URCRAS16 (SIMD 16-bit Unsigned Halving Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URCRSA16 (unsigned long a, unsigned long b)
 URCRSA16 (SIMD 16-bit Unsigned Halving Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSTAS16 (unsigned long a, unsigned long b)
 URSTAS16 (SIMD 16-bit Unsigned Halving Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSTSA16 (unsigned long a, unsigned long b)
 URSTSA16 (SIMD 16-bit Unsigned Halving Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSUB16 (unsigned long a, unsigned long b)
 URSUB16 (SIMD 16-bit Unsigned Halving Subtraction) More...
 

Detailed Description

SIMD 16-bit Add/Subtract Instructions.

Based on the combination of the types of the two 16-bit arithmetic operations, the SIMD 16-bit add/subtract instructions can be classified into 6 main categories: Addition (two 16-bit addition), Subtraction (two 16-bit subtraction), Crossed Add & Sub (one addition and one subtraction), and Crossed Sub & Add (one subtraction and one addition), Straight Add & Sub (one addition and one subtraction), and Straight Sub & Add (one subtraction and one addition). Based on the way of how an overflow condition is handled, the SIMD 16-bit add/subtract instructions can be classified into 5 groups: Wrap-around (dropping overflow), Signed Halving (keeping overflow by dropping 1 LSB bit), Unsigned Halving, Signed Saturation (clipping overflow), and Unsigned Saturation. Together, there are 30 SIMD 16-bit add/subtract instructions.

Function Documentation

◆ __RV_ADD16()

__STATIC_FORCEINLINE unsigned long __RV_ADD16 ( unsigned long  a,
unsigned long  b 
)

ADD16 (SIMD 16-bit Addition)

Type: SIMD

Syntax:

ADD16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element additions simultaneously.

Description:
This instruction adds the 16-bit integer elements in Rs1 with the 16-bit integer elements in Rs2, and then writes the 16-bit element results to Rd.

Note:
This instruction can be used for either signed or unsigned addition.

Operations:

Rd.H[x] = Rs1.H[x] + Rs2.H[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 490 of file core_feature_dsp.h.

491 {
492  unsigned long result;
493  __ASM volatile("add16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
494  return result;
495 }
__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55

References __ASM.

◆ __RV_CRAS16()

__STATIC_FORCEINLINE unsigned long __RV_CRAS16 ( unsigned long  a,
unsigned long  b 
)

CRAS16 (SIMD 16-bit Cross Addition & Subtraction)

Type: SIMD

Syntax:

CRAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element addition and 16-bit integer element subtraction in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks.

Description:
This instruction adds the 16-bit integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit integer element in [15:0] of 32-bit chunks in Rs2, and writes the result to [31:16] of 32-bit chunks in Rd; at the same time, it subtracts the 16-bit integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit integer element in [15:0] of 32-bit chunks, and writes the result to [15:0] of 32- bit chunks in Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[x][31:16] = Rs1.W[x][31:16] + Rs2.W[x][15:0];
Rd.W[x][15:0] = Rs1.W[x][15:0] - Rs2.W[x][31:16];
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 1282 of file core_feature_dsp.h.

1283 {
1284  unsigned long result;
1285  __ASM volatile("cras16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
1286  return result;
1287 }

References __ASM.

◆ __RV_CRSA16()

__STATIC_FORCEINLINE unsigned long __RV_CRSA16 ( unsigned long  a,
unsigned long  b 
)

CRSA16 (SIMD 16-bit Cross Subtraction & Addition)

Type: SIMD

Syntax:

CRSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element subtraction and 16-bit integer element addition in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit integer element in [31:16] of 32-bit chunks in Rs1, and writes the result to [31:16] of 32-bit chunks in Rd; at the same time, it adds the 16-bit integer element in [31:16] of 32-bit chunks in Rs2 with the 16-bit integer element in [15:0] of 32-bit chunks in Rs1, and writes the result to [15:0] of 32-bit chunks in Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[x][31:16] = Rs1.W[x][31:16] - Rs2.W[x][15:0];
Rd.W[x][15:0] = Rs1.W[x][15:0] + Rs2.W[x][31:16];
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 1328 of file core_feature_dsp.h.

1329 {
1330  unsigned long result;
1331  __ASM volatile("crsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
1332  return result;
1333 }

References __ASM.

◆ __RV_KADD16()

__STATIC_FORCEINLINE unsigned long __RV_KADD16 ( unsigned long  a,
unsigned long  b 
)

KADD16 (SIMD 16-bit Signed Saturating Addition)

Type: SIMD

Syntax:

KADD16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element saturating additions simultaneously.

Description:
This instruction adds the 16-bit signed integer elements in Rs1 with the 16-bit signed integer elements in Rs2. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.H[x] + Rs2.H[x];
if (res[x] > 32767) {
res[x] = 32767;
OV = 1;
} else if (res[x] < -32768) {
res[x] = -32768;
OV = 1;
}
Rd.H[x] = res[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 1600 of file core_feature_dsp.h.

1601 {
1602  unsigned long result;
1603  __ASM volatile("kadd16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
1604  return result;
1605 }

References __ASM.

◆ __RV_KCRAS16()

__STATIC_FORCEINLINE unsigned long __RV_KCRAS16 ( unsigned long  a,
unsigned long  b 
)

KCRAS16 (SIMD 16-bit Signed Saturating Cross Addition & Subtraction)

Type: SIMD

Syntax:

KCRAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element saturating addition and 16-bit signed integer element saturating subtraction in a 32-bit chunk simultaneously. Operands are from crossed positions in 32- bit chunks.

Description:
This instruction adds the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2; at the same time, it subtracts the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for addition and [15:0] of 32-bit chunks in Rd for subtraction.

Operations:

res1 = Rs1.W[x][31:16] + Rs2.W[x][15:0];
res2 = Rs1.W[x][15:0] - Rs2.W[x][31:16];
for (res in [res1, res2]) {
if (res > (2^15)-1) {
res = (2^15)-1;
OV = 1;
} else if (res < -2^15) {
res = -2^15;
OV = 1;
}
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 1818 of file core_feature_dsp.h.

1819 {
1820  unsigned long result;
1821  __ASM volatile("kcras16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
1822  return result;
1823 }

References __ASM.

◆ __RV_KCRSA16()

__STATIC_FORCEINLINE unsigned long __RV_KCRSA16 ( unsigned long  a,
unsigned long  b 
)

KCRSA16 (SIMD 16-bit Signed Saturating Cross Subtraction & Addition)

Type: SIMD

Syntax:

KCRSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element saturating subtraction and 16-bit signed integer element saturating addition in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1; at the same time, it adds the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2 with the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for subtraction and [15:0] of 32-bit chunks in Rd for addition.

Operations:

res1 = Rs1.W[x][31:16] - Rs2.W[x][15:0];
res2 = Rs1.W[x][15:0] + Rs2.W[x][31:16];
for (res in [res1, res2]) {
if (res > (2^15)-1) {
res = (2^15)-1;
OV = 1;
} else if (res < -2^15) {
res = -2^15;
OV = 1;
}
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 1875 of file core_feature_dsp.h.

1876 {
1877  unsigned long result;
1878  __ASM volatile("kcrsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
1879  return result;
1880 }

References __ASM.

◆ __RV_KSTAS16()

__STATIC_FORCEINLINE unsigned long __RV_KSTAS16 ( unsigned long  a,
unsigned long  b 
)

KSTAS16 (SIMD 16-bit Signed Saturating Straight Addition & Subtraction)

Type: SIMD

Syntax:

KSTAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element saturating addition and 16-bit signed integer element saturating subtraction in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction adds the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2; at the same time, it subtracts the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for addition and [15:0] of 32-bit chunks in Rd for subtraction.

Operations:

res1 = Rs1.W[x][31:16] + Rs2.W[x][31:16];
res2 = Rs1.W[x][15:0] - Rs2.W[x][15:0];
for (res in [res1, res2]) {
if (res > (2^15)-1) {
res = (2^15)-1;
OV = 1;
} else if (res < -2^15) {
res = -2^15;
OV = 1;
}
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 5278 of file core_feature_dsp.h.

5279 {
5280  unsigned long result;
5281  __ASM volatile("kstas16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
5282  return result;
5283 }

References __ASM.

◆ __RV_KSTSA16()

__STATIC_FORCEINLINE unsigned long __RV_KSTSA16 ( unsigned long  a,
unsigned long  b 
)

KSTSA16 (SIMD 16-bit Signed Saturating Straight Subtraction & Addition)

Type: SIMD

Syntax:

KSTSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element saturating subtraction and 16-bit signed integer element saturating addition in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1; at the same time, it adds the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2 with the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for subtraction and [15:0] of 32-bit chunks in Rd for addition.

Operations:

res1 = Rs1.W[x][31:16] - Rs2.W[x][31:16];
res2 = Rs1.W[x][15:0] + Rs2.W[x][15:0];
for (res in [res1, res2]) {
if (res > (2^15)-1) {
res = (2^15)-1;
OV = 1;
} else if (res < -2^15) {
res = -2^15;
OV = 1;
}
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 5335 of file core_feature_dsp.h.

5336 {
5337  unsigned long result;
5338  __ASM volatile("kstsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
5339  return result;
5340 }

References __ASM.

◆ __RV_KSUB16()

__STATIC_FORCEINLINE unsigned long __RV_KSUB16 ( unsigned long  a,
unsigned long  b 
)

KSUB16 (SIMD 16-bit Signed Saturating Subtraction)

Type: SIMD

Syntax:

KSUB16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer elements saturating subtractions simultaneously.

Description:
This instruction subtracts the 16-bit signed integer elements in Rs2 from the 16-bit signed integer elements in Rs1. If any of the results are beyond the Q15 number range (-2^15 <= Q15 <= 2^15-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.H[x] - Rs2.H[x];
if (res[x] > (2^15)-1) {
res[x] = (2^15)-1;
OV = 1;
} else if (res[x] < -2^15) {
res[x] = -2^15;
OV = 1;
}
Rd.H[x] = res[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 5430 of file core_feature_dsp.h.

5431 {
5432  unsigned long result;
5433  __ASM volatile("ksub16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
5434  return result;
5435 }

References __ASM.

◆ __RV_RADD16()

__STATIC_FORCEINLINE unsigned long __RV_RADD16 ( unsigned long  a,
unsigned long  b 
)

RADD16 (SIMD 16-bit Signed Halving Addition)

Type: SIMD

Syntax:

RADD16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit signed integer elements in Rs1 with the 16-bit signed integer elements in Rs2. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Rs1 = 0x7FFF, Rs2 = 0x7FFF, Rd = 0x7FFF
* Rs1 = 0x8000, Rs2 = 0x8000, Rd = 0x8000
* Rs1 = 0x4000, Rs2 = 0x8000, Rd = 0xE000

Operations:

Rd.H[x] = (Rs1.H[x] + Rs2.H[x]) s>> 1; for RV32: x=1...0, for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6348 of file core_feature_dsp.h.

6349 {
6350  unsigned long result;
6351  __ASM volatile("radd16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6352  return result;
6353 }

References __ASM.

◆ __RV_RCRAS16()

__STATIC_FORCEINLINE unsigned long __RV_RCRAS16 ( unsigned long  a,
unsigned long  b 
)

RCRAS16 (SIMD 16-bit Signed Halving Cross Addition & Subtraction)

Type: SIMD

Syntax:

RCRAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element addition and 16-bit signed integer element subtraction in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2, and subtracts the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `RADD16` and `RSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] + Rs2.W[x][15:0]) s>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] - Rs2.W[x][31:16]) s>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6498 of file core_feature_dsp.h.

6499 {
6500  unsigned long result;
6501  __ASM volatile("rcras16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6502  return result;
6503 }

References __ASM.

◆ __RV_RCRSA16()

__STATIC_FORCEINLINE unsigned long __RV_RCRSA16 ( unsigned long  a,
unsigned long  b 
)

RCRSA16 (SIMD 16-bit Signed Halving Cross Subtraction & Addition)

Type: SIMD

Syntax:

RCRSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element subtraction and 16-bit signed integer element addition in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1, and adds the 16-bit signed element integer in [15:0] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `RADD16` and `RSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] - Rs2.W[x][15:0]) s>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] + Rs2.W[x][31:16]) s>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6547 of file core_feature_dsp.h.

6548 {
6549  unsigned long result;
6550  __ASM volatile("rcrsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6551  return result;
6552 }

References __ASM.

◆ __RV_RSTAS16()

__STATIC_FORCEINLINE unsigned long __RV_RSTAS16 ( unsigned long  a,
unsigned long  b 
)

RSTAS16 (SIMD 16-bit Signed Halving Straight Addition & Subtraction)

Type: SIMD

Syntax:

RSTAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element addition and 16-bit signed integer element subtraction in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2, and subtracts the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `RADD16` and `RSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] + Rs2.W[x][31:16]) s>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] - Rs2.W[x][15:0]) s>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6623 of file core_feature_dsp.h.

6624 {
6625  unsigned long result;
6626  __ASM volatile("rstas16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6627  return result;
6628 }

References __ASM.

◆ __RV_RSTSA16()

__STATIC_FORCEINLINE unsigned long __RV_RSTSA16 ( unsigned long  a,
unsigned long  b 
)

RSTSA16 (SIMD 16-bit Signed Halving Straight Subtraction & Addition)

Type: SIMD

Syntax:

RSTSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element subtraction and 16-bit signed integer element addition in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit signed integer element in [31:16] of 32-bit chunks in Rs1, and adds the 16-bit signed element integer in [15:0] of 32-bit chunks in Rs1 with the 16-bit signed integer element in [15:0] of 32-bit chunks in Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `RADD16` and `RSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] - Rs2.W[x][31:16]) s>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] + Rs2.W[x][15:0]) s>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6672 of file core_feature_dsp.h.

6673 {
6674  unsigned long result;
6675  __ASM volatile("rstsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6676  return result;
6677 }

References __ASM.

◆ __RV_RSUB16()

__STATIC_FORCEINLINE unsigned long __RV_RSUB16 ( unsigned long  a,
unsigned long  b 
)

RSUB16 (SIMD 16-bit Signed Halving Subtraction)

Type: SIMD

Syntax:

RSUB16 Rd, Rs1, Rs2

Purpose:
Do 16-bit signed integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit signed integer elements in Rs2 from the 16-bit signed integer elements in Rs1. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFF, Rb = 0x8000, Rt = 0x7FFF
* Ra = 0x8000, Rb = 0x7FFF, Rt = 0x8000
* Ra = 0x8000, Rb = 0x4000, Rt = 0xA000

Operations:

Rd.H[x] = (Rs1.H[x] - Rs2.H[x]) s>> 1;
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 6766 of file core_feature_dsp.h.

6767 {
6768  unsigned long result;
6769  __ASM volatile("rsub16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
6770  return result;
6771 }

References __ASM.

◆ __RV_STAS16()

__STATIC_FORCEINLINE unsigned long __RV_STAS16 ( unsigned long  a,
unsigned long  b 
)

STAS16 (SIMD 16-bit Straight Addition & Subtraction)

Type: SIMD

Syntax:

STAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element addition and 16-bit integer element subtraction in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction adds the 16-bit integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit integer element in [31:16] of 32-bit chunks in Rs2, and writes the result to [31:16] of 32-bit chunks in Rd; at the same time, it subtracts the 16-bit integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit integer element in [15:0] of 32-bit chunks, and writes the result to [15:0] of 32- bit chunks in Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[x][31:16] = Rs1.W[x][31:16] + Rs2.W[x][31:16];
Rd.W[x][15:0] = Rs1.W[x][15:0] - Rs2.W[x][15:0];
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 10581 of file core_feature_dsp.h.

10582 {
10583  unsigned long result;
10584  __ASM volatile("stas16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
10585  return result;
10586 }

References __ASM.

◆ __RV_STSA16()

__STATIC_FORCEINLINE unsigned long __RV_STSA16 ( unsigned long  a,
unsigned long  b 
)

STSA16 (SIMD 16-bit Straight Subtraction & Addition)

Type: SIMD

Syntax:

STSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element subtraction and 16-bit integer element addition in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit integer element in [31:16] of 32-bit chunks in Rs1, and writes the result to [31:16] of 32-bit chunks in Rd; at the same time, it adds the 16-bit integer element in [15:0] of 32-bit chunks in Rs2 with the 16-bit integer element in [15:0] of 32-bit chunks in Rs1, and writes the result to [15:0] of 32-bit chunks in Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[x][31:16] = Rs1.W[x][31:16] - Rs2.W[x][31:16];
Rd.W[x][15:0] = Rs1.W[x][15:0] + Rs2.W[x][15:0];
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 10627 of file core_feature_dsp.h.

10628 {
10629  unsigned long result;
10630  __ASM volatile("stsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
10631  return result;
10632 }

References __ASM.

◆ __RV_SUB16()

__STATIC_FORCEINLINE unsigned long __RV_SUB16 ( unsigned long  a,
unsigned long  b 
)

SUB16 (SIMD 16-bit Subtraction)

Type: SIMD

Syntax:

SUB16 Rd, Rs1, Rs2

Purpose:
Do 16-bit integer element subtractions simultaneously.

Description:
This instruction subtracts the 16-bit integer elements in Rs2 from the 16-bit integer elements in Rs1, and then writes the result to Rd.

Note:
This instruction can be used for either signed or unsigned subtraction.

Operations:

Rd.H[x] = Rs1.H[x] - Rs2.H[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 10709 of file core_feature_dsp.h.

10710 {
10711  unsigned long result;
10712  __ASM volatile("sub16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
10713  return result;
10714 }

References __ASM.

◆ __RV_UKADD16()

__STATIC_FORCEINLINE unsigned long __RV_UKADD16 ( unsigned long  a,
unsigned long  b 
)

UKADD16 (SIMD 16-bit Unsigned Saturating Addition)

Type: SIMD

Syntax:

UKADD16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element saturating additions simultaneously.

Description:
This instruction adds the 16-bit unsigned integer elements in Rs1 with the 16-bit unsigned integer elements in Rs2. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.H[x] + Rs2.H[x];
if (res[x] > (2^16)-1) {
res[x] = (2^16)-1;
OV = 1;
}
Rd.H[x] = res[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 11462 of file core_feature_dsp.h.

11463 {
11464  unsigned long result;
11465  __ASM volatile("ukadd16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
11466  return result;
11467 }

References __ASM.

◆ __RV_UKCRAS16()

__STATIC_FORCEINLINE unsigned long __RV_UKCRAS16 ( unsigned long  a,
unsigned long  b 
)

UKCRAS16 (SIMD 16-bit Unsigned Saturating Cross Addition & Subtraction)

Type: SIMD

Syntax:

UKCRAS16 Rd, Rs1, Rs2

Purpose:
Do one 16-bit unsigned integer element saturating addition and one 16-bit unsigned integer element saturating subtraction in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks.

Description:
This instruction adds the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs2; at the same time, it subtracts the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for addition and [15:0] of 32-bit chunks in Rd for subtraction.

Operations:

res1 = Rs1.W[x][31:16] + Rs2.W[x][15:0];
res2 = Rs1.W[x][15:0] - Rs2.W[x][31:16];
if (res1 > (2^16)-1) {
res1 = (2^16)-1;
OV = 1;
}
if (res2 < 0) {
res2 = 0;
OV = 1;
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 11665 of file core_feature_dsp.h.

11666 {
11667  unsigned long result;
11668  __ASM volatile("ukcras16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
11669  return result;
11670 }

References __ASM.

◆ __RV_UKCRSA16()

__STATIC_FORCEINLINE unsigned long __RV_UKCRSA16 ( unsigned long  a,
unsigned long  b 
)

UKCRSA16 (SIMD 16-bit Unsigned Saturating Cross Subtraction & Addition)

Type: SIMD

Syntax:

UKCRSA16 Rd, Rs1, Rs2

Purpose:
Do one 16-bit unsigned integer element saturating subtraction and one 16-bit unsigned integer element saturating addition in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs1; at the same time, it adds the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs2 with the 16- bit unsigned integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for subtraction and [15:0] of 32-bit chunks in Rd for addition.

Operations:

res1 = Rs1.W[x][31:16] - Rs2.W[x][15:0];
res2 = Rs1.W[x][15:0] + Rs2.W[x][31:16];
if (res1 < 0) {
res1 = 0;
OV = 1;
} else if (res2 > (2^16)-1) {
res2 = (2^16)-1;
OV = 1;
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 11720 of file core_feature_dsp.h.

11721 {
11722  unsigned long result;
11723  __ASM volatile("ukcrsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
11724  return result;
11725 }

References __ASM.

◆ __RV_UKSTAS16()

__STATIC_FORCEINLINE unsigned long __RV_UKSTAS16 ( unsigned long  a,
unsigned long  b 
)

UKSTAS16 (SIMD 16-bit Unsigned Saturating Straight Addition & Subtraction)

Type: SIMD

Syntax:

UKSTAS16 Rd, Rs1, Rs2

Purpose:
Do one 16-bit unsigned integer element saturating addition and one 16-bit unsigned integer element saturating subtraction in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction adds the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs1 with the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs2; at the same time, it subtracts the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs2 from the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for addition and [15:0] of 32-bit chunks in Rd for subtraction.

Operations:

res1 = Rs1.W[x][31:16] + Rs2.W[x][31:16];
res2 = Rs1.W[x][15:0] - Rs2.W[x][15:0];
if (res1 > (2^16)-1) {
res1 = (2^16)-1;
OV = 1;
}
if (res2 < 0) {
res2 = 0;
OV = 1;
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 11905 of file core_feature_dsp.h.

11906 {
11907  unsigned long result;
11908  __ASM volatile("ukstas16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
11909  return result;
11910 }

References __ASM.

◆ __RV_UKSTSA16()

__STATIC_FORCEINLINE unsigned long __RV_UKSTSA16 ( unsigned long  a,
unsigned long  b 
)

UKSTSA16 (SIMD 16-bit Unsigned Saturating Straight Subtraction & Addition)

Type: SIMD

Syntax:

UKSTSA16 Rd, Rs1, Rs2

Purpose:
Do one 16-bit unsigned integer element saturating subtraction and one 16-bit unsigned integer element saturating addition in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks.

Description:
This instruction subtracts the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs2 from the 16-bit unsigned integer element in [31:16] of 32-bit chunks in Rs1; at the same time, it adds the 16-bit unsigned integer element in [15:0] of 32-bit chunks in Rs2 with the 16- bit unsigned integer element in [15:0] of 32-bit chunks in Rs1. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [31:16] of 32-bit chunks in Rd for subtraction and [15:0] of 32-bit chunks in Rd for addition.

Operations:

res1 = Rs1.W[x][31:16] - Rs2.W[x][31:16];
res2 = Rs1.W[x][15:0] + Rs2.W[x][15:0];
if (res1 < 0) {
res1 = 0;
OV = 1;
} else if (res2 > (2^16)-1) {
res2 = (2^16)-1;
OV = 1;
}
Rd.W[x][31:16] = res1;
Rd.W[x][15:0] = res2;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 11960 of file core_feature_dsp.h.

11961 {
11962  unsigned long result;
11963  __ASM volatile("ukstsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
11964  return result;
11965 }

References __ASM.

◆ __RV_UKSUB16()

__STATIC_FORCEINLINE unsigned long __RV_UKSUB16 ( unsigned long  a,
unsigned long  b 
)

UKSUB16 (SIMD 16-bit Unsigned Saturating Subtraction)

Type: SIMD

Syntax:

UKSUB16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer elements saturating subtractions simultaneously.

Description:
This instruction subtracts the 16-bit unsigned integer elements in Rs2 from the 16-bit unsigned integer elements in Rs1. If any of the results are beyond the 16-bit unsigned number range (0 <= RES <= 2^16-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.H[x] - Rs2.H[x];
if (res[x] < 0) {
res[x] = 0;
OV = 1;
}
Rd.H[x] = res[x];
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 12050 of file core_feature_dsp.h.

12051 {
12052  unsigned long result;
12053  __ASM volatile("uksub16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
12054  return result;
12055 }

References __ASM.

◆ __RV_URADD16()

__STATIC_FORCEINLINE unsigned long __RV_URADD16 ( unsigned long  a,
unsigned long  b 
)

URADD16 (SIMD 16-bit Unsigned Halving Addition)

Type: SIMD

Syntax:

URADD16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit unsigned integer elements in Rs1 with the 16-bit unsigned integer elements in Rs2. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFF, Rb = 0x7FFF Rt = 0x7FFF
* Ra = 0x8000, Rb = 0x8000 Rt = 0x8000
* Ra = 0x4000, Rb = 0x8000 Rt = 0x6000

Operations:

Rd.H[x] = (Rs1.H[x] + Rs2.H[x]) u>> 1;
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 12941 of file core_feature_dsp.h.

12942 {
12943  unsigned long result;
12944  __ASM volatile("uradd16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
12945  return result;
12946 }

References __ASM.

◆ __RV_URCRAS16()

__STATIC_FORCEINLINE unsigned long __RV_URCRAS16 ( unsigned long  a,
unsigned long  b 
)

URCRAS16 (SIMD 16-bit Unsigned Halving Cross Addition & Subtraction)

Type: SIMD

Syntax:

URCRAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element addition and 16-bit unsigned integer element subtraction in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs1 with the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs2, and subtracts the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs2 from the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs1. The element results are first logically right-shifted by 1 bit and then written to [31:16] of 32- bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `URADD16` and `URSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] + Rs2.W[x][15:0]) u>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] - Rs2.W[x][31:16]) u>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13090 of file core_feature_dsp.h.

13091 {
13092  unsigned long result;
13093  __ASM volatile("urcras16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13094  return result;
13095 }

References __ASM.

◆ __RV_URCRSA16()

__STATIC_FORCEINLINE unsigned long __RV_URCRSA16 ( unsigned long  a,
unsigned long  b 
)

URCRSA16 (SIMD 16-bit Unsigned Halving Cross Subtraction & Addition)

Type: SIMD

Syntax:

URCRSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element subtraction and 16-bit unsigned integer element addition in a 32-bit chunk simultaneously. Operands are from crossed positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs2 from the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs1, and adds the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs1 with the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs2. The two results are first logically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `URADD16` and `URSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] - Rs2.W[x][15:0]) u>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] + Rs2.W[x][31:16]) u>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13139 of file core_feature_dsp.h.

13140 {
13141  unsigned long result;
13142  __ASM volatile("urcrsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13143  return result;
13144 }

References __ASM.

◆ __RV_URSTAS16()

__STATIC_FORCEINLINE unsigned long __RV_URSTAS16 ( unsigned long  a,
unsigned long  b 
)

URSTAS16 (SIMD 16-bit Unsigned Halving Straight Addition & Subtraction)

Type: SIMD

Syntax:

URSTAS16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element addition and 16-bit unsigned integer element subtraction in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs1 with the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs2, and subtracts the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs2 from the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs1. The element results are first logically right-shifted by 1 bit and then written to [31:16] of 32- bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `URADD16` and `URSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] + Rs2.W[x][31:16]) u>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] - Rs2.W[x][15:0]) u>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13188 of file core_feature_dsp.h.

13189 {
13190  unsigned long result;
13191  __ASM volatile("urstas16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13192  return result;
13193 }

References __ASM.

◆ __RV_URSTSA16()

__STATIC_FORCEINLINE unsigned long __RV_URSTSA16 ( unsigned long  a,
unsigned long  b 
)

URSTSA16 (SIMD 16-bit Unsigned Halving Straight Subtraction & Addition)

Type: SIMD

Syntax:

URCRSA16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element subtraction and 16-bit unsigned integer element addition in a 32-bit chunk simultaneously. Operands are from corresponding positions in 32-bit chunks. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs2 from the 16-bit unsigned integer in [31:16] of 32-bit chunks in Rs1, and adds the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs1 with the 16-bit unsigned integer in [15:0] of 32-bit chunks in Rs2. The two results are first logically right-shifted by 1 bit and then written to [31:16] of 32-bit chunks in Rd and [15:0] of 32-bit chunks in Rd.

Examples:

Please see `URADD16` and `URSUB16` instructions.

Operations:

Rd.W[x][31:16] = (Rs1.W[x][31:16] - Rs2.W[x][31:16]) u>> 1;
Rd.W[x][15:0] = (Rs1.W[x][15:0] + Rs2.W[x][15:0]) u>> 1;
for RV32, x=0
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13237 of file core_feature_dsp.h.

13238 {
13239  unsigned long result;
13240  __ASM volatile("urstsa16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13241  return result;
13242 }

References __ASM.

◆ __RV_URSUB16()

__STATIC_FORCEINLINE unsigned long __RV_URSUB16 ( unsigned long  a,
unsigned long  b 
)

URSUB16 (SIMD 16-bit Unsigned Halving Subtraction)

Type: SIMD

Syntax:

URSUB16 Rd, Rs1, Rs2

Purpose:
Do 16-bit unsigned integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 16-bit unsigned integer elements in Rs2 from the 16-bit unsigned integer elements in Rs1. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFF, Rb = 0x8000 Rt = 0xFFFF
* Ra = 0x8000, Rb = 0x7FFF Rt = 0x0000
* Ra = 0x8000, Rb = 0x4000 Rt = 0x2000

Operations:

Rd.H[x] = (Rs1.H[x] - Rs2.H[x]) u>> 1;
for RV32: x=1...0,
for RV64: x=3...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13331 of file core_feature_dsp.h.

13332 {
13333  unsigned long result;
13334  __ASM volatile("ursub16 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13335  return result;
13336 }

References __ASM.