NMSIS-Core  Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
Intrinsic Functions for Vector Instructions

Functions that generate RISC-V Vector instructions. More...

Functions

__STATIC_FORCEINLINE void __enable_vector (void)
 Enable Vector Unit. More...
 
__STATIC_FORCEINLINE void __disable_vector (void)
 Disable Vector Unit. More...
 

Detailed Description

Functions that generate RISC-V Vector instructions.

RISC-V Vector Intrinsic APIs are provided directly through compiler generated intrinsic function.

This intrinsic function support by compiler:

For Nuclei RISC-V GCC 10.2, it is an very old and not ratified version(no longer supported).

For Nuclei RISC-V GCC 13/Clang 17, the intrinsic API supported is v0.12 version, see https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v0.12.0

For Nuclei RISC-V GCC 14.2/Clang 19, the intrinsic API supported is v0.11.x version, see https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/v0.11.x

Function Documentation

◆ __disable_vector()

__STATIC_FORCEINLINE void __disable_vector ( void  )

Disable Vector Unit.

Clear vector context status bits to disable vector unit

Definition at line 83 of file core_feature_vector.h.

84 {
86 }
#define MSTATUS_VS
#define __RV_CSR_CLEAR(csr, val)
CSR operation Macro for csrc instruction.
#define CSR_MSTATUS

References __RV_CSR_CLEAR, CSR_MSTATUS, and MSTATUS_VS.

◆ __enable_vector()

__STATIC_FORCEINLINE void __enable_vector ( void  )

Enable Vector Unit.

Set vector context status bits to enable vector unit, and set state to initial

Definition at line 72 of file core_feature_vector.h.

73 {
76 }
#define MSTATUS_VS_INITIAL
#define __RV_CSR_SET(csr, val)
CSR operation Macro for csrs instruction.

References __RV_CSR_CLEAR, __RV_CSR_SET, CSR_MSTATUS, MSTATUS_VS, and MSTATUS_VS_INITIAL.