NMSIS-Core
Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
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(RV64 Only) Non-SIMD 32-bit Shift Instructions More...
Macros | |
#define | __RV_SRAIW_U(a, b) |
SRAIW.u (Rounding Shift Right Arithmetic Immediate Word) More... | |
(RV64 Only) Non-SIMD 32-bit Shift Instructions
there are 1 (RV64 Only) Non-SIMD 32-bit Shift Instructions
#define __RV_SRAIW_U | ( | a, | |
b | |||
) |
SRAIW.u (Rounding Shift Right Arithmetic Immediate Word)
Type: DSP (RV64 only)
Syntax:
Purpose:
Perform a 32-bit arithmetic right shift operation with rounding. The shift amount is an immediate value.
Description:
This instruction right-shifts the lower 32-bit content of Rs1 arithmetically. The shifted out bits are filled with the sign-bit Rs1(31) and the shift amount is specified by the imm5u constant. For the rounding operation, a value of 1 is added to the most significant discarded bit of the data to calculate the final result. And the result is sign-extended and written to Rd.
Operations:
[in] | a | int type of value stored in a |
[in] | b | unsigned int type of value stored in b |
Definition at line 16893 of file core_feature_dsp.h.