NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
(RV64 Only) 32-bit Multiply Instructions

(RV64 Only) 32-bit Multiply Instructions More...

Functions

__STATIC_FORCEINLINE long __RV_SMBB32 (unsigned long a, unsigned long b)
 SMBB32 (Signed Multiply Bottom Word & Bottom Word) More...
 
__STATIC_FORCEINLINE long __RV_SMBT32 (unsigned long a, unsigned long b)
 SMBT32 (Signed Multiply Bottom Word & Top Word) More...
 
__STATIC_FORCEINLINE long __RV_SMTT32 (unsigned long a, unsigned long b)
 SMTT32 (Signed Multiply Top Word & Top Word) More...
 

Detailed Description

(RV64 Only) 32-bit Multiply Instructions

there is 3 RV64 Only) 32-bit Multiply Instructions

Function Documentation

◆ __RV_SMBB32()

__STATIC_FORCEINLINE long __RV_SMBB32 ( unsigned long  a,
unsigned long  b 
)

SMBB32 (Signed Multiply Bottom Word & Bottom Word)

Type: DSP (RV64 Only)

Syntax:

SMBB32 Rd, Rs1, Rs2
SMBT32 Rd, Rs1, Rs2
SMTT32 Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit element of a register with the signed 32-bit element of another register and write the 64-bit result to a third register.

  • SMBB32: bottom*bottom
  • SMBT32: bottom*top
  • SMTT32: top*top

Description:
For the SMBB32 instruction, it multiplies the bottom 32-bit element of Rs1 with the bottom 32-bit element of Rs2. It is actually an alias of MULSR64 instruction. For the SMBT32 instruction, it multiplies the bottom 32-bit element of Rs1 with the top 32-bit element of Rs2. For the SMTT32 instruction, it multiplies the top 32-bit element of Rs1 with the top 32-bit element of Rs2. The 64-bit multiplication result is written to Rd. The 32-bit contents of Rs1 and Rs2 are treated as signed integers.

Operations:

res = Rs1.W[0] * Rs2.W[0]; // SMBB32 res = Rs1.W[0] * Rs2.w[1]; // SMBT32 res = Rs1.W[1] * Rs2.W[1];
// SMTT32 Rd = res;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 16339 of file core_feature_dsp.h.

16340 {
16341  long result;
16342  __ASM volatile("smbb32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16343  return result;
16344 }

References __ASM.

◆ __RV_SMBT32()

__STATIC_FORCEINLINE long __RV_SMBT32 ( unsigned long  a,
unsigned long  b 
)

SMBT32 (Signed Multiply Bottom Word & Top Word)

Type: DSP (RV64 Only)

Syntax:

SMBB32 Rd, Rs1, Rs2
SMBT32 Rd, Rs1, Rs2
SMTT32 Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit element of a register with the signed 32-bit element of another register and write the 64-bit result to a third register.

  • SMBB32: bottom*bottom
  • SMBT32: bottom*top
  • SMTT32: top*top

Description:
For the SMBB32 instruction, it multiplies the bottom 32-bit element of Rs1 with the bottom 32-bit element of Rs2. It is actually an alias of MULSR64 instruction. For the SMBT32 instruction, it multiplies the bottom 32-bit element of Rs1 with the top 32-bit element of Rs2. For the SMTT32 instruction, it multiplies the top 32-bit element of Rs1 with the top 32-bit element of Rs2. The 64-bit multiplication result is written to Rd. The 32-bit contents of Rs1 and Rs2 are treated as signed integers.

Operations:

res = Rs1.W[0] * Rs2.W[0]; // SMBB32 res = Rs1.W[0] * Rs2.w[1]; // SMBT32 res = Rs1.W[1] * Rs2.W[1];
// SMTT32 Rd = res;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 16388 of file core_feature_dsp.h.

16389 {
16390  long result;
16391  __ASM volatile("smbt32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16392  return result;
16393 }

References __ASM.

◆ __RV_SMTT32()

__STATIC_FORCEINLINE long __RV_SMTT32 ( unsigned long  a,
unsigned long  b 
)

SMTT32 (Signed Multiply Top Word & Top Word)

Type: DSP (RV64 Only)

Syntax:

SMBB32 Rd, Rs1, Rs2
SMBT32 Rd, Rs1, Rs2
SMTT32 Rd, Rs1, Rs2

Purpose:
Multiply the signed 32-bit element of a register with the signed 32-bit element of another register and write the 64-bit result to a third register.

  • SMBB32: bottom*bottom
  • SMBT32: bottom*top
  • SMTT32: top*top

Description:
For the SMBB32 instruction, it multiplies the bottom 32-bit element of Rs1 with the bottom 32-bit element of Rs2. It is actually an alias of MULSR64 instruction. For the SMBT32 instruction, it multiplies the bottom 32-bit element of Rs1 with the top 32-bit element of Rs2. For the SMTT32 instruction, it multiplies the top 32-bit element of Rs1 with the top 32-bit element of Rs2. The 64-bit multiplication result is written to Rd. The 32-bit contents of Rs1 and Rs2 are treated as signed integers.

Operations:

res = Rs1.W[0] * Rs2.W[0]; // SMBB32 res = Rs1.W[0] * Rs2.w[1]; // SMBT32 res = Rs1.W[1] * Rs2.W[1];
// SMTT32 Rd = res;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in long type

Definition at line 16437 of file core_feature_dsp.h.

16438 {
16439  long result;
16440  __ASM volatile("smtt32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16441  return result;
16442 }

References __ASM.

__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55