NMSIS-Core
Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
|
64-bit Addition & Subtraction Instructions More...
Functions | |
__STATIC_FORCEINLINE unsigned long long | __RV_ADD64 (unsigned long long a, unsigned long long b) |
ADD64 (64-bit Addition) More... | |
__STATIC_FORCEINLINE long long | __RV_KADD64 (long long a, long long b) |
KADD64 (64-bit Signed Saturating Addition) More... | |
__STATIC_FORCEINLINE long long | __RV_KSUB64 (long long a, long long b) |
KSUB64 (64-bit Signed Saturating Subtraction) More... | |
__STATIC_FORCEINLINE long long | __RV_RADD64 (long long a, long long b) |
RADD64 (64-bit Signed Halving Addition) More... | |
__STATIC_FORCEINLINE long long | __RV_RSUB64 (long long a, long long b) |
RSUB64 (64-bit Signed Halving Subtraction) More... | |
__STATIC_FORCEINLINE unsigned long long | __RV_SUB64 (unsigned long long a, unsigned long long b) |
SUB64 (64-bit Subtraction) More... | |
__STATIC_FORCEINLINE unsigned long long | __RV_UKADD64 (unsigned long long a, unsigned long long b) |
UKADD64 (64-bit Unsigned Saturating Addition) More... | |
__STATIC_FORCEINLINE unsigned long long | __RV_UKSUB64 (unsigned long long a, unsigned long long b) |
UKSUB64 (64-bit Unsigned Saturating Subtraction) More... | |
__STATIC_FORCEINLINE unsigned long long | __RV_URADD64 (unsigned long long a, unsigned long long b) |
URADD64 (64-bit Unsigned Halving Addition) More... | |
__STATIC_FORCEINLINE unsigned long long | __RV_URSUB64 (unsigned long long a, unsigned long long b) |
URSUB64 (64-bit Unsigned Halving Subtraction) More... | |
64-bit Addition & Subtraction Instructions
there are 10 64-bit Addition & Subtraction Instructions.
__STATIC_FORCEINLINE unsigned long long __RV_ADD64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
ADD64 (64-bit Addition)
Type: 64-bit Profile
Syntax:
Purpose:
Add two 64-bit signed or unsigned integers.
RV32 Description:
This instruction adds the 64-bit integer of an even/odd pair of registers specified by Rs1(4,1) with the 64-bit integer of an even/odd pair of registers specified by Rs2(4,1), and then writes the 64-bit result to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction has the same behavior as the ADD instruction in RV64I.
Note:
This instruction can be used for either signed or unsigned addition.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 543 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE long long __RV_KADD64 | ( | long long | a, |
long long | b | ||
) |
KADD64 (64-bit Signed Saturating Addition)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Add two 64-bit signed integers. The result is saturated to the Q63 range.
RV32 Description:
This instruction adds the 64-bit signed integer of an even/odd pair of registers specified by Rs1(4,1) with the 64-bit signed integer of an even/odd pair of registers specified by Rs2(4,1). If the 64-bit result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction adds the 64-bit signed integer in Rs1 with the 64-bit signed integer in Rs2. If the result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written to Rd.
Operations:
[in] | a | long long type of value stored in a |
[in] | b | long long type of value stored in b |
Definition at line 1666 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE long long __RV_KSUB64 | ( | long long | a, |
long long | b | ||
) |
KSUB64 (64-bit Signed Saturating Subtraction)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Perform a 64-bit signed integer subtraction. The result is saturated to the Q63 range.
RV32 Description:
This instruction subtracts the 64-bit signed integer of an even/odd pair of registers specified by Rs2(4,1) from the 64-bit signed integer of an even/odd pair of registers specified by Rs1(4,1). If the 64-bit result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the operand and the even 2d
register of the pair contains the low 32-bit of the operand.
RV64 Description:
This instruction subtracts the 64-bit signed integer of Rs2 from the 64-bit signed integer of Rs1. If the 64-bit result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to Rd.
Operations:
[in] | a | long long type of value stored in a |
[in] | b | long long type of value stored in b |
Definition at line 5496 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE long long __RV_RADD64 | ( | long long | a, |
long long | b | ||
) |
RADD64 (64-bit Signed Halving Addition)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Add two 64-bit signed integers. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction adds the 64-bit signed integer of an even/odd pair of registers specified by Rs1(4,1) with the 64-bit signed integer of an even/odd pair of registers specified by Rs2(4,1). The 64-bit addition result is first arithmetically right-shifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction adds the 64-bit signed integer in Rs1 with the 64-bit signed integer in Rs2. The 64-bit addition result is first arithmetically right-shifted by 1 bit and then written to Rd.
Operations:
[in] | a | long long type of value stored in a |
[in] | b | long long type of value stored in b |
Definition at line 6401 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE long long __RV_RSUB64 | ( | long long | a, |
long long | b | ||
) |
RSUB64 (64-bit Signed Halving Subtraction)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Perform a 64-bit signed integer subtraction. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction subtracts the 64-bit signed integer of an even/odd pair of registers specified by Rb(4,1) from the 64-bit signed integer of an even/odd pair of registers specified by Ra(4,1). The subtraction result is first arithmetically right-shifted by 1 bit and then written to an even/odd pair of registers specified by Rt(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction subtracts the 64-bit signed integer in Rs2 from the 64-bit signed integer in Rs1. The 64-bit subtraction result is first arithmetically right-shifted by 1 bit and then written to Rd.
Operations:
[in] | a | long long type of value stored in a |
[in] | b | long long type of value stored in b |
Definition at line 6820 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE unsigned long long __RV_SUB64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
SUB64 (64-bit Subtraction)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Perform a 64-bit signed or unsigned integer subtraction.
RV32 Description:
This instruction subtracts the 64-bit integer of an even/odd pair of registers specified by Rs2(4,1) from the 64-bit integer of an even/odd pair of registers specified by Rs1(4,1), and then writes the 64-bit result to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the operand and the even 2d
register of the pair contains the low 32-bit of the operand.
RV64 Description:
This instruction subtracts the 64-bit integer of Rs2 from the 64-bit integer of Rs1, and then writes the 64-bit result to Rd.
Note:
This instruction can be used for either signed or unsigned subtraction.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 10763 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE unsigned long long __RV_UKADD64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
UKADD64 (64-bit Unsigned Saturating Addition)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Add two 64-bit unsigned integers. The result is saturated to the U64 range.
RV32 Description:
This instruction adds the 64-bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1) with the 64-bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1). If the 64-bit result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction adds the 64-bit unsigned integer in Rs1 with the 64-bit unsigned integer in Rs2. If the 64-bit result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written to Rd.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 11524 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE unsigned long long __RV_UKSUB64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
UKSUB64 (64-bit Unsigned Saturating Subtraction)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Perform a 64-bit signed integer subtraction. The result is saturated to the U64 range.
RV32 Description:
This instruction subtracts the 64-bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1) from the 64-bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1). If the 64-bit result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the operand and the even 2d
register of the pair contains the low 32-bit of the operand.
RV64 Description:
This instruction subtracts the 64-bit unsigned integer of Rs2 from the 64-bit unsigned integer of an even/odd pair of Rs1. If the 64-bit result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to Rd.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 12113 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE unsigned long long __RV_URADD64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
URADD64 (64-bit Unsigned Halving Addition)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Add two 64-bit unsigned integers. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction adds the 64-bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1) with the 64-bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1). The 64-bit addition result is first logically right-shifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction adds the 64-bit unsigned integer in Rs1 with the 64-bit unsigned integer Rs2. The 64-bit addition result is first logically right-shifted by 1 bit and then written to Rd.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 12993 of file core_feature_dsp.h.
References __ASM.
__STATIC_FORCEINLINE unsigned long long __RV_URSUB64 | ( | unsigned long long | a, |
unsigned long long | b | ||
) |
URSUB64 (64-bit Unsigned Halving Subtraction)
Type: DSP (64-bit Profile)
Syntax:
Purpose:
Perform a 64-bit unsigned integer subtraction. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction subtracts the 64-bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1) from the 64-bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1). The subtraction result is first logically right-shifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd 2d+1
register of the pair contains the high 32-bit of the result and the even 2d
register of the pair contains the low 32-bit of the result.
RV64 Description:
This instruction subtracts the 64-bit unsigned integer in Rs2 from the 64-bit unsigned integer in Rs1. The subtraction result is first logically right-shifted by 1 bit and then written to Rd.
Operations:
[in] | a | unsigned long long type of value stored in a |
[in] | b | unsigned long long type of value stored in b |
Definition at line 13385 of file core_feature_dsp.h.
References __ASM.