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NMSIS-Core
Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
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NMSIS-Core
Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
|
Functions that used to do benchmark and test suite. More...
Macros | |
| #define | READ_CYCLE __get_rv_cycle |
| When XLEN=32, reading the full 64-bit CYCLE register incurs additional overhead. More... | |
| #define | BENCH_DECLARE_VAR() |
| Declare benchmark required variables, need to be placed above all BENCH_xxx macros in each c source code if BENCH_xxx used. More... | |
| #define | BENCH_INIT() |
| Initialize benchmark environment, need to called in before other BENCH_xxx macros are called. More... | |
| #define | BENCH_RESET(proc) _bc_sumcyc = 0; _bc_usecyc = 0; _bc_lpcnt = 0; _bc_ercd = 0; |
| Reset benchmark sum cycle and use cycle for proc. More... | |
| #define | BENCH_START(proc) |
| Start to do benchmark for proc, and record start cycle, and reset error code. More... | |
| #define | BENCH_SAMPLE(proc) |
| Sample a benchmark for proc, and record this start -> sample cost cycle, and accumulate it to sum cycle. More... | |
| #define | BENCH_END(proc) |
| Mark end of benchmark for proc, and calc used cycle, and print it. More... | |
| #define | BENCH_STOP(proc) printf("CSV, %s, %lu\n", #proc, (unsigned long)_bc_sumcyc); |
| Mark stop of benchmark, start -> sample -> sample -> stop, and print the sum cycle of a proc. More... | |
| #define | BENCH_STAT(proc) printf("STAT, %s, %lu, %lu\n", #proc, (unsigned long)_bc_lpcnt, (unsigned long)_bc_sumcyc); |
| Show statistics of benchmark, format: STAT, proc, loopcnt, sumcyc. More... | |
| #define | BENCH_GET_USECYC() (_bc_usecyc) |
| Get benchmark use cycle. More... | |
| #define | BENCH_GET_SUMCYC() (_bc_sumcyc) |
| Get benchmark sum cycle. More... | |
| #define | BENCH_GET_LPCNT() (_bc_lpcnt) |
| Get benchmark loop count. More... | |
| #define | BENCH_ERROR(proc) _bc_ercd = 1; |
| Mark benchmark for proc is errored. More... | |
| #define | BENCH_STATUS(proc) |
| Show the status of the benchmark. More... | |
| #define | EVENT_SEL_INSTRUCTION_COMMIT 0 |
| #define | EVENT_SEL_MEMORY_ACCESS 1 |
| #define | EVENT_SEL_TYPE_0 0 |
| #define | EVENT_SEL_TYPE_1 1 |
| #define | EVENT_SEL_TYPE_2 2 |
| #define | EVENT_SEL_TYPE_3 3 |
| #define | EVENT_INSTRUCTION_COMMIT_CYCLE_COUNT 1 |
| #define | EVENT_INSTRUCTION_COMMIT_RETIRED_COUNT 2 |
| #define | EVENT_INSTRUCTION_COMMIT_INTEGER_LOAD 3 |
| #define | EVENT_INSTRUCTION_COMMIT_INTEGER_STORE 4 |
| #define | EVENT_INSTRUCTION_COMMIT_ATOMIC_MEMORY_OPERATION 5 |
| #define | EVENT_INSTRUCTION_COMMIT_SYSTEM 6 |
| #define | EVENT_INSTRUCTION_COMMIT_INTEGER_COMPUTATIONAL 7 |
| #define | EVENT_INSTRUCTION_COMMIT_CONDITIONAL_BRANCH 8 |
| #define | EVENT_INSTRUCTION_COMMIT_TAKEN_CONDITIONAL_BRANCH 9 |
| #define | EVENT_INSTRUCTION_COMMIT_JAL 10 |
| #define | EVENT_INSTRUCTION_COMMIT_JALR 11 |
| #define | EVENT_INSTRUCTION_COMMIT_RETURN 12 |
| #define | EVENT_INSTRUCTION_COMMIT_CONTROL_TRANSFER 13 |
| #define | EVENT_INSTRUCTION_COMMIT_FENCE_INSTRUCTION 14 |
| #define | EVENT_INSTRUCTION_COMMIT_INTEGER_MULTIPLICATION 15 |
| #define | EVENT_INSTRUCTION_COMMIT_INTEGER_DIVISION_REMAINDER 16 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_LOAD 17 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_STORE 18 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_ADDITION_SUBTRACTION 19 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_MULTIPLICATION 20 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_FUSED_MULTIPLY_ADD_SUB 21 |
| #define | EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_DIVISION_OR_SQUARE_ROOT 22 |
| #define | EVENT_INSTRUCTION_COMMIT_OTHER_FLOATING_POINT_INSTRUCTION 23 |
| #define | EVENT_INSTRUCTION_COMMIT_CONDITIONAL_BRANCH_PREDICTION_FAIL 24 |
| #define | EVENT_INSTRUCTION_COMMIT_JALR_PREDICTION_FAIL 25 |
| #define | EVENT_INSTRUCTION_COMMIT_POP_PREDICTION_FAIL 26 |
| #define | EVENT_INSTRUCTION_COMMIT_FENCEI_INSTRUCTION 27 |
| #define | EVENT_INSTRUCTION_COMMIT_SFENCE_INSTRUCTION 28 |
| #define | EVENT_INSTRUCTION_COMMIT_ECALL_INSTRUCTION 29 |
| #define | EVENT_INSTRUCTION_COMMIT_EXCEPTION_INSTRUCTION 30 |
| #define | EVENT_INSTRUCTION_COMMIT_INTERRUPT_INSTRUCTION 31 |
| #define | EVENT_MEMORY_ACCESS_ICACHE_MISS 1 |
| #define | EVENT_MEMORY_ACCESS_DCACHE_MISS 2 |
| #define | EVENT_MEMORY_ACCESS_ITLB_MISS 3 |
| #define | EVENT_MEMORY_ACCESS_DTLB_MISS 4 |
| #define | EVENT_MEMORY_ACCESS_MAIN_DTLB_MISS 5 |
| #define | EVENT_MEMORY_ACCESS_MAIN_TLB_MISS 5 |
| #define | EVENT_MEMORY_ACCESS_L2_CACHE_ACCESS 8 |
| #define | EVENT_MEMORY_ACCESS_L2_CACHE_MISS 9 |
| #define | EVENT_MEMORY_ACCESS_MEMORY_BUS_REQUEST 10 |
| #define | EVENT_MEMORY_ACCESS_IFU_STALL_CYCLE 11 |
| #define | EVENT_MEMORY_ACCESS_EXU_STALL_CYCLE 12 |
| #define | EVENT_MEMORY_ACCESS_TIMER 13 |
| #define | EVENT_TYPE_0_CYCLE_COUNT 1 |
| #define | EVENT_TYPE_0_RETIRED_COUNT 2 |
| #define | EVENT_TYPE_0_INTEGER_LOAD 3 |
| #define | EVENT_TYPE_0_INTEGER_STORE 4 |
| #define | EVENT_TYPE_0_ATOMIC_MEMORY_OPERATION 5 |
| #define | EVENT_TYPE_0_SYSTEM 6 |
| #define | EVENT_TYPE_0_INTEGER_COMPUTATIONAL 7 |
| #define | EVENT_TYPE_0_CONDITIONAL_BRANCH 8 |
| #define | EVENT_TYPE_0_TAKEN_CONDITIONAL_BRANCH 9 |
| #define | EVENT_TYPE_0_JAL 10 |
| #define | EVENT_TYPE_0_JALR 11 |
| #define | EVENT_TYPE_0_RETURN 12 |
| #define | EVENT_TYPE_0_CONTROL_TRANSFER 13 |
| #define | EVENT_TYPE_0_FENCE_INSTRUCTION 14 |
| #define | EVENT_TYPE_0_INTEGER_MULTIPLICATION 15 |
| #define | EVENT_TYPE_0_INTEGER_DIVISION_REMAINDER 16 |
| #define | EVENT_TYPE_0_FLOATING_POINT_LOAD 17 |
| #define | EVENT_TYPE_0_FLOATING_POINT_STORE 18 |
| #define | EVENT_TYPE_0_FLOATING_POINT_ADDITION_SUBTRACTION 19 |
| #define | EVENT_TYPE_0_FLOATING_POINT_MULTIPLICATION 20 |
| #define | EVENT_TYPE_0_FLOATING_POINT_FUSED_MULTIPLY_ADD_SUB 21 |
| #define | EVENT_TYPE_0_FLOATING_POINT_DIVISION_OR_SQUARE_ROOT 22 |
| #define | EVENT_TYPE_0_OTHER_FLOATING_POINT_INSTRUCTION 23 |
| #define | EVENT_TYPE_0_CONDITIONAL_BRANCH_PREDICTION_FAIL 24 |
| #define | EVENT_TYPE_0_JALR_PREDICTION_FAIL 25 |
| #define | EVENT_TYPE_0_POP_PREDICTION_FAIL 26 |
| #define | EVENT_TYPE_0_FENCEI_INSTRUCTION 27 |
| #define | EVENT_TYPE_0_SFENCE_INSTRUCTION 28 |
| #define | EVENT_TYPE_0_ECALL_INSTRUCTION 29 |
| #define | EVENT_TYPE_0_EXCEPTION_INSTRUCTION 30 |
| #define | EVENT_TYPE_0_INTERRUPT_INSTRUCTION 31 |
| #define | EVENT_TYPE_1_ICACHE_READ_MISS 1 |
| #define | EVENT_TYPE_1_DCACHE_RW_MISS 2 |
| #define | EVENT_TYPE_1_ITLB_READ_MISS 3 |
| #define | EVENT_TYPE_1_DTLB_RW_MISS 4 |
| #define | EVENT_TYPE_1_MAIN_TLB_MISS 5 |
| #define | EVENT_TYPE_1_L2_CACHE_ACCESS 8 |
| #define | EVENT_TYPE_1_L2_CACHE_MISS 9 |
| #define | EVENT_TYPE_1_MEMORY_BUS_REQUEST 10 |
| #define | EVENT_TYPE_1_IFU_STALL_CYCLE 11 |
| #define | EVENT_TYPE_1_EXU_STALL_CYCLE 12 |
| #define | EVENT_TYPE_1_TIMER 13 |
| #define | EVENT_TYPE_2_BRANCH_INSTRUCTION_COMMIT 2 |
| #define | EVENT_TYPE_2_BRANCH_PREDICT_FAIL_COMMIT 3 |
| #define | EVENT_TYPE_3_DCACHE_READ 0 |
| #define | EVENT_TYPE_3_DCACHE_READ_MISS 1 |
| #define | EVENT_TYPE_3_DCACHE_WRITE 2 |
| #define | EVENT_TYPE_3_DCACHE_WRITE_MISS 3 |
| #define | EVENT_TYPE_3_DCACHE_PREFETCH 4 |
| #define | EVENT_TYPE_3_DCACHE_PREFETCH_MISS 5 |
| #define | EVENT_TYPE_3_ICACHE_READ 6 |
| #define | EVENT_TYPE_3_ICACHE_PREFETCH 8 |
| #define | EVENT_TYPE_3_ICACHE_PREFETCH_MISS 9 |
| #define | EVENT_TYPE_3_L2_CACHE_READ_HIT 10 |
| #define | EVENT_TYPE_3_L2_CACHE_READ_MISS 11 |
| #define | EVENT_TYPE_3_L2_CACHE_WRITE_HIT 12 |
| #define | EVENT_TYPE_3_L2_CACHE_WRITE_MISS 13 |
| #define | EVENT_TYPE_3_L2_CACHE_PREFETCH_HIT 14 |
| #define | EVENT_TYPE_3_L2_CACHE_PREFETCH_MISS 15 |
| #define | EVENT_TYPE_3_DTLB_READ 16 |
| #define | EVENT_TYPE_3_DTLB_READ_MISS 17 |
| #define | EVENT_TYPE_3_DTLB_WRITE 18 |
| #define | EVENT_TYPE_3_DTLB_WRITE_MISS 19 |
| #define | EVENT_TYPE_3_ITLB_READ 20 |
| #define | EVENT_TYPE_3_BTB_READ 22 |
| #define | EVENT_TYPE_3_BTB_READ_MISS 23 |
| #define | EVENT_TYPE_3_BTB_WRITE 24 |
| #define | EVENT_TYPE_3_BTB_WRITE_MISS 25 |
| #define | MSU_EVENT_ENABLE 0x0F |
| #define | MEVENT_EN 0x08 |
| #define | SEVENT_EN 0x02 |
| #define | UEVENT_EN 0x01 |
| #define | READ_HPM_COUNTER __get_hpm_counter |
| #define | HPM_DECLARE_VAR(idx) |
| Declare high performance monitor counter idx benchmark required variables, need to be placed above all HPM_xxx macros in each c source code if HPM_xxx used. More... | |
| #define | HPM_SEL_ENABLE(ena) (ena << 28) |
| #define | HPM_SEL_EVENT(sel, idx) ((sel) | (idx << 4)) |
| #define | HPM_EVENT(sel, idx, ena) (HPM_SEL_ENABLE(ena) | HPM_SEL_EVENT(sel, idx)) |
| Construct a event variable to be set(sel -> event_sel, idx -> event_idx, ena -> m/s/u_enable) More... | |
| #define | HPM_INIT() |
| Initialize high performance monitor environment, need to called in before other HPM_xxx macros are called. More... | |
| #define | HPM_RESET(idx, proc, event) __hpm_sumcyc##idx = 0; __hpm_lpcnt##idx = 0; |
| Reset high performance benchmark for proc using counter which index is idx. More... | |
| #define | HPM_START(idx, proc, event) |
| Start to do high performance benchmark for proc, and record start hpm counter. More... | |
| #define | HPM_SAMPLE(idx, proc, event) |
| Do high performance benchmark sample for proc, and sum it into sum counter. More... | |
| #define | HPM_END(idx, proc, event) |
| Mark end of high performance benchmark for proc, and calc used hpm counter value. More... | |
| #define | HPM_STOP(idx, proc, event) printf("HPM%d:0x%x, %s, %lu\n", idx, event, #proc, (unsigned long)__hpm_sumcyc##idx); |
| Mark stop of hpm benchmark, start -> sample -> sample -> stop, and print the sum cycle of a proc. More... | |
| #define | HPM_STAT(idx, proc, event) printf("STATHPM%d:0x%x, %s, %lu, %lu\n", idx, event, #proc, (unsigned long)__hpm_lpcnt##idx, (unsigned long)__hpm_sumcyc##idx); |
| Show statistics of hpm benchmark, format: STATHPM::idx:event, proc, loopcnt, sumcyc. More... | |
| #define | HPM_GET_USECYC(idx) (__hpm_usecyc##idx) |
| Get hpm benchmark use cycle for counter idx. More... | |
| #define | HPM_GET_SUMCYC(idx) (__hpm_sumcyc##idx) |
| Get hpm benchmark sum cycle for counter idx. More... | |
| #define | HPM_GET_LPCNT(idx) (__hpm_lpcnt##idx) |
| Get hpm benchmark loop count for counter idx. More... | |
| #define | NMSIS_TEST_PASS() printf("\nNMSIS_TEST_PASS\n"); |
| Mark test or application passed. More... | |
| #define | NMSIS_TEST_FAIL() printf("\nNMSIS_TEST_FAIL\n"); |
| Mark test or application failed. More... | |
Functions | |
| __STATIC_FORCEINLINE void | __prepare_bench_env (void) |
| Prepare benchmark environment. More... | |
Functions that used to do benchmark and test suite.
NMSIS benchmark and test related helper functions are provided to help do benchmark and test case pass/fail assertion.
If you want to do calculate cpu cycle cost of a process, you can use BENCH_xxx macros defined in this.
In a single c source code file, you should include nmsis_bench.h, and then you should place BENCH_DECLARE_VAR(); before call other BENCH_xxx macros. If you want to start to do benchmark, you should only call BENCH_INIT(); once in your source code, and then place BENCH_START(proc_name); and BENCH_END(proc_name) before and after the process you want to measure. You can refer to <nuclei-sdk>/application/baremetal/demo_dsp for how to use it.
If you want to disable the benchmark calculation, you can place #define DISABLE_NMSIS_BENCH before include nmsis_bench.h
If in your c test source code, you can add NMSIS_TEST_PASS(); and NMSIS_TEST_FAIL(); to mark c test is pass or fail.
| #define BENCH_DECLARE_VAR | ( | ) |
Declare benchmark required variables, need to be placed above all BENCH_xxx macros in each c source code if BENCH_xxx used.
Definition at line 102 of file nmsis_bench.h.
| #define BENCH_END | ( | proc | ) |
Mark end of benchmark for proc, and calc used cycle, and print it.
Definition at line 123 of file nmsis_bench.h.
| #define BENCH_ERROR | ( | proc | ) | _bc_ercd = 1; |
Mark benchmark for proc is errored.
Definition at line 142 of file nmsis_bench.h.
| #define BENCH_GET_LPCNT | ( | ) | (_bc_lpcnt) |
Get benchmark loop count.
Definition at line 139 of file nmsis_bench.h.
| #define BENCH_GET_SUMCYC | ( | ) | (_bc_sumcyc) |
Get benchmark sum cycle.
Definition at line 136 of file nmsis_bench.h.
| #define BENCH_GET_USECYC | ( | ) | (_bc_usecyc) |
Get benchmark use cycle.
Definition at line 133 of file nmsis_bench.h.
| #define BENCH_INIT | ( | ) |
Initialize benchmark environment, need to called in before other BENCH_xxx macros are called.
Definition at line 106 of file nmsis_bench.h.
| #define BENCH_RESET | ( | proc | ) | _bc_sumcyc = 0; _bc_usecyc = 0; _bc_lpcnt = 0; _bc_ercd = 0; |
Reset benchmark sum cycle and use cycle for proc.
Definition at line 111 of file nmsis_bench.h.
| #define BENCH_SAMPLE | ( | proc | ) |
Sample a benchmark for proc, and record this start -> sample cost cycle, and accumulate it to sum cycle.
Definition at line 118 of file nmsis_bench.h.
| #define BENCH_START | ( | proc | ) |
Start to do benchmark for proc, and record start cycle, and reset error code.
Definition at line 114 of file nmsis_bench.h.
| #define BENCH_STAT | ( | proc | ) | printf("STAT, %s, %lu, %lu\n", #proc, (unsigned long)_bc_lpcnt, (unsigned long)_bc_sumcyc); |
Show statistics of benchmark, format: STAT, proc, loopcnt, sumcyc.
Definition at line 130 of file nmsis_bench.h.
| #define BENCH_STATUS | ( | proc | ) |
Show the status of the benchmark.
Definition at line 144 of file nmsis_bench.h.
| #define BENCH_STOP | ( | proc | ) | printf("CSV, %s, %lu\n", #proc, (unsigned long)_bc_sumcyc); |
Mark stop of benchmark, start -> sample -> sample -> stop, and print the sum cycle of a proc.
Definition at line 127 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_ATOMIC_MEMORY_OPERATION 5 |
Definition at line 190 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_CONDITIONAL_BRANCH 8 |
Definition at line 195 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_CONDITIONAL_BRANCH_PREDICTION_FAIL 24 |
Definition at line 216 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_CONTROL_TRANSFER 13 |
Definition at line 201 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_CYCLE_COUNT 1 |
Definition at line 183 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_ECALL_INSTRUCTION 29 |
Definition at line 222 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_EXCEPTION_INSTRUCTION 30 |
Definition at line 223 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FENCE_INSTRUCTION 14 |
Definition at line 203 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FENCEI_INSTRUCTION 27 |
Definition at line 220 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_ADDITION_SUBTRACTION 19 |
Definition at line 210 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_DIVISION_OR_SQUARE_ROOT 22 |
Definition at line 214 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_FUSED_MULTIPLY_ADD_SUB 21 |
Definition at line 213 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_LOAD 17 |
Definition at line 207 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_MULTIPLICATION 20 |
Definition at line 211 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_FLOATING_POINT_STORE 18 |
Definition at line 208 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTEGER_COMPUTATIONAL 7 |
Definition at line 194 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTEGER_DIVISION_REMAINDER 16 |
Definition at line 206 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTEGER_LOAD 3 |
Definition at line 186 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTEGER_MULTIPLICATION 15 |
Definition at line 204 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTEGER_STORE 4 |
Definition at line 188 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_INTERRUPT_INSTRUCTION 31 |
Definition at line 224 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_JAL 10 |
Definition at line 197 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_JALR 11 |
Definition at line 198 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_JALR_PREDICTION_FAIL 25 |
Definition at line 218 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_OTHER_FLOATING_POINT_INSTRUCTION 23 |
Definition at line 215 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_POP_PREDICTION_FAIL 26 |
Definition at line 219 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_RETIRED_COUNT 2 |
Definition at line 184 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_RETURN 12 |
Definition at line 199 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_SFENCE_INSTRUCTION 28 |
Definition at line 221 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_SYSTEM 6 |
Definition at line 192 of file nmsis_bench.h.
| #define EVENT_INSTRUCTION_COMMIT_TAKEN_CONDITIONAL_BRANCH 9 |
Definition at line 196 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_DCACHE_MISS 2 |
Definition at line 228 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_DTLB_MISS 4 |
Definition at line 230 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_EXU_STALL_CYCLE 12 |
Definition at line 241 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_ICACHE_MISS 1 |
Definition at line 227 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_IFU_STALL_CYCLE 11 |
Definition at line 240 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_ITLB_MISS 3 |
Definition at line 229 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_L2_CACHE_ACCESS 8 |
Definition at line 234 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_L2_CACHE_MISS 9 |
Definition at line 235 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_MAIN_DTLB_MISS 5 |
Definition at line 231 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_MAIN_TLB_MISS 5 |
Definition at line 232 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_MEMORY_BUS_REQUEST 10 |
Definition at line 239 of file nmsis_bench.h.
| #define EVENT_MEMORY_ACCESS_TIMER 13 |
Definition at line 242 of file nmsis_bench.h.
| #define EVENT_SEL_INSTRUCTION_COMMIT 0 |
Definition at line 174 of file nmsis_bench.h.
| #define EVENT_SEL_MEMORY_ACCESS 1 |
Definition at line 175 of file nmsis_bench.h.
| #define EVENT_SEL_TYPE_0 0 |
Definition at line 176 of file nmsis_bench.h.
| #define EVENT_SEL_TYPE_1 1 |
Definition at line 177 of file nmsis_bench.h.
| #define EVENT_SEL_TYPE_2 2 |
Definition at line 179 of file nmsis_bench.h.
| #define EVENT_SEL_TYPE_3 3 |
Definition at line 180 of file nmsis_bench.h.
| #define EVENT_TYPE_0_ATOMIC_MEMORY_OPERATION 5 |
Definition at line 254 of file nmsis_bench.h.
| #define EVENT_TYPE_0_CONDITIONAL_BRANCH 8 |
Definition at line 257 of file nmsis_bench.h.
| #define EVENT_TYPE_0_CONDITIONAL_BRANCH_PREDICTION_FAIL 24 |
Definition at line 273 of file nmsis_bench.h.
| #define EVENT_TYPE_0_CONTROL_TRANSFER 13 |
Definition at line 262 of file nmsis_bench.h.
| #define EVENT_TYPE_0_CYCLE_COUNT 1 |
Definition at line 250 of file nmsis_bench.h.
| #define EVENT_TYPE_0_ECALL_INSTRUCTION 29 |
Definition at line 278 of file nmsis_bench.h.
| #define EVENT_TYPE_0_EXCEPTION_INSTRUCTION 30 |
Definition at line 279 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FENCE_INSTRUCTION 14 |
Definition at line 263 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FENCEI_INSTRUCTION 27 |
Definition at line 276 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_ADDITION_SUBTRACTION 19 |
Definition at line 268 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_DIVISION_OR_SQUARE_ROOT 22 |
Definition at line 271 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_FUSED_MULTIPLY_ADD_SUB 21 |
Definition at line 270 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_LOAD 17 |
Definition at line 266 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_MULTIPLICATION 20 |
Definition at line 269 of file nmsis_bench.h.
| #define EVENT_TYPE_0_FLOATING_POINT_STORE 18 |
Definition at line 267 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTEGER_COMPUTATIONAL 7 |
Definition at line 256 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTEGER_DIVISION_REMAINDER 16 |
Definition at line 265 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTEGER_LOAD 3 |
Definition at line 252 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTEGER_MULTIPLICATION 15 |
Definition at line 264 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTEGER_STORE 4 |
Definition at line 253 of file nmsis_bench.h.
| #define EVENT_TYPE_0_INTERRUPT_INSTRUCTION 31 |
Definition at line 280 of file nmsis_bench.h.
| #define EVENT_TYPE_0_JAL 10 |
Definition at line 259 of file nmsis_bench.h.
| #define EVENT_TYPE_0_JALR 11 |
Definition at line 260 of file nmsis_bench.h.
| #define EVENT_TYPE_0_JALR_PREDICTION_FAIL 25 |
Definition at line 274 of file nmsis_bench.h.
| #define EVENT_TYPE_0_OTHER_FLOATING_POINT_INSTRUCTION 23 |
Definition at line 272 of file nmsis_bench.h.
| #define EVENT_TYPE_0_POP_PREDICTION_FAIL 26 |
Definition at line 275 of file nmsis_bench.h.
| #define EVENT_TYPE_0_RETIRED_COUNT 2 |
Definition at line 251 of file nmsis_bench.h.
| #define EVENT_TYPE_0_RETURN 12 |
Definition at line 261 of file nmsis_bench.h.
| #define EVENT_TYPE_0_SFENCE_INSTRUCTION 28 |
Definition at line 277 of file nmsis_bench.h.
| #define EVENT_TYPE_0_SYSTEM 6 |
Definition at line 255 of file nmsis_bench.h.
| #define EVENT_TYPE_0_TAKEN_CONDITIONAL_BRANCH 9 |
Definition at line 258 of file nmsis_bench.h.
| #define EVENT_TYPE_1_DCACHE_RW_MISS 2 |
Definition at line 284 of file nmsis_bench.h.
| #define EVENT_TYPE_1_DTLB_RW_MISS 4 |
Definition at line 286 of file nmsis_bench.h.
| #define EVENT_TYPE_1_EXU_STALL_CYCLE 12 |
Definition at line 292 of file nmsis_bench.h.
| #define EVENT_TYPE_1_ICACHE_READ_MISS 1 |
Definition at line 283 of file nmsis_bench.h.
| #define EVENT_TYPE_1_IFU_STALL_CYCLE 11 |
Definition at line 291 of file nmsis_bench.h.
| #define EVENT_TYPE_1_ITLB_READ_MISS 3 |
Definition at line 285 of file nmsis_bench.h.
| #define EVENT_TYPE_1_L2_CACHE_ACCESS 8 |
Definition at line 288 of file nmsis_bench.h.
| #define EVENT_TYPE_1_L2_CACHE_MISS 9 |
Definition at line 289 of file nmsis_bench.h.
| #define EVENT_TYPE_1_MAIN_TLB_MISS 5 |
Definition at line 287 of file nmsis_bench.h.
| #define EVENT_TYPE_1_MEMORY_BUS_REQUEST 10 |
Definition at line 290 of file nmsis_bench.h.
| #define EVENT_TYPE_1_TIMER 13 |
Definition at line 293 of file nmsis_bench.h.
| #define EVENT_TYPE_2_BRANCH_INSTRUCTION_COMMIT 2 |
Definition at line 296 of file nmsis_bench.h.
| #define EVENT_TYPE_2_BRANCH_PREDICT_FAIL_COMMIT 3 |
Definition at line 297 of file nmsis_bench.h.
| #define EVENT_TYPE_3_BTB_READ 22 |
Definition at line 320 of file nmsis_bench.h.
| #define EVENT_TYPE_3_BTB_READ_MISS 23 |
Definition at line 321 of file nmsis_bench.h.
| #define EVENT_TYPE_3_BTB_WRITE 24 |
Definition at line 322 of file nmsis_bench.h.
| #define EVENT_TYPE_3_BTB_WRITE_MISS 25 |
Definition at line 323 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_PREFETCH 4 |
Definition at line 304 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_PREFETCH_MISS 5 |
Definition at line 305 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_READ 0 |
Definition at line 300 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_READ_MISS 1 |
Definition at line 301 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_WRITE 2 |
Definition at line 302 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DCACHE_WRITE_MISS 3 |
Definition at line 303 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DTLB_READ 16 |
Definition at line 315 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DTLB_READ_MISS 17 |
Definition at line 316 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DTLB_WRITE 18 |
Definition at line 317 of file nmsis_bench.h.
| #define EVENT_TYPE_3_DTLB_WRITE_MISS 19 |
Definition at line 318 of file nmsis_bench.h.
| #define EVENT_TYPE_3_ICACHE_PREFETCH 8 |
Definition at line 307 of file nmsis_bench.h.
| #define EVENT_TYPE_3_ICACHE_PREFETCH_MISS 9 |
Definition at line 308 of file nmsis_bench.h.
| #define EVENT_TYPE_3_ICACHE_READ 6 |
Definition at line 306 of file nmsis_bench.h.
| #define EVENT_TYPE_3_ITLB_READ 20 |
Definition at line 319 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_PREFETCH_HIT 14 |
Definition at line 313 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_PREFETCH_MISS 15 |
Definition at line 314 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_READ_HIT 10 |
Definition at line 309 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_READ_MISS 11 |
Definition at line 310 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_WRITE_HIT 12 |
Definition at line 311 of file nmsis_bench.h.
| #define EVENT_TYPE_3_L2_CACHE_WRITE_MISS 13 |
Definition at line 312 of file nmsis_bench.h.
| #define HPM_DECLARE_VAR | ( | idx | ) |
Declare high performance monitor counter idx benchmark required variables, need to be placed above all HPM_xxx macros in each c source code if HPM_xxx used.
Definition at line 341 of file nmsis_bench.h.
| #define HPM_END | ( | idx, | |
| proc, | |||
| event | |||
| ) |
Mark end of high performance benchmark for proc, and calc used hpm counter value.
Definition at line 372 of file nmsis_bench.h.
| #define HPM_EVENT | ( | sel, | |
| idx, | |||
| ena | |||
| ) | (HPM_SEL_ENABLE(ena) | HPM_SEL_EVENT(sel, idx)) |
Construct a event variable to be set(sel -> event_sel, idx -> event_idx, ena -> m/s/u_enable)
Definition at line 348 of file nmsis_bench.h.
| #define HPM_GET_LPCNT | ( | idx | ) | (__hpm_lpcnt##idx) |
Get hpm benchmark loop count for counter idx.
Definition at line 391 of file nmsis_bench.h.
| #define HPM_GET_SUMCYC | ( | idx | ) | (__hpm_sumcyc##idx) |
Get hpm benchmark sum cycle for counter idx.
Definition at line 388 of file nmsis_bench.h.
| #define HPM_GET_USECYC | ( | idx | ) | (__hpm_usecyc##idx) |
Get hpm benchmark use cycle for counter idx.
Definition at line 385 of file nmsis_bench.h.
| #define HPM_INIT | ( | ) |
Initialize high performance monitor environment, need to called in before other HPM_xxx macros are called.
Definition at line 351 of file nmsis_bench.h.
| #define HPM_RESET | ( | idx, | |
| proc, | |||
| event | |||
| ) | __hpm_sumcyc##idx = 0; __hpm_lpcnt##idx = 0; |
Reset high performance benchmark for proc using counter which index is idx.
Definition at line 355 of file nmsis_bench.h.
| #define HPM_SAMPLE | ( | idx, | |
| proc, | |||
| event | |||
| ) |
Do high performance benchmark sample for proc, and sum it into sum counter.
Definition at line 365 of file nmsis_bench.h.
| #define HPM_SEL_ENABLE | ( | ena | ) | (ena << 28) |
Definition at line 344 of file nmsis_bench.h.
| #define HPM_SEL_EVENT | ( | sel, | |
| idx | |||
| ) | ((sel) | (idx << 4)) |
Definition at line 345 of file nmsis_bench.h.
| #define HPM_START | ( | idx, | |
| proc, | |||
| event | |||
| ) |
Start to do high performance benchmark for proc, and record start hpm counter.
Definition at line 358 of file nmsis_bench.h.
| #define HPM_STAT | ( | idx, | |
| proc, | |||
| event | |||
| ) | printf("STATHPM%d:0x%x, %s, %lu, %lu\n", idx, event, #proc, (unsigned long)__hpm_lpcnt##idx, (unsigned long)__hpm_sumcyc##idx); |
Show statistics of hpm benchmark, format: STATHPM::idx:event, proc, loopcnt, sumcyc.
Definition at line 381 of file nmsis_bench.h.
| #define HPM_STOP | ( | idx, | |
| proc, | |||
| event | |||
| ) | printf("HPM%d:0x%x, %s, %lu\n", idx, event, #proc, (unsigned long)__hpm_sumcyc##idx); |
Mark stop of hpm benchmark, start -> sample -> sample -> stop, and print the sum cycle of a proc.
Definition at line 377 of file nmsis_bench.h.
| #define MEVENT_EN 0x08 |
Definition at line 327 of file nmsis_bench.h.
| #define MSU_EVENT_ENABLE 0x0F |
Definition at line 326 of file nmsis_bench.h.
| #define NMSIS_TEST_FAIL | ( | ) | printf("\nNMSIS_TEST_FAIL\n"); |
Mark test or application failed.
Definition at line 413 of file nmsis_bench.h.
| #define NMSIS_TEST_PASS | ( | ) | printf("\nNMSIS_TEST_PASS\n"); |
Mark test or application passed.
Definition at line 411 of file nmsis_bench.h.
| #define READ_CYCLE __get_rv_cycle |
When XLEN=32, reading the full 64-bit CYCLE register incurs additional overhead.
BENCH_XLEN_MODE skips reading the upper 32 bits, reducing the extra cycle cost and allowing for more accurate measurements of small cycle counts.
NOTE: It is only applicable when the total cycle count does not exceed 2^32. Read the whole 64 bits value of MCYCLE register
Definition at line 95 of file nmsis_bench.h.
| #define READ_HPM_COUNTER __get_hpm_counter |
Definition at line 337 of file nmsis_bench.h.
| #define SEVENT_EN 0x02 |
Definition at line 328 of file nmsis_bench.h.
| #define UEVENT_EN 0x01 |
Definition at line 329 of file nmsis_bench.h.
| __STATIC_FORCEINLINE void __prepare_bench_env | ( | void | ) |
Prepare benchmark environment.
Prepare benchmark required environment, such as turn on necessary units like vpu, cycle, instret counters, hpm counters
Definition at line 73 of file nmsis_bench.h.
References __enable_all_counter(), __RV_CSR_SET, CSR_MSTATUS, and MSTATUS_VS.
1.9.1