NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
Functions
(RV64 Only) SIMD 32-bit Add/Subtract Instructions
Intrinsic Functions for SIMD Instructions » RV64 Only Instructions

(RV64 Only) SIMD 32-bit Add/Subtract Instructions More...

Functions

__STATIC_FORCEINLINE unsigned long __RV_ADD32 (unsigned long a, unsigned long b)
 ADD32 (SIMD 32-bit Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_CRAS32 (unsigned long a, unsigned long b)
 CRAS32 (SIMD 32-bit Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_CRSA32 (unsigned long a, unsigned long b)
 CRSA32 (SIMD 32-bit Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KADD32 (unsigned long a, unsigned long b)
 KADD32 (SIMD 32-bit Signed Saturating Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KCRAS32 (unsigned long a, unsigned long b)
 KCRAS32 (SIMD 32-bit Signed Saturating Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KCRSA32 (unsigned long a, unsigned long b)
 KCRSA32 (SIMD 32-bit Signed Saturating Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSTAS32 (unsigned long a, unsigned long b)
 KSTAS32 (SIMD 32-bit Signed Saturating Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSTSA32 (unsigned long a, unsigned long b)
 KSTSA32 (SIMD 32-bit Signed Saturating Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_KSUB32 (unsigned long a, unsigned long b)
 KSUB32 (SIMD 32-bit Signed Saturating Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RADD32 (unsigned long a, unsigned long b)
 RADD32 (SIMD 32-bit Signed Halving Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RCRAS32 (unsigned long a, unsigned long b)
 RCRAS32 (SIMD 32-bit Signed Halving Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RCRSA32 (unsigned long a, unsigned long b)
 RCRSA32 (SIMD 32-bit Signed Halving Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSTAS32 (unsigned long a, unsigned long b)
 RSTAS32 (SIMD 32-bit Signed Halving Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSTSA32 (unsigned long a, unsigned long b)
 RSTSA32 (SIMD 32-bit Signed Halving Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_RSUB32 (unsigned long a, unsigned long b)
 RSUB32 (SIMD 32-bit Signed Halving Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_STAS32 (unsigned long a, unsigned long b)
 STAS32 (SIMD 32-bit Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_STSA32 (unsigned long a, unsigned long b)
 STSA32 (SIMD 32-bit Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_SUB32 (unsigned long a, unsigned long b)
 SUB32 (SIMD 32-bit Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKADD32 (unsigned long a, unsigned long b)
 UKADD32 (SIMD 32-bit Unsigned Saturating Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKCRAS32 (unsigned long a, unsigned long b)
 UKCRAS32 (SIMD 32-bit Unsigned Saturating Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKCRSA32 (unsigned long a, unsigned long b)
 UKCRSA32 (SIMD 32-bit Unsigned Saturating Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSTAS32 (unsigned long a, unsigned long b)
 UKSTAS32 (SIMD 32-bit Unsigned Saturating Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSTSA32 (unsigned long a, unsigned long b)
 UKSTSA32 (SIMD 32-bit Unsigned Saturating Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_UKSUB32 (unsigned long a, unsigned long b)
 UKSUB32 (SIMD 32-bit Unsigned Saturating Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URADD32 (unsigned long a, unsigned long b)
 URADD32 (SIMD 32-bit Unsigned Halving Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URCRAS32 (unsigned long a, unsigned long b)
 URCRAS32 (SIMD 32-bit Unsigned Halving Cross Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URCRSA32 (unsigned long a, unsigned long b)
 URCRSA32 (SIMD 32-bit Unsigned Halving Cross Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSTAS32 (unsigned long a, unsigned long b)
 URSTAS32 (SIMD 32-bit Unsigned Halving Straight Addition & Subtraction) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSTSA32 (unsigned long a, unsigned long b)
 URSTSA32 (SIMD 32-bit Unsigned Halving Straight Subtraction & Addition) More...
 
__STATIC_FORCEINLINE unsigned long __RV_URSUB32 (unsigned long a, unsigned long b)
 URSUB32 (SIMD 32-bit Unsigned Halving Subtraction) More...
 

Detailed Description

(RV64 Only) SIMD 32-bit Add/Subtract Instructions

The following tables list instructions that are only present in RV64. There are 30 SIMD 32-bit addition or subtraction instructions.there are 4 SIMD16-bit Packing Instructions.

Function Documentation

◆ __RV_ADD32()

__STATIC_FORCEINLINE unsigned long __RV_ADD32 ( unsigned long  a,
unsigned long  b 
)

ADD32 (SIMD 32-bit Addition)

Type: SIMD (RV64 Only)

Syntax:

ADD32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element additions simultaneously.

Description:
This instruction adds the 32-bit integer elements in Rs1 with the 32-bit integer elements in Rs2, and then writes the 32-bit element results to Rd.

Note:
This instruction can be used for either signed or unsigned addition.

Operations:

Rd.W[x] = Rs1.W[x] + Rs2.W[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13809 of file core_feature_dsp.h.

13810 {
13811  unsigned long result;
13812  __ASM volatile("add32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13813  return result;
13814 }

References __ASM.

◆ __RV_CRAS32()

__STATIC_FORCEINLINE unsigned long __RV_CRAS32 ( unsigned long  a,
unsigned long  b 
)

CRAS32 (SIMD 32-bit Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

CRAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element addition and 32-bit integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description:
This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [31:0] of Rs2, and writes the result to [63:32] of Rd; at the same time, it subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [31:0] of Rs1, and writes the result to [31:0] of Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] + Rs2.W[0];
Rd.W[0] = Rs1.W[0] - Rs2.W[1];
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13852 of file core_feature_dsp.h.

13853 {
13854  unsigned long result;
13855  __ASM volatile("cras32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13856  return result;
13857 }

References __ASM.

◆ __RV_CRSA32()

__STATIC_FORCEINLINE unsigned long __RV_CRSA32 ( unsigned long  a,
unsigned long  b 
)

CRSA32 (SIMD 32-bit Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

CRSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element subtraction and 32-bit integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [63:32] of Rs1, and writes the result to [63:32] of Rd; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [63:32] of Rs2, and writes the result to [31:0] of Rd

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] - Rs2.W[0];
Rd.W[0] = Rs1.W[0] + Rs2.W[1];
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 13894 of file core_feature_dsp.h.

13895 {
13896  unsigned long result;
13897  __ASM volatile("crsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
13898  return result;
13899 }

References __ASM.

◆ __RV_KADD32()

__STATIC_FORCEINLINE unsigned long __RV_KADD32 ( unsigned long  a,
unsigned long  b 
)

KADD32 (SIMD 32-bit Signed Saturating Addition)

Type: SIMD (RV64 Only)

Syntax:

KADD32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element saturating additions simultaneously.

Description:
This instruction adds the 32-bit signed integer elements in Rs1 with the 32-bit signed integer elements in Rs2. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] + Rs2.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 14000 of file core_feature_dsp.h.

14001 {
14002  unsigned long result;
14003  __ASM volatile("kadd32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
14004  return result;
14005 }

References __ASM.

◆ __RV_KCRAS32()

__STATIC_FORCEINLINE unsigned long __RV_KCRAS32 ( unsigned long  a,
unsigned long  b 
)

KCRAS32 (SIMD 32-bit Signed Saturating Cross Addition & Subtraction)

Type: SIM (RV64 Only)

Syntax:

KCRAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element saturating addition and 32-bit signed integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description:
This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [31:0] of Rs2; at the same time, it subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [31:0] of Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res[1] = Rs1.W[1] + Rs2.W[0];
res[0] = Rs1.W[0] - Rs2.W[1];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 14051 of file core_feature_dsp.h.

14052 {
14053  unsigned long result;
14054  __ASM volatile("kcras32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
14055  return result;
14056 }

References __ASM.

◆ __RV_KCRSA32()

__STATIC_FORCEINLINE unsigned long __RV_KCRSA32 ( unsigned long  a,
unsigned long  b 
)

KCRSA32 (SIMD 32-bit Signed Saturating Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

KCRSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element saturating subtraction and 32-bit signed integer element saturating addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [63:32] of Rs1; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [63:32] of Rs2. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res[1] = Rs1.W[1] - Rs2.W[0];
res[0] = Rs1.W[0] + Rs2.W[1];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 14101 of file core_feature_dsp.h.

14102 {
14103  unsigned long result;
14104  __ASM volatile("kcrsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
14105  return result;
14106 }

References __ASM.

◆ __RV_KSTAS32()

__STATIC_FORCEINLINE unsigned long __RV_KSTAS32 ( unsigned long  a,
unsigned long  b 
)

KSTAS32 (SIMD 32-bit Signed Saturating Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

KSTAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element saturating addition and 32-bit signed integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description:
This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [63:32] of Rs2; at the same time, it subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [31:0] of Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res[1] = Rs1.W[1] + Rs2.W[1];
res[0] = Rs1.W[0] - Rs2.W[0];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 15603 of file core_feature_dsp.h.

15604 {
15605  unsigned long result;
15606  __ASM volatile("kstas32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
15607  return result;
15608 }

References __ASM.

◆ __RV_KSTSA32()

__STATIC_FORCEINLINE unsigned long __RV_KSTSA32 ( unsigned long  a,
unsigned long  b 
)

KSTSA32 (SIMD 32-bit Signed Saturating Straight Subtraction & Addition)

Type: SIM (RV64 Only)

Syntax:

KSTSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element saturating subtraction and 32-bit signed integer element saturating addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [63:32] of Rs1; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [31:0] of Rs2. If any of the results are beyond the Q31 number range ( -2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res[1] = Rs1.W[1] - Rs2.W[1];
res[0] = Rs1.W[0] + Rs2.W[0];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 15654 of file core_feature_dsp.h.

15655 {
15656  unsigned long result;
15657  __ASM volatile("kstsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
15658  return result;
15659 }

References __ASM.

◆ __RV_KSUB32()

__STATIC_FORCEINLINE unsigned long __RV_KSUB32 ( unsigned long  a,
unsigned long  b 
)

KSUB32 (SIMD 32-bit Signed Saturating Subtraction)

Type: SIMD (RV64 Only)

Syntax:

KSUB32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer elements saturating subtractions simultaneously.

Description:
This instruction subtracts the 32-bit signed integer elements in Rs2 from the 32-bit signed integer elements in Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] - Rs2.W[x];
if (res[x] > (2^31)-1) {
res[x] = (2^31)-1;
OV = 1;
} else if (res[x] < -2^31) {
res[x] = -2^31;
OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 15701 of file core_feature_dsp.h.

15702 {
15703  unsigned long result;
15704  __ASM volatile("ksub32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
15705  return result;
15706 }

References __ASM.

◆ __RV_RADD32()

__STATIC_FORCEINLINE unsigned long __RV_RADD32 ( unsigned long  a,
unsigned long  b 
)

RADD32 (SIMD 32-bit Signed Halving Addition)

Type: SIMD (RV64 Only)

Syntax:

RADD32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit signed integer elements in Rs1 with the 32-bit signed integer elements in Rs2. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Rs1 = 0x7FFFFFFF, Rs2 = 0x7FFFFFFF Rd = 0x7FFFFFFF
* Rs1 = 0x80000000, Rs2 = 0x80000000 Rd = 0x80000000
* Rs1 = 0x40000000, Rs2 = 0x80000000 Rd = 0xE0000000

Operations:

Rd.W[x] = (Rs1.W[x] + Rs2.W[x]) s>> 1;
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 15939 of file core_feature_dsp.h.

15940 {
15941  unsigned long result;
15942  __ASM volatile("radd32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
15943  return result;
15944 }

References __ASM.

◆ __RV_RCRAS32()

__STATIC_FORCEINLINE unsigned long __RV_RCRAS32 ( unsigned long  a,
unsigned long  b 
)

RCRAS32 (SIMD 32-bit Signed Halving Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RCRAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element addition and 32-bit signed integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit signed integer element in [63:32] of Rs1 with the 32-bit signed integer element in [31:0] of Rs2, and subtracts the 32-bit signed integer element in [63:32] of Rs2 from the 32-bit signed integer element in [31:0] of Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[0]) s>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[1]) s>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 15986 of file core_feature_dsp.h.

15987 {
15988  unsigned long result;
15989  __ASM volatile("rcras32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
15990  return result;
15991 }

References __ASM.

◆ __RV_RCRSA32()

__STATIC_FORCEINLINE unsigned long __RV_RCRSA32 ( unsigned long  a,
unsigned long  b 
)

RCRSA32 (SIMD 32-bit Signed Halving Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

RCRSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element subtraction and 32-bit signed integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit signed integer element in [31:0] of Rs2 from the 32-bit signed integer element in [63:32] of Rs1, and adds the 32-bit signed element integer in [31:0] of Rs1 with the 32-bit signed integer element in [63:32] of Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[0]) s>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[1]) s>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 16033 of file core_feature_dsp.h.

16034 {
16035  unsigned long result;
16036  __ASM volatile("rcrsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16037  return result;
16038 }

References __ASM.

◆ __RV_RSTAS32()

__STATIC_FORCEINLINE unsigned long __RV_RSTAS32 ( unsigned long  a,
unsigned long  b 
)

RSTAS32 (SIMD 32-bit Signed Halving Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RSTAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element addition and 32-bit signed integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit signed integer element in [63:32] of Rs1 with the 32-bit signed integer element in [63:32] of Rs2, and subtracts the 32-bit signed integer element in [31:0] of Rs2 from the 32-bit signed integer element in [31:0] of Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[1]) s>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[0]) s>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 16080 of file core_feature_dsp.h.

16081 {
16082  unsigned long result;
16083  __ASM volatile("rstas32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16084  return result;
16085 }

References __ASM.

◆ __RV_RSTSA32()

__STATIC_FORCEINLINE unsigned long __RV_RSTSA32 ( unsigned long  a,
unsigned long  b 
)

RSTSA32 (SIMD 32-bit Signed Halving Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

RSTSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element subtraction and 32-bit signed integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit signed integer element in [63:32] of Rs2 from the 32-bit signed integer element in [63:32] of Rs1, and adds the 32-bit signed element integer in [31:0] of Rs1 with the 32-bit signed integer element in [31:0] of Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[1]) s>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[0]) s>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 16126 of file core_feature_dsp.h.

16127 {
16128  unsigned long result;
16129  __ASM volatile("rstsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16130  return result;
16131 }

References __ASM.

◆ __RV_RSUB32()

__STATIC_FORCEINLINE unsigned long __RV_RSUB32 ( unsigned long  a,
unsigned long  b 
)

RSUB32 (SIMD 32-bit Signed Halving Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RSUB32 Rd, Rs1, Rs2

Purpose:
Do 32-bit signed integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit signed integer elements in Rs2 from the 32-bit signed integer elements in Rs1. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x80000000 Rt = 0x7FFFFFFF
* Ra = 0x80000000, Rb = 0x7FFFFFFF Rt = 0x80000000
* Ra = 0x80000000, Rb = 0x40000000 Rt = 0xA0000000

Operations:

Rd.W[x] = (Rs1.W[x] - Rs2.W[x]) s>> 1;
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 16172 of file core_feature_dsp.h.

16173 {
16174  unsigned long result;
16175  __ASM volatile("rsub32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
16176  return result;
16177 }

References __ASM.

◆ __RV_STAS32()

__STATIC_FORCEINLINE unsigned long __RV_STAS32 ( unsigned long  a,
unsigned long  b 
)

STAS32 (SIMD 32-bit Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

STAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element addition and 32-bit integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description:
This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [63:32] of Rs2, and writes the result to [63:32] of Rd; at the same time, it subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [31:0] of Rs1, and writes the result to [31:0] of Rd.

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] + Rs2.W[1];
Rd.W[0] = Rs1.W[0] - Rs2.W[0];
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17147 of file core_feature_dsp.h.

17148 {
17149  unsigned long result;
17150  __ASM volatile("stas32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17151  return result;
17152 }

References __ASM.

◆ __RV_STSA32()

__STATIC_FORCEINLINE unsigned long __RV_STSA32 ( unsigned long  a,
unsigned long  b 
)

STSA32 (SIMD 32-bit Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

STSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element subtraction and 32-bit integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [63:32] of Rs1, and writes the result to [63:32] of Rd; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [31:0] of Rs2, and writes the result to [31:0] of Rd

Note:
This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] - Rs2.W[1];
Rd.W[0] = Rs1.W[0] + Rs2.W[0];
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17189 of file core_feature_dsp.h.

17190 {
17191  unsigned long result;
17192  __ASM volatile("stsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17193  return result;
17194 }

References __ASM.

◆ __RV_SUB32()

__STATIC_FORCEINLINE unsigned long __RV_SUB32 ( unsigned long  a,
unsigned long  b 
)

SUB32 (SIMD 32-bit Subtraction)

Type: DSP (RV64 Only)

Syntax:

SUB32 Rd, Rs1, Rs2

Purpose:
Do 32-bit integer element subtractions simultaneously.

Description:
This instruction subtracts the 32-bit integer elements in Rs2 from the 32-bit integer elements in Rs1, and then writes the results to Rd.

Note:
This instruction can be used for either signed or unsigned subtraction.

Operations:

Rd.W[x] = Rs1.W[x] - Rs2.W[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17229 of file core_feature_dsp.h.

17230 {
17231  unsigned long result;
17232  __ASM volatile("sub32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17233  return result;
17234 }

References __ASM.

◆ __RV_UKADD32()

__STATIC_FORCEINLINE unsigned long __RV_UKADD32 ( unsigned long  a,
unsigned long  b 
)

UKADD32 (SIMD 32-bit Unsigned Saturating Addition)

Type: SIMD (RV64 Only)

Syntax:

UKADD32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element saturating additions simultaneously.

Description:
This instruction adds the 32-bit unsigned integer elements in Rs1 with the 32-bit unsigned integer elements in Rs2. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] + Rs2.W[x];
if (res[x] > (2^32)-1) {
res[x] = (2^32)-1;
OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17273 of file core_feature_dsp.h.

17274 {
17275  unsigned long result;
17276  __ASM volatile("ukadd32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17277  return result;
17278 }

References __ASM.

◆ __RV_UKCRAS32()

__STATIC_FORCEINLINE unsigned long __RV_UKCRAS32 ( unsigned long  a,
unsigned long  b 
)

UKCRAS32 (SIMD 32-bit Unsigned Saturating Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKCRAS32 Rd, Rs1, Rs2

Purpose:
Do one 32-bit unsigned integer element saturating addition and one 32-bit unsigned integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description:
This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [31:0] of Rs2; at the same time, it subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res1 = Rs1.W[1] + Rs2.W[0];
res2 = Rs1.W[0] - Rs2.W[1];
if (res1 > (2^32)-1) {
res1 = (2^32)-1;
OV = 1;
}
if (res2 < 0) {
res2 = 0;
OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17326 of file core_feature_dsp.h.

17327 {
17328  unsigned long result;
17329  __ASM volatile("ukcras32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17330  return result;
17331 }

References __ASM.

◆ __RV_UKCRSA32()

__STATIC_FORCEINLINE unsigned long __RV_UKCRSA32 ( unsigned long  a,
unsigned long  b 
)

UKCRSA32 (SIMD 32-bit Unsigned Saturating Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

UKCRSA32 Rd, Rs1, Rs2

Purpose:
Do one 32-bit unsigned integer element saturating subtraction and one 32-bit unsigned integer element saturating addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description:
This instruction subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1; at the same time, it adds the 32-bit unsigned integer element in [63:32] of Rs2 with the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res1 = Rs1.W[1] - Rs2.W[0];
res2 = Rs1.W[0] + Rs2.W[1];
if (res1 < 0) {
res1 = 0;
OV = 1;
} else if (res2 > (2^32)-1) {
res2 = (2^32)-1;
OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17378 of file core_feature_dsp.h.

17379 {
17380  unsigned long result;
17381  __ASM volatile("ukcrsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17382  return result;
17383 }

References __ASM.

◆ __RV_UKSTAS32()

__STATIC_FORCEINLINE unsigned long __RV_UKSTAS32 ( unsigned long  a,
unsigned long  b 
)

UKSTAS32 (SIMD 32-bit Unsigned Saturating Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKSTAS32 Rd, Rs1, Rs2

Purpose:
Do one 32-bit unsigned integer element saturating addition and one 32-bit unsigned integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description:
This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [63:32] of Rs2; at the same time, it subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res1 = Rs1.W[1] + Rs2.W[1];
res2 = Rs1.W[0] - Rs2.W[0];
if (res1 > (2^32)-1) {
res1 = (2^32)-1;
OV = 1;
}
if (res2 < 0) {
res2 = 0;
OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17431 of file core_feature_dsp.h.

17432 {
17433  unsigned long result;
17434  __ASM volatile("ukstas32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17435  return result;
17436 }

References __ASM.

◆ __RV_UKSTSA32()

__STATIC_FORCEINLINE unsigned long __RV_UKSTSA32 ( unsigned long  a,
unsigned long  b 
)

UKSTSA32 (SIMD 32-bit Unsigned Saturating Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

UKSTSA32 Rd, Rs1, Rs2

Purpose:
Do one 32-bit unsigned integer element saturating subtraction and one 32-bit unsigned integer element saturating addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description:
This instruction subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1; at the same time, it adds the 32-bit unsigned integer element in [31:0] of Rs2 with the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res1 = Rs1.W[1] - Rs2.W[1];
res2 = Rs1.W[0] + Rs2.W[0];
if (res1 < 0) {
res1 = 0;
OV = 1;
} else if (res2 > (2^32)-1) {
res2 = (2^32)-1;
OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17483 of file core_feature_dsp.h.

17484 {
17485  unsigned long result;
17486  __ASM volatile("ukstsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17487  return result;
17488 }

References __ASM.

◆ __RV_UKSUB32()

__STATIC_FORCEINLINE unsigned long __RV_UKSUB32 ( unsigned long  a,
unsigned long  b 
)

UKSUB32 (SIMD 32-bit Unsigned Saturating Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKSUB32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer elements saturating subtractions simultaneously.

Description:
This instruction subtracts the 32-bit unsigned integer elements in Rs2 from the 32-bit unsigned integer elements in Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] - Rs2.W[x];
if (res[x] < 0) {
res[x] = 0;
OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17527 of file core_feature_dsp.h.

17528 {
17529  unsigned long result;
17530  __ASM volatile("uksub32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17531  return result;
17532 }

References __ASM.

◆ __RV_URADD32()

__STATIC_FORCEINLINE unsigned long __RV_URADD32 ( unsigned long  a,
unsigned long  b 
)

URADD32 (SIMD 32-bit Unsigned Halving Addition)

Type: SIMD (RV64 Only)

Syntax:

URADD32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit unsigned integer elements in Rs1 with the 32-bit unsigned integer elements in Rs2. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x7FFFFFFF Rt = 0x7FFFFFFF
* Ra = 0x80000000, Rb = 0x80000000 Rt = 0x80000000
* Ra = 0x40000000, Rb = 0x80000000 Rt = 0x60000000

Operations:

Rd.W[x] = (Rs1.W[x] + Rs2.W[x]) u>> 1;
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17649 of file core_feature_dsp.h.

17650 {
17651  unsigned long result;
17652  __ASM volatile("uradd32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17653  return result;
17654 }

References __ASM.

◆ __RV_URCRAS32()

__STATIC_FORCEINLINE unsigned long __RV_URCRAS32 ( unsigned long  a,
unsigned long  b 
)

URCRAS32 (SIMD 32-bit Unsigned Halving Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URCRAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element addition and 32-bit unsigned integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [31:0] of Rs2, and subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [31:0] of Rs1. The element results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[0]) u>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[1]) u>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17696 of file core_feature_dsp.h.

17697 {
17698  unsigned long result;
17699  __ASM volatile("urcras32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17700  return result;
17701 }

References __ASM.

◆ __RV_URCRSA32()

__STATIC_FORCEINLINE unsigned long __RV_URCRSA32 ( unsigned long  a,
unsigned long  b 
)

URCRSA32 (SIMD 32-bit Unsigned Halving Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

URCRSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element subtraction and 32-bit unsigned integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1, and adds the 32-bit unsigned element integer in [31:0] of Rs1 with the 32-bit unsigned integer element in [63:32] of Rs2. The two results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[0]) u>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[1]) u>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17743 of file core_feature_dsp.h.

17744 {
17745  unsigned long result;
17746  __ASM volatile("urcrsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17747  return result;
17748 }

References __ASM.

◆ __RV_URSTAS32()

__STATIC_FORCEINLINE unsigned long __RV_URSTAS32 ( unsigned long  a,
unsigned long  b 
)

URSTAS32 (SIMD 32-bit Unsigned Halving Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URSTAS32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element addition and 32-bit unsigned integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [63:32] of Rs2, and subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [31:0] of Rs1. The element results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[1]) u>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[0]) u>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17790 of file core_feature_dsp.h.

17791 {
17792  unsigned long result;
17793  __ASM volatile("urstas32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17794  return result;
17795 }

References __ASM.

◆ __RV_URSTSA32()

__STATIC_FORCEINLINE unsigned long __RV_URSTSA32 ( unsigned long  a,
unsigned long  b 
)

URSTSA32 (SIMD 32-bit Unsigned Halving Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

URSTSA32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element subtraction and 32-bit unsigned integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1, and adds the 32-bit unsigned element integer in [31:0] of Rs1 with the 32-bit unsigned integer element in [31:0] of Rs2. The two results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[1]) u>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[0]) u>> 1;
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17837 of file core_feature_dsp.h.

17838 {
17839  unsigned long result;
17840  __ASM volatile("urstsa32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17841  return result;
17842 }

References __ASM.

◆ __RV_URSUB32()

__STATIC_FORCEINLINE unsigned long __RV_URSUB32 ( unsigned long  a,
unsigned long  b 
)

URSUB32 (SIMD 32-bit Unsigned Halving Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URSUB32 Rd, Rs1, Rs2

Purpose:
Do 32-bit unsigned integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description:
This instruction subtracts the 32-bit unsigned integer elements in Rs2 from the 32-bit unsigned integer elements in Rs1. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x80000000, Rt = 0xFFFFFFFF
* Ra = 0x80000000, Rb = 0x7FFFFFFF, Rt = 0x00000000
* Ra = 0x80000000, Rb = 0x40000000, Rt = 0x20000000

Operations:

Rd.W[x] = (Rs1.W[x] - Rs2.W[x]) u>> 1;
for RV64: x=1...0
Parameters
[in]aunsigned long type of value stored in a
[in]bunsigned long type of value stored in b
Returns
value stored in unsigned long type

Definition at line 17883 of file core_feature_dsp.h.

17884 {
17885  unsigned long result;
17886  __ASM volatile("ursub32 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
17887  return result;
17888 }

References __ASM.

__ASM
#define __ASM
Pass information from the compiler to the assembler.
Definition: nmsis_gcc.h:55