# Intrinsic Functions for SIMD Instructions¶

Click Nuclei DSP Feature to learn about Core DSP in Nuclei ISA Spec.

group `NMSIS_Core_DSP_Intrinsic`

Functions that generate RISC-V DSP SIMD instructions.

The following functions generate specified RISC-V SIMD instructions that cannot be directly accessed by compiler.

• DSP ISA Extension Instruction Summary

• Shorthand Definitions

• r.H == rH1: r[31:16], r.L == r.H0: r[15:0]

• r.B3: r[31:24], r.B2: r[23:16], r.B1: r[15:8], r.B0: r[7:0]

• r.B[x]: r[(x*8+7):(x*8+0)]

• r.H[x]: r[(x*16+7):(x*16+0)]

• r.W[x]: r[(x*32+31):(x*32+0)]

• r[xU]: the upper 32-bit of a 64-bit number; xU represents the GPR number that contains this upper part 32-bit value.

• r[xL]: the lower 32-bit of a 64-bit number; xL represents the GPR number that contains this lower part 32-bit value.

• r[xU].r[xL]: a 64-bit number that is formed from a pair of GPRs.

• s>>: signed arithmetic right shift:

• u>>: unsigned logical right shift

• SAT.Qn(): Saturate to the range of [-2^n, 2^n-1], if saturation happens, set PSW.OV.

• SAT.Um(): Saturate to the range of [0, 2^m-1], if saturation happens, set PSW.OV.

• RUND(): Indicate `rounding`, i.e., add 1 to the most significant discarded bit for right shift or MSW-type multiplication instructions.

• Sign or Zero Extending functions:

• SEm(data): Sign-Extend data to m-bit.:

• ZEm(data): Zero-Extend data to m-bit.

• ABS(x): Calculate the absolute value of `x`.

• CONCAT(x,y): Concatinate `x` and `y` to form a value.

• u<: Unsinged less than comparison.

• u<=: Unsinged less than & equal comparison.

• u>: Unsinged greater than comparison.

• s*: Signed multiplication.

• u*: Unsigned multiplication.