# 8-bit Multiply with 32-bit Add Instructions¶

`__STATIC_FORCEINLINE long __RV_SMAQA(long t, unsigned long a, unsigned long b)`
`__STATIC_FORCEINLINE long __RV_SMAQA_SU(long t, unsigned long a, unsigned long b)`
`__STATIC_FORCEINLINE unsigned long __RV_UMAQA(unsigned long t, unsigned long a, unsigned long b)`
group `NMSIS_Core_DSP_Intrinsic_8B_MULT_32B_ADD`

8-bit Multiply with 32-bit Add Instructions

there are 3 8-bit Multiply with 32-bit Add Instructions

Functions

`__STATIC_FORCEINLINE long __RV_SMAQA(long t, unsigned long a, unsigned long b)`

SMAQA (Signed Multiply Four Bytes with 32-bit Adds)

Type: Partial-SIMD (Reduction)

Syntax:

```SMAQA Rd, Rs1, Rs2
```

Purpose:

Do four signed 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:

This instruction multiplies the four signed 8-bit elements of 32-bit chunks of Rs1 with the four signed 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the signed content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

```res[x] = Rd.W[x] +
(Rs1.W[x].B s* Rs2.W[x].B) + (Rs1.W[x].B s* Rs2.W[x].B) +
(Rs1.W[x].B s* Rs2.W[x].B) + (Rs1.W[x].B s* Rs2.W[x].B);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1,0
```

Return

value stored in long type

Parameters
• `[in] t`: long type of value stored in t

• `[in] a`: unsigned long type of value stored in a

• `[in] b`: unsigned long type of value stored in b

`__STATIC_FORCEINLINE long __RV_SMAQA_SU(long t, unsigned long a, unsigned long b)`

SMAQA.SU (Signed and Unsigned Multiply Four Bytes with 32-bit Adds)

Type: Partial-SIMD (Reduction)

Syntax:

```SMAQA.SU Rd, Rs1, Rs2
```

Purpose:

Do four

`signed x unsigned` 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:

This instruction multiplies the four signed 8-bit elements of 32-bit chunks of Rs1 with the four unsigned 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the signed content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

```res[x] = Rd.W[x] +
(Rs1.W[x].B su* Rs2.W[x].B) + (Rs1.W[x].B su* Rs2.W[x].B) +
(Rs1.W[x].B su* Rs2.W[x].B) + (Rs1.W[x].B su* Rs2.W[x].B);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1...0
```

Return

value stored in long type

Parameters
• `[in] t`: long type of value stored in t

• `[in] a`: unsigned long type of value stored in a

• `[in] b`: unsigned long type of value stored in b

`__STATIC_FORCEINLINE unsigned long __RV_UMAQA(unsigned long t, unsigned long a, unsigned long b)`

UMAQA (Unsigned Multiply Four Bytes with 32- bit Adds)

Type: DSP

Syntax:

```UMAQA Rd, Rs1, Rs2
```

Purpose:

Do four unsigned 8-bit multiplications from 32-bit chunks of two registers; and then adds the four 16-bit results and the content of corresponding 32-bit chunks of a third register together.

Description:

This instruction multiplies the four unsigned 8-bit elements of 32-bit chunks of Rs1 with the four unsigned 8-bit elements of 32-bit chunks of Rs2 and then adds the four results together with the unsigned content of the corresponding 32-bit chunks of Rd. The final results are written back to the corresponding 32-bit chunks in Rd.

Operations:

```res[x] = Rd.W[x] + (Rs1.W[x].B u* Rs2.W[x].B) +
(Rs1.W[x].B u* Rs2.W[x].B) + (Rs1.W[x].B u* Rs2.W[x].B) +
(Rs1.W[x].B u* Rs2.W[x].B);
Rd.W[x] = res[x];
for RV32: x=0,
for RV64: x=1...0
```

Return

value stored in unsigned long type

Parameters
• `[in] t`: unsigned long type of value stored in t

• `[in] a`: unsigned long type of value stored in a

• `[in] b`: unsigned long type of value stored in b