Signed MSW 32x16 Multiply and Add Instructions
- __STATIC_FORCEINLINE long __RV_KMMAWB (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWB_U (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWB2 (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWB2_U (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWT (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWT_U (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWT2 (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMAWT2_U (long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMWB2 (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMWB2_U (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMWT2 (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_KMMWT2_U (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_SMMWB (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_SMMWB_U (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_SMMWT (long a, unsigned long b)
- __STATIC_FORCEINLINE long __RV_SMMWT_U (long a, unsigned long b)
- group NMSIS_Core_DSP_Intrinsic_SIGNED_MSW_32X16_MAC
Signed MSW 32x16 Multiply and Add Instructions.
there are 15 Signed MSW 32x16 Multiply and Add Instructions
Functions
- __STATIC_FORCEINLINE long __RV_KMMAWB (long t, unsigned long a, unsigned long b)
KMMAWB (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add)
Type: SIMD
Syntax:
KMMAWB Rd, Rs1, Rs2 KMMAWB.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; res[x] = Rd.W[x] + Round[x][32:1]; } else { res[x] = Rd.W[x] + Mres[x][47:16]; } if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWB_U (long t, unsigned long a, unsigned long b)
KMMAWB.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half and Add with Rounding)
Type: SIMD
Syntax:
KMMAWB Rd, Rs1, Rs2 KMMAWB.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; res[x] = Rd.W[x] + Round[x][32:1]; } else { res[x] = Rd.W[x] + Mres[x][47:16]; } if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWB2 (long t, unsigned long a, unsigned long b)
KMMAWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add)
Type: SIMD
Syntax:
KMMAWB2 Rd, Rs1, Rs2 KMMAWB2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) { addop.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0]; if (`.u` form) { Mres[x][47:14] = Mres[x][47:14] + 1; } addop.W[x] = Mres[x][46:15]; // doubling } res[x] = Rd.W[x] + addop.W[x]; if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWB2_U (long t, unsigned long a, unsigned long b)
KMMAWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 and Add with Rounding)
Type: SIMD
Syntax:
KMMAWB2 Rd, Rs1, Rs2 KMMAWB2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) { addop.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0]; if (`.u` form) { Mres[x][47:14] = Mres[x][47:14] + 1; } addop.W[x] = Mres[x][46:15]; // doubling } res[x] = Rd.W[x] + addop.W[x]; if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWT (long t, unsigned long a, unsigned long b)
KMMAWT (SIMD Saturating MSW Signed Multiply Word and Top Half and Add)
Type: SIMD
Syntax:
KMMAWT Rd, Rs1, Rs2 KMMAWT.u Rd Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the signed top 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition results are written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed top 16-bit of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; res[x] = Rd.W[x] + Round[x][32:1]; } else { res[x] = Rd.W[x] + Mres[x][47:16]; } if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWT_U (long t, unsigned long a, unsigned long b)
KMMAWT.u (SIMD Saturating MSW Signed Multiply Word and Top Half and Add with Rounding)
Type: SIMD
Syntax:
KMMAWT Rd, Rs1, Rs2 KMMAWT.u Rd Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the signed top 16-bit of the corresponding 32-bit elements of another register and add the most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The addition results are written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed top 16-bit of the corresponding 32-bit elements of Rs2 and adds the most significant 32-bit multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the result before the addition operations.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; res[x] = Rd.W[x] + Round[x][32:1]; } else { res[x] = Rd.W[x] + Mres[x][47:16]; } if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWT2 (long t, unsigned long a, unsigned long b)
KMMAWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add)
Type: SIMD
Syntax:
KMMAWT2 Rd, Rs1, Rs2 KMMAWT2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) { addop.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1]; if (`.u` form) { Mres[x][47:14] = Mres[x][47:14] + 1; } addop.W[x] = Mres[x][46:15]; // doubling } res[x] = Rd.W[x] + addop.W[x]; if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMAWT2_U (long t, unsigned long a, unsigned long b)
KMMAWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 and Add with Rounding)
Type: SIMD
Syntax:
KMMAWT2 Rd, Rs1, Rs2 KMMAWT2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and add the saturated most significant 32-bit results with the corresponding signed 32-bit elements of a third register. The saturated addition result is written to the corresponding 32-bit elements of the third register. The
.u
form rounds up the multiplication results from the most significant discarded bit before the addition operations.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and adds the saturated most significant 32-bit Q31 multiplication results with the corresponding signed 32-bit elements of Rd. If the addition result is beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), it is saturated to the range and the OV bit is set to 1. The results after saturation are written to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the result before the addition operations.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) { addop.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1]; if (`.u` form) { Mres[x][47:14] = Mres[x][47:14] + 1; } addop.W[x] = Mres[x][46:15]; // doubling } res[x] = Rd.W[x] + addop.W[x]; if (res[x] > (2^31)-1) { res[x] = (2^31)-1; OV = 1; } else if (res[x] < -2^31) { res[x] = -2^31; OV = 1; } Rd.W[x] = res[x]; for RV32: x=0 for RV64: x=1...0
- Parameters
t – [in] long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMWB2 (long a, unsigned long b)
KMMWB2 (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2)
Type: SIMD
Syntax:
KMMWB2 Rd, Rs1, Rs2 KMMWB2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) { Rd.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][46:14] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][46:15]; } } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMWB2_U (long a, unsigned long b)
KMMWB2.u (SIMD Saturating MSW Signed Multiply Word and Bottom Half & 2 with Rounding)
Type: SIMD
Syntax:
KMMWB2 Rd, Rs1, Rs2 KMMWB2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed bottom 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[0] == 0x8000)) { Rd.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][46:14] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][46:15]; } } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMWT2 (long a, unsigned long b)
KMMWT2 (SIMD Saturating MSW Signed Multiply Word and Top Half & 2)
Type: SIMD
Syntax:
KMMWT2 Rd, Rs1, Rs2 KMMWT2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) { Rd.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][46:14] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][46:15]; } } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_KMMWT2_U (long a, unsigned long b)
KMMWT2.u (SIMD Saturating MSW Signed Multiply Word and Top Half & 2 with Rounding)
Type: SIMD
Syntax:
KMMWT2 Rd, Rs1, Rs2 KMMWT2.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, double the multiplication results and write the saturated most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit Q31 elements of Rs1 with the signed top 16-bit Q15 content of the corresponding 32-bit elements of Rs2, doubles the Q46 results to Q47 numbers and writes the saturated most significant 32-bit Q31 multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit Q47 multiplication results by adding a 1 to bit 15 (i.e., bit 14 before doubling) of the results.Operations:
if ((Rs1.W[x] == 0x80000000) & (Rs2.W[x].H[1] == 0x8000)) { Rd.W[x] = 0x7fffffff; OV = 1; } else { Mres[x][47:0] = Rs1.W[x] s* Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][46:14] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][46:15]; } } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_SMMWB (long a, unsigned long b)
SMMWB (SIMD MSW Signed Multiply Word and Bottom Half)
Type: SIMD
Syntax:
SMMWB Rd, Rs1, Rs2 SMMWB.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][47:16]; } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_SMMWB_U (long a, unsigned long b)
SMMWB.u (SIMD MSW Signed Multiply Word and Bottom Half with Rounding)
Type: SIMD
Syntax:
SMMWB Rd, Rs1, Rs2 SMMWB.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the bottom 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the signed bottom 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[0]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][47:16]; } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_SMMWT (long a, unsigned long b)
SMMWT (SIMD MSW Signed Multiply Word and Top Half)
Type: SIMD
Syntax:
SMMWT Rd, Rs1, Rs2 SMMWT.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the top signed 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][47:16]; } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type
- __STATIC_FORCEINLINE long __RV_SMMWT_U (long a, unsigned long b)
SMMWT.u (SIMD MSW Signed Multiply Word and Top Half with Rounding)
Type: SIMD
Syntax:
SMMWT Rd, Rs1, Rs2 SMMWT.u Rd, Rs1, Rs2
Purpose
:
Multiply the signed 32-bit integer elements of one register and the top 16-bit of the corresponding 32-bit elements of another register, and write the most significant 32-bit results to the corresponding 32-bit elements of a register. The
.u
form rounds up the results from the most significant discarded bit.Description
:
This instruction multiplies the signed 32-bit elements of Rs1 with the top signed 16-bit content of the corresponding 32-bit elements of Rs2 and writes the most significant 32-bit multiplication results to the corresponding 32-bit elements of Rd. The
.u
form of the instruction rounds up the most significant 32-bit of the 48-bit multiplication results by adding a 1 to bit 15 of the results.Operations:
Mres[x][47:0] = Rs1.W[x] * Rs2.W[x].H[1]; if (`.u` form) { Round[x][32:0] = Mres[x][47:15] + 1; Rd.W[x] = Round[x][32:1]; } else { Rd.W[x] = Mres[x][47:16]; } for RV32: x=0 for RV64: x=1...0
- Parameters
a – [in] long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in long type