PMA Functions

__STATIC_FORCEINLINE long PMA_SetRegion (unsigned long entry_idx, pma_config *pma_cfg)
__STATIC_FORCEINLINE long PMA_GetRegion (unsigned long entry_idx, pma_config *pma_cfg)
__STATIC_FORCEINLINE long PMA_SetRegion_S (unsigned long entry_idx, pma_config *pma_cfg)
__STATIC_FORCEINLINE long PMA_GetRegion_S (unsigned long entry_idx, pma_config *pma_cfg)
__STATIC_FORCEINLINE void PMA_EnableHwDevRegion (unsigned long entry_idx)
__STATIC_FORCEINLINE void PMA_DisableHwDevRegion (unsigned long entry_idx)
__STATIC_FORCEINLINE void PMA_EnableHwNCRegion (unsigned long entry_idx)
__STATIC_FORCEINLINE void PMA_DisableHwNCRegion (unsigned long entry_idx)
__STATIC_FORCEINLINE void PMA_EnableHwCARegion (unsigned long entry_idx)
__STATIC_FORCEINLINE void PMA_DisableHwCARegion (unsigned long entry_idx)
PMA_REGION_TYPE_SECSHARE (0x1 << 3)
PMA_REGION_TYPE_NC (0x1 << 2)
PMA_REGION_TYPE_DEV (0x1 << 1)
PMA_REGION_TYPE_CA (0)
PMA_REGION_ENA (0x1 << 0)
PMA_REGION_DIS (0)
struct pma_config
group PMA Functions

Functions that set/disable/enable different attribute type(Device/Non-Cacheable/Cacheable) memory regions, or get region info.

Nuclei provide Physical Memory Attribute(PMA) to define the attribute of memory.PMA will affect CPU access memory behavior.

PMA are split into three attributes:

  • Device(abbreviated as ‘DEV’) Attribute

  • Non-Cacheable(abbreviated as ‘NC’) Attribute

  • Cacheable(abbreviated as ‘CA’) Attribute And correspondingly, the whole memory region are split into three regions: DEV Region/NC Region/CA Region

Hardware provide some software CSR to set the pma by mattri(n)_base/mattri(n)_mask/sattri(n)_base/sattri(n)_mask

Hardware defined PMA regions(up to 8 DEV/NC/CA regions) can be disable or enable by CSR mmacro_dev_en/mmacro_noc_en/mmacro_ca_en

Defines

PMA_REGION_TYPE_SECSHARE (0x1 << 3)

Set this region shareable between secure world and non-secure world, or else default is invalid.

PMA_REGION_TYPE_NC (0x1 << 2)

Set this region Non-Cacheable, or else default is invalid.

PMA_REGION_TYPE_DEV (0x1 << 1)

Set this region Device, or else default is invalid.

PMA_REGION_TYPE_CA (0)

Set this region Cacheable, which is default.

PMA_REGION_ENA (0x1 << 0)

Enable this region, then the region type will take effect.

PMA_REGION_DIS (0)

Disable this region.

Functions

__STATIC_FORCEINLINE long PMA_SetRegion (unsigned long entry_idx, pma_config *pma_cfg)

Configure one region in machine mode.

Set the region(0-n) info of base address/region type/region size/enable status

Remark

  • The entry_idx(0-n) depends on number of paired mattri(n)_mask and mattri(n)_base, refer to Nuclei ISA specifications

  • Not all the entry_idx(0-n) could set to all the types freely, refer to Nuclei ISA specifications

  • The mattri(n)_mask must be written first, before mattri(n)_base, which the api takes care of.

  • The higher bits of mattri(n)_mask should be continuously 1, the remaining lower bits should be all 0 and the number (N) of 0 means the size of this region(2^N bytes)

  • Region granularity is 4KB, so the low 12-bits of mattri(n)_mask must be 0, which the api takes care of

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

Parameters:

  • entry_idx – [in] Index(0-n) of paired mattri(n)_mask and mattri(n)_base

  • pma_cfg – [in] Region info to configure

Returns:

-1 failure, else 0 success

__STATIC_FORCEINLINE long PMA_GetRegion (unsigned long entry_idx, pma_config *pma_cfg)

Get the region info in machine mode.

Read the region(0-n) info of base address/region type/region size/enable status

Remark

  • entry_idx(0-n) depends on number of paired mattri(n)_mask and mattri(n)_base, refer to Nuclei ISA specifications

  • Not all the entry_idx(0-n) could set to all the types freely, refer to Nuclei ISA specifications

Parameters:

  • entry_idx – [in] Index(0-n) of paired mattri(n)_mask and mattri(n)_base

  • pma_cfg – [out] Region info read

Returns:

0 if success, else -1

__STATIC_FORCEINLINE long PMA_SetRegion_S (unsigned long entry_idx, pma_config *pma_cfg)

Configure one region for Secure S-Mode world to share with Non-Secure S-Mode world.

Set the region(0-7) info of base address/region size/enable status

Remark

  • sattri(n)_mask must be written first, before sattri(n)_base, which the api takes care of

  • The higher bits of sattri(n)_mask should be continuously 1, the remaining lower bits should be all 0 and the number (N) of 0 means the size of this region(2^N bytes)

  • Region granularity is 4KB, so the low 12-bits of sattri(n)_mask must be 0, which the api takes care of

  • Unlike mattri(n)_base, there’s no DEV Region/NC Region/CA Region type

Parameters:

  • entry_idx – [in] Index(0-7) of paired sattri(n)_mask and sattri(n)_base

  • pma_cfg – [in] Region info to configure

Returns:

0 if success, else -1

__STATIC_FORCEINLINE long PMA_GetRegion_S (unsigned long entry_idx, pma_config *pma_cfg)

Get the region info of Secure S-Mode world sharing with Non-Secure S-Mode world.

Read the region(0-7) info of base address/region size/enable status

Remark

  • Unlike mattri(n)_base, there’s no DEV Region/NC Region/CA Region type

Parameters:

  • entry_idx – [in] Index(0-7) of paired sattri(n)_mask and sattri(n)_base

  • pma_cfg – [out] Region info read

Returns:

0 if success, else -1

__STATIC_FORCEINLINE void PMA_EnableHwDevRegion (unsigned long entry_idx)

Enable hardware defined Device regions.

Enable Device region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_DisableHwDevRegion

Parameters:

entry_idx – [in] Index(0-7)

__STATIC_FORCEINLINE void PMA_DisableHwDevRegion (unsigned long entry_idx)

Disable hardware defined Device regions.

Disable Device region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_EnableHwDevRegion

Parameters:

entry_idx – [in] Index(0-7)

__STATIC_FORCEINLINE void PMA_EnableHwNCRegion (unsigned long entry_idx)

Enable hardware defined Non-Cacheable regions.

Enable Non-Cacheable region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_DisableHwNCRegion

Parameters:

entry_idx – [in] Index(0-7)

__STATIC_FORCEINLINE void PMA_DisableHwNCRegion (unsigned long entry_idx)

Disable hardware defined Non-Cacheable regions.

Disable Non-Cacheable region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_EnableHwNCRegion

Parameters:

entry_idx – [in] Index(0-7)

__STATIC_FORCEINLINE void PMA_EnableHwCARegion (unsigned long entry_idx)

Enable hardware defined Cacheable regions.

Enable Cacheable region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_DisableHwCARegion

Parameters:

entry_idx – [in] Index(0-7)

__STATIC_FORCEINLINE void PMA_DisableHwCARegion (unsigned long entry_idx)

Disable hardware defined Cacheable regions.

Disable Cacheable region by corresponding index

Remark

  • This function can be called in M-Mode only.

  • When there is no entry_idx, this field is tied to 0

  • For each region entry’s address/size/attribute detail refers to RTL Configuration Stage

  • The regions can be overlapped as the prority: Non-Cacheable > Cacheable > Device, but especially be careful not to overlap software’s instruction/data sections by Device, or overlap Device(like uart) memory by Cacheable

See also

  • PMA_EnableHwCARegion

Parameters:

entry_idx – [in] Index(0-7)

struct pma_config
#include <core_feature_pma.h>