SPMP/sMPU Functions

Click TEE Introduction to learn about Core sPMP/sMPU Unit in Nuclei ISA Spec.

typedef spmp_config smpu_config
__STATIC_INLINE rv_csr_t __get_sPMPCFGx (uint32_t csr_idx)
__STATIC_INLINE void __set_sPMPCFGx (uint32_t csr_idx, rv_csr_t spmpcfg)
__STATIC_INLINE uint8_t __get_sPMPxCFG (uint32_t entry_idx)
__STATIC_INLINE void __set_sPMPxCFG (uint32_t entry_idx, uint8_t spmpxcfg)
__STATIC_INLINE rv_csr_t __get_sPMPADDRx (uint32_t csr_idx)
__STATIC_INLINE void __set_sPMPADDRx (uint32_t csr_idx, rv_csr_t spmpaddr)
__STATIC_INLINE void __set_sPMPENTRYx (uint32_t entry_idx, const spmp_config *spmp_cfg)
__STATIC_INLINE int __get_sPMPENTRYx (unsigned int entry_idx, spmp_config *spmp_cfg)
__STATIC_INLINE void __set_SMPUSWITCHx (uint64_t val)
__STATIC_INLINE uint64_t __get_SMPUSWITCHx (void)
__get_SMPUCFGx __get_sPMPCFGx
__set_SMPUCFGx __set_sPMPCFGx
__get_SMPUxCFG __get_sPMPxCFG
__set_SMPUxCFG __set_sPMPxCFG
__get_SMPUADDRx __get_sPMPADDRx
__set_SMPUADDRx __set_sPMPADDRx
__set_SMPUENTRYx __set_sPMPENTRYx
__get_SMPUENTRYx __get_sPMPENTRYx
struct spmp_config
group sPMP or sMPU Functions

Functions that related to the RISCV supervisor-mode Phyiscal Memory Protection.

Optional superviosr physical memory protection (sPMP) unit provides per-hart supervisor-mode control registers to allow physical memory access privileges (read, write, execute) to be specified for each physical memory region. The sPMP values are checked after the physical address to be accessed pass PMP checks described in the RISC-V privileged spec.

Like PMP, the sPMP can supports region access control settings as small as four bytes.

Defines

__get_SMPUCFGx __get_sPMPCFGx
__set_SMPUCFGx __set_sPMPCFGx
__get_SMPUxCFG __get_sPMPxCFG
__set_SMPUxCFG __set_sPMPxCFG
__get_SMPUADDRx __get_sPMPADDRx
__set_SMPUADDRx __set_sPMPADDRx
__set_SMPUENTRYx __set_sPMPENTRYx
__get_SMPUENTRYx __get_sPMPENTRYx

Typedefs

typedef spmp_config smpu_config

sPMP has upgraded to S-mode Memory Protection Unit, renamed as SMPU, but still share the apis with sPMP’s

Functions

__STATIC_INLINE rv_csr_t __get_sPMPCFGx (uint32_t csr_idx)

Get sPMPCFGx Register by csr index.

Return the content of the sPMPCFGx Register.

Remark

  • For RV64, only csr_idx = 0 and csr_idx = 2 is allowed. spmpcfg0 and spmpcfg2 hold the configurations for the 16 sPMP entries, spmpcfg1 and spmpcfg3 are illegal

  • For RV32, spmpcfg0–spmpcfg3, hold the configurations spmp0cfg–spmp15cfg for the 16 sPMP entries

Parameters:

csr_idx – [in] sPMPCFG CSR index(0-3)

Returns:

sPMPCFGx Register value

__STATIC_INLINE void __set_sPMPCFGx (uint32_t csr_idx, rv_csr_t spmpcfg)

Set sPMPCFGx by csr index.

Write the given value to the sPMPCFGx Register.

Remark

  • For RV64, only csr_idx = 0 and csr_idx = 2 is allowed. spmpcfg0 and spmpcfg2 hold the configurations for the 16 sPMP entries, spmpcfg1 and spmpcfg3 are illegal

  • For RV32, spmpcfg0–spmpcfg3, hold the configurations spmp0cfg–spmp15cfg for the 16 sPMP entries

Parameters:

  • csr_idx – [in] sPMPCFG CSR index(0-3)

  • spmpcfg – [in] sPMPCFGx Register value to set

__STATIC_INLINE uint8_t __get_sPMPxCFG (uint32_t entry_idx)

Get 8bit sPMPxCFG Register by sPMP entry index.

Return the content of the sPMPxCFG Register.

Parameters:

entry_idx – [in] sPMP region index(0-15)

Returns:

sPMPxCFG Register value

__STATIC_INLINE void __set_sPMPxCFG (uint32_t entry_idx, uint8_t spmpxcfg)

Set 8bit sPMPxCFG by spmp entry index.

Set the given spmpxcfg value to the sPMPxCFG Register.

Remark

  • For RV32, 4 spmpxcfgs are densely packed into one CSR in order For RV64, 8 spmpxcfgs are densely packed into one CSR in order

Parameters:

  • entry_idx – [in] sPMPx region index(0-15)

  • spmpxcfg – [in] sPMPxCFG register value to set

__STATIC_INLINE rv_csr_t __get_sPMPADDRx (uint32_t csr_idx)

Get sPMPADDRx Register by CSR index.

Return the content of the sPMPADDRx Register.

Parameters:

csr_idx – [in] sPMP region CSR index(0-15)

Returns:

sPMPADDRx Register value

__STATIC_INLINE void __set_sPMPADDRx (uint32_t csr_idx, rv_csr_t spmpaddr)

Set sPMPADDRx by CSR index.

Write the given value to the sPMPADDRx Register.

Parameters:

  • csr_idx – [in] sPMP region CSR index(0-15)

  • spmpaddr – [in] sPMPADDRx Register value to set

__STATIC_INLINE void __set_sPMPENTRYx (uint32_t entry_idx, const spmp_config *spmp_cfg)

Set sPMP entry by entry idx.

Write the given value to the sPMPxCFG Register and sPMPADDRx.

Remark

  • If the size of memory region is 2^12(4KB) range, spmp_cfg->order makes 12, and the like.

  • Suppose the size of memory region is 2^X bytes range, if X >=3, the NA4 mode is not selectable, NAPOT is selected.

  • TOR of A field in sPMP configuration register is not considered here.

Parameters:

  • entry_idx – [in] sPMP entry index(0-15)

  • spmp_cfg – [in] structure of L,U,X,W,R field of sPMP configuration register, memory region base address and size of memory region as power of 2

__STATIC_INLINE int __get_sPMPENTRYx (unsigned int entry_idx, spmp_config *spmp_cfg)

Get sPMP entry by entry idx.

Write the given value to the sPMPxCFG Register and sPMPADDRx.

Remark

  • If the size of memory region is 2^12(4KB) range, spmp_cfg->order makes 12, and the like.

  • TOR of A field in PMP configuration register is not considered here.

Parameters:

  • entry_idx – [in] sPMP entry index(0-15)

  • spmp_cfg – [out] structure of L, U, X, W, R, A field of sPMP configuration register, memory region base address and size of memory region as power of 2

Returns:

-1 failure, else 0 success

__STATIC_INLINE void __set_SMPUSWITCHx (uint64_t val)

Set SMPU each entry’s on/off status.

Write the given value to the SMPUSWITCHx Register.

Remark

  • Each bit of this register holds on/off status of the corresponding SMPU entry respectively.

  • An SMPU entry is activated only when both corresponding bits in smpuswitch and A field of smpuicfg are set. (i.e., smpuswitch[i] & smpu[i]cfg.A).

Parameters:

val – [in] activate each entry(max to 64) or not

__STATIC_INLINE uint64_t __get_SMPUSWITCHx (void)

Get SMPU each entry’s on/off status.

Get the value of the SMPUSWITCHx Register.

Remark

  • Each bit of this register holds on/off status of the corresponding SMPU entry respectively.

  • An SMPU entry is activated only when both corresponding bits in smpuswitch and A field of smpuicfg are set. (i.e., smpuswitch[i] & smpu[i]cfg.A).

struct spmp_config
#include <core_feature_spmp.h>