PMP Functions

Click Nuclei PMP Unit to learn about Core PMP Unit in Nuclei ISA Spec.

__STATIC_INLINE rv_csr_t __get_PMPCFGx (uint32_t csr_idx)
__STATIC_INLINE void __set_PMPCFGx (uint32_t csr_idx, rv_csr_t pmpcfg)
__STATIC_INLINE uint8_t __get_PMPxCFG (uint32_t entry_idx)
__STATIC_INLINE void __set_PMPxCFG (uint32_t entry_idx, uint8_t pmpxcfg)
__STATIC_INLINE rv_csr_t __get_PMPADDRx (uint32_t csr_idx)
__STATIC_INLINE void __set_PMPADDRx (uint32_t csr_idx, rv_csr_t pmpaddr)
__STATIC_INLINE void __set_PMPENTRYx (uint32_t entry_idx, const pmp_config *pmp_cfg)
__STATIC_INLINE int __get_PMPENTRYx (unsigned int entry_idx, pmp_config *pmp_cfg)
struct pmp_config
group PMP Functions

Functions that related to the RISCV Phyiscal Memory Protection.

Optional physical memory protection (PMP) unit provides per-hart machine-mode control registers to allow physical memory access privileges (read, write, execute) to be specified for each physical memory region.

The PMP can supports region access control settings as small as four bytes.

Functions

__STATIC_INLINE rv_csr_t __get_PMPCFGx (uint32_t csr_idx)

Get PMPCFGx Register by csr index.

Return the content of the PMPCFGx Register.

Remark

  • For RV64, only csr_idx = 0 and csr_idx = 2 is allowed. pmpcfg0 and pmpcfg2 hold the configurations for the 16 PMP entries, pmpcfg1 and pmpcfg3 are illegal

  • For RV32, pmpcfg0–pmpcfg3, hold the configurations pmp0cfg–pmp15cfg for the 16 PMP entries

Parameters:

csr_idx – [in] PMPCFG CSR index(0-3)

Returns:

PMPCFGx Register value

__STATIC_INLINE void __set_PMPCFGx (uint32_t csr_idx, rv_csr_t pmpcfg)

Set PMPCFGx by csr index.

Write the given value to the PMPCFGx Register.

Remark

  • For RV64, only csr_idx = 0 and csr_idx = 2 is allowed. pmpcfg0 and pmpcfg2 hold the configurations for the 16 PMP entries, pmpcfg1 and pmpcfg3 are illegal

  • For RV32, pmpcfg0–pmpcfg3, hold the configurations pmp0cfg–pmp15cfg for the 16 PMP entries

Parameters:

  • csr_idx – [in] PMPCFG CSR index(0-3)

  • pmpcfg – [in] PMPCFGx Register value to set

__STATIC_INLINE uint8_t __get_PMPxCFG (uint32_t entry_idx)

Get 8bit PMPxCFG Register by PMP entry index.

Return the content of the PMPxCFG Register.

Parameters:

entry_idx – [in] PMP region index(0-15)

Returns:

PMPxCFG Register value

__STATIC_INLINE void __set_PMPxCFG (uint32_t entry_idx, uint8_t pmpxcfg)

Set 8bit PMPxCFG by pmp entry index.

Set the given pmpxcfg value to the PMPxCFG Register.

Remark

  • For RV32, 4 pmpxcfgs are densely packed into one CSR in order For RV64, 8 pmpxcfgs are densely packed into one CSR in order

Parameters:

  • entry_idx – [in] PMPx region index(0-15)

  • pmpxcfg – [in] PMPxCFG register value to set

__STATIC_INLINE rv_csr_t __get_PMPADDRx (uint32_t csr_idx)

Get PMPADDRx Register by CSR index.

Return the content of the PMPADDRx Register.

Parameters:

csr_idx – [in] PMP region CSR index(0-15)

Returns:

PMPADDRx Register value

__STATIC_INLINE void __set_PMPADDRx (uint32_t csr_idx, rv_csr_t pmpaddr)

Set PMPADDRx by CSR index.

Write the given value to the PMPADDRx Register.

Parameters:

  • csr_idx – [in] PMP region CSR index(0-15)

  • pmpaddr – [in] PMPADDRx Register value to set

__STATIC_INLINE void __set_PMPENTRYx (uint32_t entry_idx, const pmp_config *pmp_cfg)

Set PMP entry by entry idx.

Write the given value to the PMPxCFG Register and PMPADDRx.

Remark

  • If the size of memory region is 2^12(4KB) range, pmp_cfg->order makes 12, and the like.

  • Suppose the size of memory region is 2^X bytes range, if X >=3, the NA4 mode is not selectable, NAPOT is selected.

  • TOR of A field in PMP configuration register is not considered here.

Parameters:

  • entry_idx – [in] PMP entry index(0-15)

  • pmp_cfg – [in] structure of L, X, W, R field of PMP configuration register, memory region base address and size of memory region as power of 2

__STATIC_INLINE int __get_PMPENTRYx (unsigned int entry_idx, pmp_config *pmp_cfg)

Get PMP entry by entry idx.

Write the given value to the PMPxCFG Register and PMPADDRx.

Remark

  • If the size of memory region is 2^12(4KB) range, pmp_cfg->order makes 12, and the like.

  • TOR of A field in PMP configuration register is not considered here.

Parameters:

  • entry_idx – [in] PMP entry index(0-15)

  • pmp_cfg – [out] structure of L, X, W, R, A field of PMP configuration register, memory region base address and size of memory region as power of 2

Returns:

-1 failure, else 0 success

struct pmp_config
#include <core_feature_pmp.h>