64bit Addition & Subtraction InstructionsΒΆ

__STATIC_FORCEINLINE unsigned long long __RV_ADD64(unsigned long long a, unsigned long long b)

__STATIC_FORCEINLINE long long __RV_KADD64(long long a, long long b)

__STATIC_FORCEINLINE long long __RV_KSUB64(long long a, long long b)

__STATIC_FORCEINLINE long long __RV_RADD64(long long a, long long b)

__STATIC_FORCEINLINE long long __RV_RSUB64(long long a, long long b)

__STATIC_FORCEINLINE unsigned long long __RV_SUB64(unsigned long long a, unsigned long long b)

__STATIC_FORCEINLINE unsigned long long __RV_UKADD64(unsigned long long a, unsigned long long b)

__STATIC_FORCEINLINE unsigned long long __RV_UKSUB64(unsigned long long a, unsigned long long b)

__STATIC_FORCEINLINE unsigned long long __RV_URADD64(unsigned long long a, unsigned long long b)

__STATIC_FORCEINLINE unsigned long long __RV_URSUB64(unsigned long long a, unsigned long long b)

group
NMSIS_Core_DSP_Intrinsic_64B_ADDSUB
64bit Addition & Subtraction Instructions
there are 10 64bit Addition & Subtraction Instructions.
Functions

__STATIC_FORCEINLINE unsigned long long __RV_ADD64(unsigned long long a, unsigned long long b)
ADD64 (64bit Addition)
Type: 64bit Profile
Syntax:
ADD64 Rd, Rs1, Rs2
Purpose:
Add two 64bit signed or unsigned integers.
RV32 Description:
This instruction adds the 64bit integer of an even/odd pair of registers specified by Rs1(4,1) with the 64bit integer of an even/odd pair of registers specified by Rs2(4,1), and then writes the 64bit result to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction has the same behavior as the ADD instruction in RV64I.
Note:
This instruction can be used for either signed or unsigned addition.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); R[t_H].R[t_L] = R[a_H].R[a_L] + R[b_H].R[b_L]; RV64: Rd = Rs1 + Rs2;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b

__STATIC_FORCEINLINE long long __RV_KADD64(long long a, long long b)
KADD64 (64bit Signed Saturating Addition)
Type: DSP (64bit Profile)
Syntax:
KADD64 Rd, Rs1, Rs2
Purpose:
Add two 64bit signed integers. The result is saturated to the Q63 range.
RV32 Description:
This instruction adds the 64bit signed integer of an even/odd pair of registers specified by Rs1(4,1) with the 64bit signed integer of an even/odd pair of registers specified by Rs2(4,1). If the 64bit result is beyond the Q63 number range (2^63 <= Q63 <= 2^631), it is saturated to the range and the OV bit is set to 1. The saturated result is written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction adds the 64bit signed integer in Rs1 with the 64bit signed integer in Rs2. If the result is beyond the Q63 number range (2^63 <= Q63 <= 2^631), it is saturated to the range and the OV bit is set to 1. The saturated result is written to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); result = R[a_H].R[a_L] + R[b_H].R[b_L]; if (result > (2^63)1) { result = (2^63)1; OV = 1; } else if (result < 2^63) { result = 2^63; OV = 1; } R[t_H].R[t_L] = result; RV64: result = Rs1 + Rs2; if (result > (2^63)1) { result = (2^63)1; OV = 1; } else if (result < 2^63) { result = 2^63; OV = 1; } Rd = result;
 Return
value stored in long long type
 Parameters
[in] a
: long long type of value stored in a[in] b
: long long type of value stored in b

__STATIC_FORCEINLINE long long __RV_KSUB64(long long a, long long b)
KSUB64 (64bit Signed Saturating Subtraction)
Type: DSP (64bit Profile)
Syntax:
KSUB64 Rd, Rs1, Rs2
Purpose:
Perform a 64bit signed integer subtraction. The result is saturated to the Q63 range.
RV32 Description:
This instruction subtracts the 64bit signed integer of an even/odd pair of registers specified by Rs2(4,1) from the 64bit signed integer of an even/odd pair of registers specified by Rs1(4,1). If the 64bit result is beyond the Q63 number range (2^63 <= Q63 <= 2^631), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the operand and the even2d
register of the pair contains the low 32bit of the operand.RV64 Description:
This instruction subtracts the 64bit signed integer of Rs2 from the 64bit signed integer of Rs1. If the 64bit result is beyond the Q63 number range (2^63 <= Q63 <= 2^631), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); result = R[a_H].R[a_L]  R[b_H].R[b_L]; if (result > (2^63)1) { result = (2^63)1; OV = 1; } else if (result < 2^63) { result = 2^63; OV = 1; } R[t_H].R[t_L] = result; RV64: result = Rs1  Rs2; if (result > (2^63)1) { result = (2^63)1; OV = 1; } else if (result < 2^63) { result = 2^63; OV = 1; } Rd = result;
 Return
value stored in long long type
 Parameters
[in] a
: long long type of value stored in a[in] b
: long long type of value stored in b

__STATIC_FORCEINLINE long long __RV_RADD64(long long a, long long b)
RADD64 (64bit Signed Halving Addition)
Type: DSP (64bit Profile)
Syntax:
RADD64 Rd, Rs1, Rs2
Purpose:
Add two 64bit signed integers. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction adds the 64bit signed integer of an even/odd pair of registers specified by Rs1(4,1) with the 64bit signed integer of an even/odd pair of registers specified by Rs2(4,1). The 64bit addition result is first arithmetically rightshifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction adds the 64bit signed integer in Rs1 with the 64bit signed integer in Rs2. The 64bit addition result is first arithmetically rightshifted by 1 bit and then written to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); R[t_H].R[t_L] = (R[a_H].R[a_L] + R[b_H].R[b_L]) s>> 1; RV64: Rd = (Rs1 + Rs2) s>> 1;
 Return
value stored in long long type
 Parameters
[in] a
: long long type of value stored in a[in] b
: long long type of value stored in b

__STATIC_FORCEINLINE long long __RV_RSUB64(long long a, long long b)
RSUB64 (64bit Signed Halving Subtraction)
Type: DSP (64bit Profile)
Syntax:
RSUB64 Rd, Rs1, Rs2
Purpose:
Perform a 64bit signed integer subtraction. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction subtracts the 64bit signed integer of an even/odd pair of registers specified by Rb(4,1) from the 64bit signed integer of an even/odd pair of registers specified by Ra(4,1). The subtraction result is first arithmetically rightshifted by 1 bit and then written to an even/odd pair of registers specified by Rt(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction subtracts the 64bit signed integer in Rs2 from the 64bit signed integer in Rs1. The 64bit subtraction result is first arithmetically rightshifted by 1 bit and then written to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); R[t_H].R[t_L] = (R[a_H].R[a_L]  R[b_H].R[b_L]) s>> 1; RV64: Rd = (Rs1  Rs2) s>> 1;
 Return
value stored in long long type
 Parameters
[in] a
: long long type of value stored in a[in] b
: long long type of value stored in b

__STATIC_FORCEINLINE unsigned long long __RV_SUB64(unsigned long long a, unsigned long long b)
SUB64 (64bit Subtraction)
Type: DSP (64bit Profile)
Syntax:
SUB64 Rd, Rs1, Rs2
Purpose:
Perform a 64bit signed or unsigned integer subtraction.
RV32 Description:
This instruction subtracts the 64bit integer of an even/odd pair of registers specified by Rs2(4,1) from the 64bit integer of an even/odd pair of registers specified by Rs1(4,1), and then writes the 64bit result to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the operand and the even2d
register of the pair contains the low 32bit of the operand.RV64 Description:
This instruction subtracts the 64bit integer of Rs2 from the 64bit integer of Rs1, and then writes the 64bit result to Rd.
Note:
This instruction can be used for either signed or unsigned subtraction.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); R[t_H].R[t_L] = R[a_H].R[a_L]  R[b_H].R[b_L]; * RV64: Rd = Rs1  Rs2;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b

__STATIC_FORCEINLINE unsigned long long __RV_UKADD64(unsigned long long a, unsigned long long b)
UKADD64 (64bit Unsigned Saturating Addition)
Type: DSP (64bit Profile)
Syntax:
UKADD64 Rd, Rs1, Rs2
Purpose:
Add two 64bit unsigned integers. The result is saturated to the U64 range.
RV32 Description:
This instruction adds the 64bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1) with the 64bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1). If the 64bit result is beyond the U64 number range (0 <= U64 <= 2^641), it is saturated to the range and the OV bit is set to 1. The saturated result is written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction adds the 64bit unsigned integer in Rs1 with the 64bit unsigned integer in Rs2. If the 64bit result is beyond the U64 number range (0 <= U64 <= 2^641), it is saturated to the range and the OV bit is set to 1. The saturated result is written to Rd.
Operations:
* RV32: t_L = CONCAT(Rt(4,1),1'b0); t_H = CONCAT(Rt(4,1),1'b1); a_L = CONCAT(Ra(4,1),1'b0); a_H = CONCAT(Ra(4,1),1'b1); b_L = CONCAT(Rb(4,1),1'b0); b_H = CONCAT(Rb(4,1),1'b1); result = R[a_H].R[a_L] + R[b_H].R[b_L]; if (result > (2^64)1) { result = (2^64)1; OV = 1; } R[t_H].R[t_L] = result; * RV64: result = Rs1 + Rs2; if (result > (2^64)1) { result = (2^64)1; OV = 1; } Rd = result;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b

__STATIC_FORCEINLINE unsigned long long __RV_UKSUB64(unsigned long long a, unsigned long long b)
UKSUB64 (64bit Unsigned Saturating Subtraction)
Type: DSP (64bit Profile)
Syntax:
UKSUB64 Rd, Rs1, Rs2
Purpose:
Perform a 64bit signed integer subtraction. The result is saturated to the U64 range.
RV32 Description:
This instruction subtracts the 64bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1) from the 64bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1). If the 64bit result is beyond the U64 number range (0 <= U64 <= 2^641), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the operand and the even2d
register of the pair contains the low 32bit of the operand.RV64 Description:
This instruction subtracts the 64bit unsigned integer of Rs2 from the 64bit unsigned integer of an even/odd pair of Rs1. If the 64bit result is beyond the U64 number range (0 <= U64 <= 2^641), it is saturated to the range and the OV bit is set to 1. The saturated result is then written to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); a_L = CONCAT(Rs1(4,1),1'b0); a_H = CONCAT(Rs1(4,1),1'b1); b_L = CONCAT(Rs2(4,1),1'b0); b_H = CONCAT(Rs2(4,1),1'b1); result = R[a_H].R[a_L]  R[b_H].R[b_L]; if (result < 0) { result = 0; OV = 1; } R[t_H].R[t_L] = result; * RV64 result = Rs1  Rs2; if (result < 0) { result = 0; OV = 1; } Rd = result;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b

__STATIC_FORCEINLINE unsigned long long __RV_URADD64(unsigned long long a, unsigned long long b)
URADD64 (64bit Unsigned Halving Addition)
Type: DSP (64bit Profile)
Syntax:
URADD64 Rd, Rs1, Rs2
Purpose:
Add two 64bit unsigned integers. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction adds the 64bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1) with the 64bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1). The 64bit addition result is first logically rightshifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction adds the 64bit unsigned integer in Rs1 with the 64bit unsigned integer Rs2. The 64bit addition result is first logically rightshifted by 1 bit and then written to Rd.
Operations:
* RV32: t_L = CONCAT(Rt(4,1),1'b0); t_H = CONCAT(Rt(4,1),1'b1); a_L = CONCAT(Ra(4,1),1'b0); a_H = CONCAT(Ra(4,1),1'b1); b_L = CONCAT(Rb(4,1),1'b0); b_H = CONCAT(Rb(4,1),1'b1); R[t_H].R[t_L] = (R[a_H].R[a_L] + R[b_H].R[b_L]) u>> 1; * RV64: Rd = (Rs1 + Rs2) u>> 1;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b

__STATIC_FORCEINLINE unsigned long long __RV_URSUB64(unsigned long long a, unsigned long long b)
URSUB64 (64bit Unsigned Halving Subtraction)
Type: DSP (64bit Profile)
Syntax:
URSUB64 Rd, Rs1, Rs2
Purpose:
Perform a 64bit unsigned integer subtraction. The result is halved to avoid overflow or saturation.
RV32 Description:
This instruction subtracts the 64bit unsigned integer of an even/odd pair of registers specified by Rs2(4,1) from the 64bit unsigned integer of an even/odd pair of registers specified by Rs1(4,1). The subtraction result is first logically rightshifted by 1 bit and then written to an even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the result and the even2d
register of the pair contains the low 32bit of the result.RV64 Description:
This instruction subtracts the 64bit unsigned integer in Rs2 from the 64bit unsigned integer in Rs1. The subtraction result is first logically rightshifted by 1 bit and then written to Rd.
Operations:
* RV32: t_L = CONCAT(Rt(4,1),1'b0); t_H = CONCAT(Rt(4,1),1'b1); a_L = CONCAT(Ra(4,1),1'b0); a_H = CONCAT(Ra(4,1),1'b1); b_L = CONCAT(Rb(4,1),1'b0); b_H = CONCAT(Rb(4,1),1'b1); R[t_H].R[t_L] = (R[a_H].R[a_L]  R[b_H].R[b_L]) u>> 1; * RV64: Rd = (Rs1  Rs2) u>> 1;
 Return
value stored in unsigned long long type
 Parameters
[in] a
: unsigned long long type of value stored in a[in] b
: unsigned long long type of value stored in b
