32-bit Multiply with 64-bit Add/Subtract Instructions
- __STATIC_FORCEINLINE long long __RV_KMAR64 (long long t, long a, long b)
- __STATIC_FORCEINLINE long long __RV_KMSR64 (long long t, long a, long b)
- __STATIC_FORCEINLINE long long __RV_SMAR64 (long long t, long a, long b)
- __STATIC_FORCEINLINE long long __RV_SMSR64 (long long t, long a, long b)
- __STATIC_FORCEINLINE unsigned long long __RV_UKMAR64 (unsigned long long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE unsigned long long __RV_UKMSR64 (unsigned long long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE unsigned long long __RV_UMAR64 (unsigned long long t, unsigned long a, unsigned long b)
- __STATIC_FORCEINLINE unsigned long long __RV_UMSR64 (unsigned long long t, unsigned long a, unsigned long b)
- group NMSIS_Core_DSP_Intrinsic_32B_MULT_64B_ADDSUB
32-bit Multiply with 64-bit Add/Subtract Instructions
there are 32-bit Multiply 64-bit Add/Subtract Instructions
Functions
- __STATIC_FORCEINLINE long long __RV_KMAR64 (long long t, long a, long b)
KMAR64 (Signed Multiply and Saturating Add to 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
KMAR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit signed elements in two registers and add the 64-bit multiplication results to the 64-bit signed data of a pair of registers (RV32) or a register (RV64). The result is saturated to the Q63 range and written back to the pair of registers (RV32) or the register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit signed data of Rs1 with that of Rs2. It adds the 64-bit multiplication result to the 64-bit signed data of an even/odd pair of registers specified by Rd(4,1) with unlimited precision. If the 64-bit addition result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., value d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit signed elements of Rs1 with that of Rs2. It adds the 64-bit multiplication results to the 64-bit signed data of Rd with unlimited precision. If the 64-bit addition result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); result = R[t_H].R[t_L] + (Rs1 * Rs2); if (result > (2^63)-1) { result = (2^63)-1; OV = 1; } else if (result < -2^63) { result = -2^63; OV = 1; } R[t_H].R[t_L] = result; RV64: // `result` has unlimited precision result = Rd + (Rs1.W[0] * Rs2.W[0]) + (Rs1.W[1] * Rs2.W[1]); if (result > (2^63)-1) { result = (2^63)-1; OV = 1; } else if (result < -2^63) { result = -2^63; OV = 1; } Rd = result;
- Parameters
t – [in] long long type of value stored in t
a – [in] long type of value stored in a
b – [in] long type of value stored in b
- Returns
value stored in long long type
- __STATIC_FORCEINLINE long long __RV_KMSR64 (long long t, long a, long b)
KMSR64 (Signed Multiply and Saturating Subtract from 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
KMSR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit signed elements in two registers and subtract the 64-bit multiplication results from the 64-bit signed data of a pair of registers (RV32) or a register (RV64). The result is saturated to the Q63 range and written back to the pair of registers (RV32) or the register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit signed data of Rs1 with that of Rs2. It subtracts the 64-bit multiplication result from the 64-bit signed data of an even/odd pair of registers specified by Rd(4,1) with unlimited precision. If the 64-bit subtraction result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit signed elements of Rs1 with that of Rs2. It subtracts the 64-bit multiplication results from the 64-bit signed data in Rd with unlimited precision. If the 64-bit subtraction result is beyond the Q63 number range (-2^63 <= Q63 <= 2^63-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to Rd.
Operations:
RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); result = R[t_H].R[t_L] - (Rs1 * Rs2); if (result > (2^63)-1) { result = (2^63)-1; OV = 1; } else if (result < -2^63) { result = -2^63; OV = 1; } R[t_H].R[t_L] = result; RV64: // `result` has unlimited precision result = Rd - (Rs1.W[0] * Rs2.W[0]) - (Rs1.W[1] * Rs2.W[1]); if (result > (2^63)-1) { result = (2^63)-1; OV = 1; } else if (result < -2^63) { result = -2^63; OV = 1; } Rd = result;
- Parameters
t – [in] long long type of value stored in t
a – [in] long type of value stored in a
b – [in] long type of value stored in b
- Returns
value stored in long long type
- __STATIC_FORCEINLINE long long __RV_SMAR64 (long long t, long a, long b)
SMAR64 (Signed Multiply and Add to 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
SMAR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit signed elements in two registers and add the 64-bit multiplication result to the 64-bit signed data of a pair of registers (RV32) or a register (RV64). The result is written back to the pair of registers (RV32) or a register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit signed data of Rs1 with that of Rs2. It adds the 64-bit multiplication result to the 64-bit signed data of an even/odd pair of registers specified by Rd(4,1). The addition result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit signed elements of Rs1 with that of Rs2. It adds the 64-bit multiplication results to the 64-bit signed data of Rd. The addition result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); R[t_H].R[t_L] = R[t_H].R[t_L] + (Rs1 * Rs2); * RV64: Rd = Rd + (Rs1.W[0] * Rs2.W[0]) + (Rs1.W[1] * Rs2.W[1]);
- Parameters
t – [in] long long type of value stored in t
a – [in] long type of value stored in a
b – [in] long type of value stored in b
- Returns
value stored in long long type
- __STATIC_FORCEINLINE long long __RV_SMSR64 (long long t, long a, long b)
SMSR64 (Signed Multiply and Subtract from 64- Bit Data)
Type: DSP (64-bit Profile)
Syntax:
SMSR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit signed elements in two registers and subtract the 64-bit multiplication results from the 64-bit signed data of a pair of registers (RV32) or a register (RV64). The result is written back to the pair of registers (RV32) or a register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit signed data of Rs1 with that of Rs2. It subtracts the 64-bit multiplication result from the 64-bit signed data of an even/odd pair of registers specified by Rd(4,1). The subtraction result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit signed elements of Rs1 with that of Rs2. It subtracts the 64-bit multiplication results from the 64-bit signed data of Rd. The subtraction result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); R[t_H].R[t_L] = R[t_H].R[t_L] - (Rs1 * Rs2); * RV64: Rd = Rd - (Rs1.W[0] * Rs2.W[0]) - (Rs1.W[1] * Rs2.W[1]);
- Parameters
t – [in] long long type of value stored in t
a – [in] long type of value stored in a
b – [in] long type of value stored in b
- Returns
value stored in long long type
- __STATIC_FORCEINLINE unsigned long long __RV_UKMAR64 (unsigned long long t, unsigned long a, unsigned long b)
UKMAR64 (Unsigned Multiply and Saturating Add to 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
UKMAR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit unsigned elements in two registers and add the 64-bit multiplication results to the 64-bit unsigned data of a pair of registers (RV32) or a register (RV64). The result is saturated to the U64 range and written back to the pair of registers (RV32) or the register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit unsigned data of Rs1 with that of Rs2. It adds the 64-bit multiplication result to the 64-bit unsigned data of an even/odd pair of registers specified by Rd(4,1) with unlimited precision. If the 64-bit addition result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit unsigned elements of Rs1 with that of Rs2. It adds the 64-bit multiplication results to the 64-bit unsigned data in Rd with unlimited precision. If the 64-bit addition result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); result = R[t_H].R[t_L] + (Rs1 * Rs2); if (result > (2^64)-1) { result = (2^64)-1; OV = 1; } R[t_H].R[t_L] = result; * RV64: // `result` has unlimited precision result = Rd + (Rs1.W[0] u* Rs2.W[0]) + (Rs1.W[1] u* Rs2.W[1]); if (result > (2^64)-1) { result = (2^64)-1; OV = 1; } Rd = result;
- Parameters
t – [in] unsigned long long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in unsigned long long type
- __STATIC_FORCEINLINE unsigned long long __RV_UKMSR64 (unsigned long long t, unsigned long a, unsigned long b)
UKMSR64 (Unsigned Multiply and Saturating Subtract from 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
UKMSR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit unsigned elements in two registers and subtract the 64-bit multiplication results from the 64-bit unsigned data of a pair of registers (RV32) or a register (RV64). The result is saturated to the U64 range and written back to the pair of registers (RV32) or a register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit unsigned data of Rs1 with that of Rs2. It subtracts the 64-bit multiplication result from the 64-bit unsigned data of an even/odd pair of registers specified by Rd(4,1) with unlimited precision. If the 64-bit subtraction result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit unsigned elements of Rs1 with that of Rs2. It subtracts the 64-bit multiplication results from the 64-bit unsigned data of Rd with unlimited precision. If the 64-bit subtraction result is beyond the U64 number range (0 <= U64 <= 2^64-1), it is saturated to the range and the OV bit is set to 1. The saturated result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); result = R[t_H].R[t_L] - (Rs1 u* Rs2); if (result < 0) { result = 0; OV = 1; } R[t_H].R[t_L] = result; * RV64: // `result` has unlimited precision result = Rd - (Rs1.W[0] u* Rs2.W[0]) - (Rs1.W[1] u* Rs2.W[1]); if (result < 0) { result = 0; OV = 1; } Rd = result;
- Parameters
t – [in] unsigned long long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in unsigned long long type
- __STATIC_FORCEINLINE unsigned long long __RV_UMAR64 (unsigned long long t, unsigned long a, unsigned long b)
UMAR64 (Unsigned Multiply and Add to 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
UMAR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit unsigned elements in two registers and add the 64-bit multiplication results to the 64-bit unsigned data of a pair of registers (RV32) or a register (RV64). The result is written back to the pair of registers (RV32) or a register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit unsigned data of Rs1 with that of Rs2. It adds the 64-bit multiplication result to the 64-bit unsigned data of an even/odd pair of registers specified by Rd(4,1). The addition result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit unsigned elements of Rs1 with that of Rs2. It adds the 64-bit multiplication results to the 64-bit unsigned data of Rd. The addition result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); R[t_H].R[t_L] = R[t_H].R[t_L] + (Rs1 * Rs2); * RV64: Rd = Rd + (Rs1.W[0] u* Rs2.W[0]) + (Rs1.W[1] u* Rs2.W[1]);
- Parameters
t – [in] unsigned long long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in unsigned long long type
- __STATIC_FORCEINLINE unsigned long long __RV_UMSR64 (unsigned long long t, unsigned long a, unsigned long b)
UMSR64 (Unsigned Multiply and Subtract from 64-Bit Data)
Type: DSP (64-bit Profile)
Syntax:
UMSR64 Rd, Rs1, Rs2
Purpose
:
Multiply the 32-bit unsigned elements in two registers and subtract the 64-bit multiplication results from the 64-bit unsigned data of a pair of registers (RV32) or a register (RV64). The result is written back to the pair of registers (RV32) or a register (RV64).
RV32 Description
:
This instruction multiplies the 32-bit unsigned data of Rs1 with that of Rs2. It subtracts the 64-bit multiplication result from the 64-bit unsigned data of an even/odd pair of registers specified by Rd(4,1). The subtraction result is written back to the even/odd pair of registers specified by Rd(4,1). Rx(4,1), i.e., d, determines the even/odd pair group of two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32-bit of the result and the even2d
register of the pair contains the low 32-bit of the result.RV64 Description
:
This instruction multiplies the 32-bit unsigned elements of Rs1 with that of Rs2. It subtracts the 64-bit multiplication results from the 64-bit unsigned data of Rd. The subtraction result is written back to Rd.
Operations:
* RV32: t_L = CONCAT(Rd(4,1),1'b0); t_H = CONCAT(Rd(4,1),1'b1); R[t_H].R[t_L] = R[t_H].R[t_L] - (Rs1 * Rs2); * RV64: Rd = Rd - (Rs1.W[0] u* Rs2.W[0]) - (Rs1.W[1] u* Rs2.W[1]);
- Parameters
t – [in] unsigned long long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
- Returns
value stored in unsigned long long type