# 32-bit Computation Instructions¶

`__STATIC_FORCEINLINE long __RV_MAXW(int a, int b)`
`__STATIC_FORCEINLINE long __RV_MINW(int a, int b)`
`__STATIC_FORCEINLINE unsigned long long __RV_MULR64(unsigned long a, unsigned long b)`
`__STATIC_FORCEINLINE long long __RV_MULSR64(long a, long b)`
`__STATIC_FORCEINLINE long __RV_RADDW(int a, int b)`
`__STATIC_FORCEINLINE long __RV_RSUBW(int a, int b)`
`__STATIC_FORCEINLINE unsigned long __RV_URADDW(unsigned int a, unsigned int b)`
`__STATIC_FORCEINLINE unsigned long __RV_URSUBW(unsigned int a, unsigned int b)`
group `NMSIS_Core_DSP_Intrinsic_32B_COMPUTATION`

32-bit Computation Instructions

there are 8 32-bit Computation Instructions

Functions

`__STATIC_FORCEINLINE long __RV_MAXW(int a, int b)`

MAXW (32-bit Signed Word Maximum)

Type: DSP

Syntax:

```MAXW Rd, Rs1, Rs2
```

Purpose:

Get the larger value from the 32-bit contents of two general registers.

Description:

This instruction compares two signed 32-bit integers stored in Rs1 and Rs2, picks the larger value as the result, and writes the result to Rd.

Operations:

```if (Rs1.W >= Rs2.W) {
Rd = SE(Rs1.W);
} else {
Rd = SE(Rs2.W);
}
```

Return

value stored in long type

Parameters
• `[in] a`: int type of value stored in a

• `[in] b`: int type of value stored in b

`__STATIC_FORCEINLINE long __RV_MINW(int a, int b)`

MINW (32-bit Signed Word Minimum)

Type: DSP

Syntax:

```MINW Rd, Rs1, Rs2
```

Purpose:

Get the smaller value from the 32-bit contents of two general registers.

Description:

This instruction compares two signed 32-bit integers stored in Rs1 and Rs2, picks the smaller value as the result, and writes the result to Rd.

Operations:

```if (Rs1.W >= Rs2.W) { Rd = SE(Rs2.W); } else { Rd = SE(Rs1.W); }
```

Return

value stored in long type

Parameters
• `[in] a`: int type of value stored in a

• `[in] b`: int type of value stored in b

`__STATIC_FORCEINLINE unsigned long long __RV_MULR64(unsigned long a, unsigned long b)`

MULR64 (Multiply Word Unsigned to 64-bit Data)

Type: DSP

Syntax:

```MULR64 Rd, Rs1, Rs2
```

Purpose:

Multiply the 32-bit unsigned integer contents of two registers and write the 64-bit result.

RV32 Description:

This instruction multiplies the 32-bit content of Rs1 with that of Rs2 and writes the 64-bit multiplication result to an even/odd pair of registers containing Rd. Rd(4,1) index d determines the even/odd pair group of the two registers. Specifically, the register pair includes register 2d and 2d+1. The odd

`2d+1` register of the pair contains the high 32-bit of the result and the even `2d` register of the pair contains the low 32-bit of the result. The lower 32-bit contents of Rs1 and Rs2 are treated as unsigned integers.

RV64 Description:

This instruction multiplies the lower 32-bit content of Rs1 with that of Rs2 and writes the 64-bit multiplication result to Rd. The lower 32-bit contents of Rs1 and Rs2 are treated as unsigned integers.

Operations:

```RV32:
Mresult = CONCAT(1`b0,Rs1) u* CONCAT(1`b0,Rs2);
R[Rd(4,1).1(0)][31:0] = Mresult[63:32];
R[Rd(4,1).0(0)][31:0] = Mresult[31:0];
RV64:
Rd = Mresult[63:0];
Mresult = CONCAT(1`b0,Rs1.W) u* CONCAT(1`b0,Rs2.W);
```

Return

value stored in unsigned long long type

Parameters
• `[in] a`: unsigned long type of value stored in a

• `[in] b`: unsigned long type of value stored in b

`__STATIC_FORCEINLINE long long __RV_MULSR64(long a, long b)`

MULSR64 (Multiply Word Signed to 64-bit Data)

Type: DSP

Syntax:

```MULSR64 Rd, Rs1, Rs2
```

Purpose:

Multiply the 32-bit signed integer contents of two registers and write the 64-bit result.

RV32 Description:

This instruction multiplies the lower 32-bit content of Rs1 with the lower 32-bit content of Rs2 and writes the 64-bit multiplication result to an even/odd pair of registers containing Rd. Rd(4,1) index d determines the even/odd pair group of the two registers. Specifically, the register pair includes register 2d and 2d+1. The odd

`2d+1` register of the pair contains the high 32-bit of the result and the even `2d` register of the pair contains the low 32-bit of the result. The lower 32-bit contents of Rs1 and Rs2 are treated as signed integers.

RV64 Description:

This instruction multiplies the lower 32-bit content of Rs1 with the lower 32-bit content of Rs2 and writes the 64-bit multiplication result to Rd. The lower 32-bit contents of Rs1 and Rs2 are treated as signed integers.

Operations:

```RV32:
Mresult = Ra s* Rb;
R[Rd(4,1).1(0)][31:0] = Mresult[63:32];
R[Rd(4,1).0(0)][31:0] = Mresult[31:0];
RV64:
Mresult = Ra.W s* Rb.W;
Rd = Mresult[63:0];
```

Return

value stored in long long type

Parameters
• `[in] a`: long type of value stored in a

• `[in] b`: long type of value stored in b

`__STATIC_FORCEINLINE long __RV_RADDW(int a, int b)`

Type: DSP

Syntax:

```RADDW Rd, Rs1, Rs2
```

Purpose:

Add 32-bit signed integers and the results are halved to avoid overflow or saturation.

Description:

This instruction adds the first 32-bit signed integer in Rs1 with the first 32-bit signed integer in Rs2. The result is first arithmetically right-shifted by 1 bit and then sign-extended and written to Rd.

Examples:

```* Rs1 = 0x7FFFFFFF, Rs2 = 0x7FFFFFFF, Rd = 0x7FFFFFFF
* Rs1 = 0x80000000, Rs2 = 0x80000000, Rd = 0x80000000
* Rs1 = 0x40000000, Rs2 = 0x80000000, Rd = 0xE0000000
```

Operations:

```RV32:
Rd[31:0] = (Rs1[31:0] + Rs2[31:0]) s>> 1;
RV64:
resw[31:0] = (Rs1[31:0] + Rs2[31:0]) s>> 1;
Rd[63:0] = SE(resw[31:0]);
```

Return

value stored in long type

Parameters
• `[in] a`: int type of value stored in a

• `[in] b`: int type of value stored in b

`__STATIC_FORCEINLINE long __RV_RSUBW(int a, int b)`

RSUBW (32-bit Signed Halving Subtraction)

Type: DSP

Syntax:

```RSUBW Rd, Rs1, Rs2
```

Purpose:

Subtract 32-bit signed integers and the result is halved to avoid overflow or saturation.

Description:

This instruction subtracts the first 32-bit signed integer in Rs2 from the first 32-bit signed integer in Rs1. The result is first arithmetically right-shifted by 1 bit and then sign-extended and written to Rd.

Examples:

```* Rs1 = 0x7FFFFFFF, Rs2 = 0x80000000, Rd = 0x7FFFFFFF
* Rs1 = 0x80000000, Rs2 = 0x7FFFFFFF, Rd = 0x80000000
* Rs1 = 0x80000000, Rs2 = 0x40000000, Rd = 0xA0000000
```

Operations:

```RV32:
Rd[31:0] = (Rs1[31:0] - Rs2[31:0]) s>> 1;
RV64:
resw[31:0] = (Rs1[31:0] - Rs2[31:0]) s>> 1;
Rd[63:0] = SE(resw[31:0]);
```

Return

value stored in long type

Parameters
• `[in] a`: int type of value stored in a

• `[in] b`: int type of value stored in b

`__STATIC_FORCEINLINE unsigned long __RV_URADDW(unsigned int a, unsigned int b)`

Type: DSP

Syntax:

```URADDW Rd, Rs1, Rs2
```

Purpose:

Add 32-bit unsigned integers and the results are halved to avoid overflow or saturation.

Description:

This instruction adds the first 32-bit unsigned integer in Rs1 with the first 32-bit unsigned integer in Rs2. The result is first logically right-shifted by 1 bit and then sign-extended and written to Rd.

Examples:

```* Ra = 0x7FFFFFFF, Rb = 0x7FFFFFFF Rt = 0x7FFFFFFF
* Ra = 0x80000000, Rb = 0x80000000 Rt = 0x80000000
* Ra = 0x40000000, Rb = 0x80000000 Rt = 0x60000000
```

Operations:

```* RV32:
Rd[31:0] = (Rs1[31:0] + Rs2[31:0]) u>> 1;
* RV64:
resw[31:0] = (Rs1[31:0] + Rs2[31:0]) u>> 1;
Rd[63:0] = SE(resw[31:0]);
```

Return

value stored in unsigned long type

Parameters
• `[in] a`: unsigned int type of value stored in a

• `[in] b`: unsigned int type of value stored in b

`__STATIC_FORCEINLINE unsigned long __RV_URSUBW(unsigned int a, unsigned int b)`

URSUBW (32-bit Unsigned Halving Subtraction)

Type: DSP

Syntax:

```URSUBW Rd, Rs1, Rs2
```

Purpose:

Subtract 32-bit unsigned integers and the result is halved to avoid overflow or saturation.

Description:

This instruction subtracts the first 32-bit signed integer in Rs2 from the first 32-bit signed integer in Rs1. The result is first logically right-shifted by 1 bit and then sign-extended and written to Rd.

Examples:

```* Ra = 0x7FFFFFFF, Rb = 0x80000000 Rt = 0xFFFFFFFF
* Ra = 0x80000000, Rb = 0x7FFFFFFF Rt = 0x00000000
* Ra = 0x80000000, Rb = 0x40000000 Rt = 0x20000000
```

Operations:

```* RV32:
Rd[31:0] = (Rs1[31:0] - Rs2[31:0]) u>> 1;
* RV64:
resw[31:0] = (Rs1[31:0] - Rs2[31:0]) u>> 1;
Rd[63:0] = SE(resw[31:0]);
```

Return

value stored in unsigned long type

Parameters
• `[in] a`: unsigned int type of value stored in a

• `[in] b`: unsigned int type of value stored in b