NonSIMD Miscellaneous Instructions
 __STATIC_FORCEINLINE long __RV_AVE (long a, long b)
 __STATIC_FORCEINLINE unsigned long __RV_BITREV (unsigned long a, unsigned long b)
 __STATIC_FORCEINLINE unsigned long __RV_BPICK (unsigned long a, unsigned long b, unsigned long c)
 __STATIC_FORCEINLINE unsigned long __RV_MADDR32 (unsigned long t, unsigned long a, unsigned long b)
 __STATIC_FORCEINLINE unsigned long __RV_MSUBR32 (unsigned long t, unsigned long a, unsigned long b)
 __STATIC_FORCEINLINE long __RV_SRA_U (long a, unsigned int b)
 __STATIC_FORCEINLINE unsigned long __RV_SWAP8 (unsigned long a)
 __STATIC_FORCEINLINE unsigned long __RV_SWAP16 (unsigned long a)
 __STATIC_FORCEINLINE unsigned long __RV_WEXT (long long a, unsigned int b)

__RV_BITREVI(a, b)

__RV_INSB(t, a, b)

__RV_SRAI_U(a, b)

__RV_WEXTI(a, b)
 group NMSIS_Core_DSP_Intrinsic_NON_SIMD_MISC
NonSIMD Miscellaneous Instructions.
There are 13 Miscellaneous Instructions here.
Defines

__RV_BITREVI(a, b)
BITREVI (Bit Reverse Immediate)
Type: DSP
Syntax:
(RV32) BITREVI Rd, Rs1, imm[4:0] (RV64) BITREVI Rd, Rs1, imm[5:0]
Purpose
:
Reverse the bit positions of the source operand within a specified width starting from bit 0. The reversed width is an immediate value.
Description
:
This instruction reverses the bit positions of the content of Rs1. The reversed bit width is calculated as imm[4:0]+1 (RV32) or imm[5:0]+1 (RV64). The upper bits beyond the reversed width are filled with zeros. After the bit reverse operation, the result is written to Rd.
Operations:
msb = imm[4:0]; (RV32) msb = imm[5:0]; (RV64) rev[0:msb] = Rs1[msb:0]; Rd = ZE(rev[msb:0]);
 Parameters
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
 Returns
value stored in unsigned long type

__RV_INSB(t, a, b)
INSB (Insert Byte)
Type: DSP
Syntax:
(RV32) INSB Rd, Rs1, imm[1:0] (RV64) INSB Rd, Rs1, imm[2:0]
Purpose
:
Insert byte 0 of a 32bit or 64bit register into one of the byte elements of another register.
Description
:
This instruction inserts byte 0 of Rs1 into byte
imm[1:0]
(RV32) orimm[2:0]
(RV64) of Rd.Operations:
bpos = imm[1:0]; (RV32) bpos = imm[2:0]; (RV64) Rd.B[bpos] = Rs1.B[0]
 Parameters
t – [in] unsigned long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
 Returns
value stored in unsigned long type

__RV_SRAI_U(a, b)
SRAI.u (Rounding Shift Right Arithmetic Immediate)
Type: DSP
Syntax:
SRAI.u Rd, Rs1, imm6u[4:0] (RV32) SRAI.u Rd, Rs1, imm6u[5:0] (RV64)
Purpose
:
Perform an arithmetic right shift operation with rounding. The shift amount is an immediate value.
Description
:
This instruction rightshifts the content of Rs1 arithmetically. The shifted out bits are filled with the signbit and the shift amount is specified by the imm6u[4:0] (RV32) or imm6u[5:0] (RV64) constant . For the rounding operation, a value of 1 is added to the most significant discarded bit of the data to calculate the final result. And the result is written to Rd.
Operations:
* RV32: sa = imm6u[4:0]; if (sa > 0) { res[31:1] = SE33(Rs1[31:(sa1)]) + 1; Rd = res[31:0]; } else { Rd = Rs1; } * RV64: sa = imm6u[5:0]; if (sa > 0) { res[63:1] = SE65(Rs1[63:(sa1)]) + 1; Rd = res[63:0]; } else { Rd = Rs1; }
 Parameters
a – [in] long type of value stored in a
b – [in] unsigned int type of value stored in b
 Returns
value stored in long type

__RV_WEXTI(a, b)
WEXTI (Extract Word from 64bit Immediate)
Type: DSP
Syntax:
WEXTI Rd, Rs1, #LSBloc
Purpose
:
Extract a 32bit word from a 64bit value stored in an even/odd pair of registers (RV32) or a register (RV64) starting from a specified immediate LSB bit position.
RV32 Description
:
This instruction extracts a 32bit word from a 64bit value of an even/odd pair of registers specified by Rs1(4,1) starting from a specified immediate LSB bit position, #LSBloc. The extracted word is written to Rd. Rs1(4,1), i.e., d, determines the even/odd pair group of the two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the 64bit value and the even2d
register of the pair contains the low 32bit of the 64bit value.RV64 Description
:
This instruction extracts a 32bit word from a 64bit value in Rs1 starting from a specified immediate LSB bit position, #LSBloc. The extracted word is signextended and written to lower 32 bit of Rd.
Operations:
* RV32: Idx0 = CONCAT(Rs1(4,1),1'b0); Idx1 = CONCAT(Rs2(4,1),1'b1); src[63:0] = Concat(R[Idx1], R[Idx0]); Rd = src[31+LSBloc:LSBloc]; * RV64: ExtractW = Rs1[31+LSBloc:LSBloc]; Rd = SE(ExtractW)
 Parameters
a – [in] long long type of value stored in a
b – [in] unsigned int type of value stored in b
 Returns
value stored in unsigned long type
Functions
 __STATIC_FORCEINLINE long __RV_AVE (long a, long b)
AVE (Average with Rounding)
Type: DSP
Syntax:
AVE Rd, Rs1, Rs2
Purpose
:
Calculate the average of the contents of two general registers.
Description
:
This instruction calculates the average value of two signed integers stored in Rs1 and Rs2, rounds up a halfinteger result to the nearest integer, and writes the result to Rd.
Operations:
Sum = CONCAT(Rs1[MSB],Rs1[MSB:0]) + CONCAT(Rs2[MSB],Rs2[MSB:0]) + 1; Rd = Sum[(MSB+1):1]; for RV32: MSB=31, for RV64: MSB=63
 Parameters
a – [in] long type of value stored in a
b – [in] long type of value stored in b
 Returns
value stored in long type
 __STATIC_FORCEINLINE unsigned long __RV_BITREV (unsigned long a, unsigned long b)
BITREV (Bit Reverse)
Type: DSP
Syntax:
BITREV Rd, Rs1, Rs2
Purpose
:
Reverse the bit positions of the source operand within a specified width starting from bit 0. The reversed width is a variable from a GPR.
Description
:
This instruction reverses the bit positions of the content of Rs1. The reversed bit width is calculated as Rs2[4:0]+1 (RV32) or Rs2[5:0]+1 (RV64). The upper bits beyond the reversed width are filled with zeros. After the bit reverse operation, the result is written to Rd.
Operations:
msb = Rs2[4:0]; (for RV32) msb = Rs2[5:0]; (for RV64) rev[0:msb] = Rs1[msb:0]; Rd = ZE(rev[msb:0]);
 Parameters
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE unsigned long __RV_BPICK (unsigned long a, unsigned long b, unsigned long c)
BPICK (Bitwise Pick)
Type: DSP
Syntax:
BPICK Rd, Rs1, Rs2, Rc
Purpose
:
Select from two source operands based on a bit mask in the third operand.
Description
:
This instruction selects individual bits from Rs1 or Rs2, based on the bit mask value in Rc. If a bit in Rc is 1, the corresponding bit is from Rs1; otherwise, the corresponding bit is from Rs2. The selection results are written to Rd.
Operations:
Rd[x] = Rc[x]? Rs1[x] : Rs2[x]; for RV32, x=31...0 for RV64, x=63...0
 Parameters
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
c – [in] unsigned long type of value stored in c
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE unsigned long __RV_MADDR32 (unsigned long t, unsigned long a, unsigned long b)
MADDR32 (Multiply and Add to 32Bit Word)
Type: DSP
Syntax:
MADDR32 Rd, Rs1, Rs2
Purpose
:
Multiply the 32bit contents of two registers and add the lower 32bit multiplication result to the 32bit content of a destination register. Write the final result back to the destination register.
Description
:
This instruction multiplies the lower 32bit content of Rs1 with that of Rs2. It adds the lower 32bit multiplication result to the lower 32bit content of Rd and writes the final result (RV32) or signextended result (RV64) back to Rd. The contents of Rs1 and Rs2 can be either signed or unsigned integers.
Operations:
RV32: Mresult = Rs1 * Rs2; Rd = Rd + Mresult.W[0]; RV64: Mresult = Rs1.W[0] * Rs2.W[0]; tres[31:0] = Rd.W[0] + Mresult.W[0]; Rd = SE64(tres[31:0]);
 Parameters
t – [in] unsigned long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE unsigned long __RV_MSUBR32 (unsigned long t, unsigned long a, unsigned long b)
MSUBR32 (Multiply and Subtract from 32Bit Word)
Type: DSP
Syntax:
MSUBR32 Rd, Rs1, Rs2
Purpose
:
Multiply the 32bit contents of two registers and subtract the lower 32bit multiplication result from the 32bit content of a destination register. Write the final result back to the destination register.
Description
:
This instruction multiplies the lower 32bit content of Rs1 with that of Rs2, subtracts the lower 32bit multiplication result from the lower 32bit content of Rd, then writes the final result (RV32) or signextended result (RV64) back to Rd. The contents of Rs1 and Rs2 can be either signed or unsigned integers.
Operations:
RV32: Mresult = Rs1 * Rs2; Rd = Rd  Mresult.W[0]; RV64: Mresult = Rs1.W[0] * Rs2.W[0]; tres[31:0] = Rd.W[0]  Mresult.W[0]; Rd = SE64(tres[31:0]);
 Parameters
t – [in] unsigned long type of value stored in t
a – [in] unsigned long type of value stored in a
b – [in] unsigned long type of value stored in b
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE long __RV_SRA_U (long a, unsigned int b)
SRA.u (Rounding Shift Right Arithmetic)
Type: DSP
Syntax:
SRA.u Rd, Rs1, Rs2
Purpose
:
Perform an arithmetic right shift operation with rounding. The shift amount is a variable from a GPR.
Description
:
This instruction rightshifts the content of Rs1 arithmetically. The shifted out bits are filled with the signbit and the shift amount is specified by the loworder 5bits (RV32) or 6bits (RV64) of the Rs2 register. For the rounding operation, a value of 1 is added to the most significant discarded bit of the data to calculate the final result. And the result is written to Rd.
Operations:
* RV32: sa = Rs2[4:0]; if (sa > 0) { res[31:1] = SE33(Rs1[31:(sa1)]) + 1; Rd = res[31:0]; } else { Rd = Rs1; } * RV64: sa = Rs2[5:0]; if (sa > 0) { res[63:1] = SE65(Rs1[63:(sa1)]) + 1; Rd = res[63:0]; } else { Rd = Rs1; }
 Parameters
a – [in] long type of value stored in a
b – [in] unsigned int type of value stored in b
 Returns
value stored in long type
 __STATIC_FORCEINLINE unsigned long __RV_SWAP8 (unsigned long a)
SWAP8 (Swap Byte within Halfword)
Type: DSP
Syntax:
SWAP8 Rd, Rs1
Purpose
:
Swap the bytes within each halfword of a register.
Description
:
This instruction swaps the bytes within each halfword of Rs1 and writes the result to Rd.
Operations:
Rd.H[x] = CONCAT(Rs1.H[x][7:0],Rs1.H[x][15:8]); for RV32: x=1...0, for RV64: x=3...0
 Parameters
a – [in] unsigned long type of value stored in a
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE unsigned long __RV_SWAP16 (unsigned long a)
SWAP16 (Swap Halfword within Word)
Type: DSP
Syntax:
SWAP16 Rd, Rs1
Purpose
:
Swap the 16bit halfwords within each word of a register.
Description
:
This instruction swaps the 16bit halfwords within each word of Rs1 and writes the result to Rd.
Operations:
Rd.W[x] = CONCAT(Rs1.W[x][15:0],Rs1.H[x][31:16]); for RV32: x=0, for RV64: x=1...0
 Parameters
a – [in] unsigned long type of value stored in a
 Returns
value stored in unsigned long type
 __STATIC_FORCEINLINE unsigned long __RV_WEXT (long long a, unsigned int b)
WEXT (Extract Word from 64bit)
Type: DSP
Syntax:
WEXT Rd, Rs1, Rs2
Purpose
:
Extract a 32bit word from a 64bit value stored in an even/odd pair of registers (RV32) or a register (RV64) starting from a specified LSB bit position in a register.
RV32 Description
:
This instruction extracts a 32bit word from a 64bit value of an even/odd pair of registers specified by Rs1(4,1) starting from a specified LSB bit position, specified in Rs2[4:0]. The extracted word is written to Rd. Rs1(4,1), i.e., d, determines the even/odd pair group of the two registers. Specifically, the register pair includes register 2d and 2d+1. The odd
2d+1
register of the pair contains the high 32bit of the 64bit value and the even2d
register of the pair contains the low 32bit of the 64bit value.Operations:
* RV32: Idx0 = CONCAT(Rs1(4,1),1'b0); Idx1 = CONCAT(Rs1(4,1),1'b1); src[63:0] = Concat(R[Idx1], R[Idx0]); LSBloc = Rs2[4:0]; Rd = src[31+LSBloc:LSBloc]; * RV64: LSBloc = Rs2[4:0]; ExtractW = Rs1[31+LSBloc:LSBloc]; Rd = SE(ExtractW)
 Parameters
a – [in] long long type of value stored in a
b – [in] unsigned int type of value stored in b
 Returns
value stored in unsigned long type

__RV_BITREVI(a, b)