(RV64 Only) SIMD 32-bit Add/Subtract Instructions

__STATIC_FORCEINLINE unsigned long __RV_ADD32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_CRAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_CRSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KADD32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KCRAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KCRSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KSTAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KSTSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_KSUB32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RADD32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RCRAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RCRSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RSTAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RSTSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_RSUB32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_STAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_STSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_SUB32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKADD32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKCRAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKCRSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKSTAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKSTSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_UKSUB32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URADD32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URCRAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URCRSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URSTAS32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URSTSA32 (unsigned long a, unsigned long b)
__STATIC_FORCEINLINE unsigned long __RV_URSUB32 (unsigned long a, unsigned long b)
group NMSIS_Core_DSP_Intrinsic_RV64_SIMD_32B_ADDSUB

(RV64 Only) SIMD 32-bit Add/Subtract Instructions

The following tables list instructions that are only present in RV64. There are 30 SIMD 32-bit addition or subtraction instructions.there are 4 SIMD16-bit Packing Instructions.

Functions

__STATIC_FORCEINLINE unsigned long __RV_ADD32 (unsigned long a, unsigned long b)

ADD32 (SIMD 32-bit Addition)

Type: SIMD (RV64 Only)

Syntax:

ADD32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element additions simultaneously.

Description

:

This instruction adds the 32-bit integer elements in Rs1 with the 32-bit integer elements in Rs2, and then writes the 32-bit element results to Rd.

Note

:

This instruction can be used for either signed or unsigned addition.

Operations:

Rd.W[x] = Rs1.W[x] + Rs2.W[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_CRAS32 (unsigned long a, unsigned long b)

CRAS32 (SIMD 32-bit Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

CRAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element addition and 32-bit integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description

:

This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [31:0] of Rs2, and writes the result to [63:32] of Rd; at the same time, it subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [31:0] of Rs1, and writes the result to [31:0] of Rd.

Note

:

This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] + Rs2.W[0];
Rd.W[0] = Rs1.W[0] - Rs2.W[1];

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_CRSA32 (unsigned long a, unsigned long b)

CRSA32 (SIMD 32-bit Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

CRSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element subtraction and 32-bit integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [63:32] of Rs1, and writes the result to [63:32] of Rd; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [63:32] of Rs2, and writes the result to [31:0] of Rd

Note

:

This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] - Rs2.W[0];
Rd.W[0] = Rs1.W[0] + Rs2.W[1];

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KADD32 (unsigned long a, unsigned long b)

KADD32 (SIMD 32-bit Signed Saturating Addition)

Type: SIMD (RV64 Only)

Syntax:

KADD32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element saturating additions simultaneously.

Description

:

This instruction adds the 32-bit signed integer elements in Rs1 with the 32-bit signed integer elements in Rs2. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] + Rs2.W[x];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res[x] < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KCRAS32 (unsigned long a, unsigned long b)

KCRAS32 (SIMD 32-bit Signed Saturating Cross Addition & Subtraction)

Type: SIM (RV64 Only)

Syntax:

KCRAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element saturating addition and 32-bit signed integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description

:

This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [31:0] of Rs2; at the same time, it subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [31:0] of Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res[1] = Rs1.W[1] + Rs2.W[0];
res[0] = Rs1.W[0] - Rs2.W[1];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KCRSA32 (unsigned long a, unsigned long b)

KCRSA32 (SIMD 32-bit Signed Saturating Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

KCRSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element saturating subtraction and 32-bit signed integer element saturating addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [63:32] of Rs1; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [63:32] of Rs2. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res[1] = Rs1.W[1] - Rs2.W[0];
res[0] = Rs1.W[0] + Rs2.W[1];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KSTAS32 (unsigned long a, unsigned long b)

KSTAS32 (SIMD 32-bit Signed Saturating Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

KSTAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element saturating addition and 32-bit signed integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description

:

This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [63:32] of Rs2; at the same time, it subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [31:0] of Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res[1] = Rs1.W[1] + Rs2.W[1];
res[0] = Rs1.W[0] - Rs2.W[0];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KSTSA32 (unsigned long a, unsigned long b)

KSTSA32 (SIMD 32-bit Signed Saturating Straight Subtraction & Addition)

Type: SIM (RV64 Only)

Syntax:

KSTSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element saturating subtraction and 32-bit signed integer element saturating addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [63:32] of Rs1; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [31:0] of Rs2. If any of the results are beyond the Q31 number range ( -2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res[1] = Rs1.W[1] - Rs2.W[1];
res[0] = Rs1.W[0] + Rs2.W[0];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[1] = res[1];
Rd.W[0] = res[0];
for RV64, x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_KSUB32 (unsigned long a, unsigned long b)

KSUB32 (SIMD 32-bit Signed Saturating Subtraction)

Type: SIMD (RV64 Only)

Syntax:

KSUB32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer elements saturating subtractions simultaneously.

Description

:

This instruction subtracts the 32-bit signed integer elements in Rs2 from the 32-bit signed integer elements in Rs1. If any of the results are beyond the Q31 number range (-2^31 <= Q31 <= 2^31-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] - Rs2.W[x];
if (res[x] > (2^31)-1) {
  res[x] = (2^31)-1;
  OV = 1;
} else if (res[x] < -2^31) {
  res[x] = -2^31;
  OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RADD32 (unsigned long a, unsigned long b)

RADD32 (SIMD 32-bit Signed Halving Addition)

Type: SIMD (RV64 Only)

Syntax:

RADD32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit signed integer elements in Rs1 with the 32-bit signed integer elements in Rs2. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Rs1 = 0x7FFFFFFF, Rs2 = 0x7FFFFFFF Rd = 0x7FFFFFFF
* Rs1 = 0x80000000, Rs2 = 0x80000000 Rd = 0x80000000
* Rs1 = 0x40000000, Rs2 = 0x80000000 Rd = 0xE0000000

Operations:

Rd.W[x] = (Rs1.W[x] + Rs2.W[x]) s>> 1;
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RCRAS32 (unsigned long a, unsigned long b)

RCRAS32 (SIMD 32-bit Signed Halving Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RCRAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element addition and 32-bit signed integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit signed integer element in [63:32] of Rs1 with the 32-bit signed integer element in [31:0] of Rs2, and subtracts the 32-bit signed integer element in [63:32] of Rs2 from the 32-bit signed integer element in [31:0] of Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[0]) s>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[1]) s>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RCRSA32 (unsigned long a, unsigned long b)

RCRSA32 (SIMD 32-bit Signed Halving Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

RCRSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element subtraction and 32-bit signed integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit signed integer element in [31:0] of Rs2 from the 32-bit signed integer element in [63:32] of Rs1, and adds the 32-bit signed element integer in [31:0] of Rs1 with the 32-bit signed integer element in [63:32] of Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[0]) s>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[1]) s>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RSTAS32 (unsigned long a, unsigned long b)

RSTAS32 (SIMD 32-bit Signed Halving Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RSTAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element addition and 32-bit signed integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit signed integer element in [63:32] of Rs1 with the 32-bit signed integer element in [63:32] of Rs2, and subtracts the 32-bit signed integer element in [31:0] of Rs2 from the 32-bit signed integer element in [31:0] of Rs1. The element results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[1]) s>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[0]) s>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RSTSA32 (unsigned long a, unsigned long b)

RSTSA32 (SIMD 32-bit Signed Halving Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

RSTSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element subtraction and 32-bit signed integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit signed integer element in [63:32] of Rs2 from the 32-bit signed integer element in [63:32] of Rs1, and adds the 32-bit signed element integer in [31:0] of Rs1 with the 32-bit signed integer element in [31:0] of Rs2. The two results are first arithmetically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `RADD32` and `RSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[1]) s>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[0]) s>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_RSUB32 (unsigned long a, unsigned long b)

RSUB32 (SIMD 32-bit Signed Halving Subtraction)

Type: SIMD (RV64 Only)

Syntax:

RSUB32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit signed integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit signed integer elements in Rs2 from the 32-bit signed integer elements in Rs1. The results are first arithmetically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x80000000 Rt = 0x7FFFFFFF
* Ra = 0x80000000, Rb = 0x7FFFFFFF Rt = 0x80000000
* Ra = 0x80000000, Rb = 0x40000000 Rt = 0xA0000000

Operations:

Rd.W[x] = (Rs1.W[x] - Rs2.W[x]) s>> 1;
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_STAS32 (unsigned long a, unsigned long b)

STAS32 (SIMD 32-bit Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

STAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element addition and 32-bit integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description

:

This instruction adds the 32-bit integer element in [63:32] of Rs1 with the 32-bit integer element in [63:32] of Rs2, and writes the result to [63:32] of Rd; at the same time, it subtracts the 32-bit integer element in [31:0] of Rs2 from the 32-bit integer element in [31:0] of Rs1, and writes the result to [31:0] of Rd.

Note

:

This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] + Rs2.W[1];
Rd.W[0] = Rs1.W[0] - Rs2.W[0];

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_STSA32 (unsigned long a, unsigned long b)

STSA32 (SIMD 32-bit Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

STSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element subtraction and 32-bit integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. *Description: * This instruction subtracts the 32-bit integer element in [63:32] of Rs2 from the 32-bit integer element in [63:32] of Rs1, and writes the result to [63:32] of Rd; at the same time, it adds the 32-bit integer element in [31:0] of Rs1 with the 32-bit integer element in [31:0] of Rs2, and writes the result to [31:0] of Rd

Note

:

This instruction can be used for either signed or unsigned operations.

Operations:

Rd.W[1] = Rs1.W[1] - Rs2.W[1];
Rd.W[0] = Rs1.W[0] + Rs2.W[0];

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_SUB32 (unsigned long a, unsigned long b)

SUB32 (SIMD 32-bit Subtraction)

Type: DSP (RV64 Only)

Syntax:

SUB32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit integer element subtractions simultaneously.

Description

:

This instruction subtracts the 32-bit integer elements in Rs2 from the 32-bit integer elements in Rs1, and then writes the results to Rd.

Note

:

This instruction can be used for either signed or unsigned subtraction.

Operations:

Rd.W[x] = Rs1.W[x] - Rs2.W[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKADD32 (unsigned long a, unsigned long b)

UKADD32 (SIMD 32-bit Unsigned Saturating Addition)

Type: SIMD (RV64 Only)

Syntax:

UKADD32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element saturating additions simultaneously.

Description

:

This instruction adds the 32-bit unsigned integer elements in Rs1 with the 32-bit unsigned integer elements in Rs2. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] + Rs2.W[x];
if (res[x] > (2^32)-1) {
  res[x] = (2^32)-1;
  OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKCRAS32 (unsigned long a, unsigned long b)

UKCRAS32 (SIMD 32-bit Unsigned Saturating Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKCRAS32 Rd, Rs1, Rs2

Purpose

:

Do one 32-bit unsigned integer element saturating addition and one 32-bit unsigned integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description

:

This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [31:0] of Rs2; at the same time, it subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res1 = Rs1.W[1] + Rs2.W[0];
res2 = Rs1.W[0] - Rs2.W[1];
if (res1 > (2^32)-1) {
  res1 = (2^32)-1;
  OV = 1;
}
if (res2 < 0) {
  res2 = 0;
  OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKCRSA32 (unsigned long a, unsigned long b)

UKCRSA32 (SIMD 32-bit Unsigned Saturating Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

UKCRSA32 Rd, Rs1, Rs2

Purpose

:

Do one 32-bit unsigned integer element saturating subtraction and one 32-bit unsigned integer element saturating addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements.

Description

:

This instruction subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1; at the same time, it adds the 32-bit unsigned integer element in [63:32] of Rs2 with the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res1 = Rs1.W[1] - Rs2.W[0];
res2 = Rs1.W[0] + Rs2.W[1];
if (res1 < 0) {
  res1 = 0;
  OV = 1;
} else if (res2 > (2^32)-1) {
  res2 = (2^32)-1;
  OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKSTAS32 (unsigned long a, unsigned long b)

UKSTAS32 (SIMD 32-bit Unsigned Saturating Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKSTAS32 Rd, Rs1, Rs2

Purpose

:

Do one 32-bit unsigned integer element saturating addition and one 32-bit unsigned integer element saturating subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description

:

This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [63:32] of Rs2; at the same time, it subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Operations:

res1 = Rs1.W[1] + Rs2.W[1];
res2 = Rs1.W[0] - Rs2.W[0];
if (res1 > (2^32)-1) {
  res1 = (2^32)-1;
  OV = 1;
}
if (res2 < 0) {
  res2 = 0;
  OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKSTSA32 (unsigned long a, unsigned long b)

UKSTSA32 (SIMD 32-bit Unsigned Saturating Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

UKSTSA32 Rd, Rs1, Rs2

Purpose

:

Do one 32-bit unsigned integer element saturating subtraction and one 32-bit unsigned integer element saturating addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements.

Description

:

This instruction subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1; at the same time, it adds the 32-bit unsigned integer element in [31:0] of Rs2 with the 32-bit unsigned integer element in [31:0] Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Operations:

res1 = Rs1.W[1] - Rs2.W[1];
res2 = Rs1.W[0] + Rs2.W[0];
if (res1 < 0) {
  res1 = 0;
  OV = 1;
} else if (res2 > (2^32)-1) {
  res2 = (2^32)-1;
  OV = 1;
}
Rd.W[1] = res1;
Rd.W[0] = res2;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_UKSUB32 (unsigned long a, unsigned long b)

UKSUB32 (SIMD 32-bit Unsigned Saturating Subtraction)

Type: SIMD (RV64 Only)

Syntax:

UKSUB32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer elements saturating subtractions simultaneously.

Description

:

This instruction subtracts the 32-bit unsigned integer elements in Rs2 from the 32-bit unsigned integer elements in Rs1. If any of the results are beyond the 32-bit unsigned number range (0 <= RES <= 2^32-1), they are saturated to the range and the OV bit is set to 1. The saturated results are written to Rd.

Operations:

res[x] = Rs1.W[x] - Rs2.W[x];
if (res[x] < 0) {
  res[x] = 0;
  OV = 1;
}
Rd.W[x] = res[x];
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URADD32 (unsigned long a, unsigned long b)

URADD32 (SIMD 32-bit Unsigned Halving Addition)

Type: SIMD (RV64 Only)

Syntax:

URADD32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element additions simultaneously. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit unsigned integer elements in Rs1 with the 32-bit unsigned integer elements in Rs2. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x7FFFFFFF Rt = 0x7FFFFFFF
* Ra = 0x80000000, Rb = 0x80000000 Rt = 0x80000000
* Ra = 0x40000000, Rb = 0x80000000 Rt = 0x60000000

Operations:

Rd.W[x] = (Rs1.W[x] + Rs2.W[x]) u>> 1;
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URCRAS32 (unsigned long a, unsigned long b)

URCRAS32 (SIMD 32-bit Unsigned Halving Cross Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URCRAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element addition and 32-bit unsigned integer element subtraction in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [31:0] of Rs2, and subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [31:0] of Rs1. The element results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[0]) u>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[1]) u>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URCRSA32 (unsigned long a, unsigned long b)

URCRSA32 (SIMD 32-bit Unsigned Halving Cross Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

URCRSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element subtraction and 32-bit unsigned integer element addition in a 64-bit chunk simultaneously. Operands are from crossed 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1, and adds the 32-bit unsigned element integer in [31:0] of Rs1 with the 32-bit unsigned integer element in [63:32] of Rs2. The two results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[0]) u>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[1]) u>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URSTAS32 (unsigned long a, unsigned long b)

URSTAS32 (SIMD 32-bit Unsigned Halving Straight Addition & Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URSTAS32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element addition and 32-bit unsigned integer element subtraction in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction adds the 32-bit unsigned integer element in [63:32] of Rs1 with the 32- bit unsigned integer element in [63:32] of Rs2, and subtracts the 32-bit unsigned integer element in [31:0] of Rs2 from the 32-bit unsigned integer element in [31:0] of Rs1. The element results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for addition and [31:0] of Rd for subtraction.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] + Rs2.W[1]) u>> 1;
Rd.W[0] = (Rs1.W[0] - Rs2.W[0]) u>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URSTSA32 (unsigned long a, unsigned long b)

URSTSA32 (SIMD 32-bit Unsigned Halving Straight Subtraction & Addition)

Type: SIMD (RV64 Only)

Syntax:

URSTSA32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element subtraction and 32-bit unsigned integer element addition in a 64-bit chunk simultaneously. Operands are from corresponding 32-bit elements. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit unsigned integer element in [63:32] of Rs2 from the 32-bit unsigned integer element in [63:32] of Rs1, and adds the 32-bit unsigned element integer in [31:0] of Rs1 with the 32-bit unsigned integer element in [31:0] of Rs2. The two results are first logically right-shifted by 1 bit and then written to [63:32] of Rd for subtraction and [31:0] of Rd for addition.

Examples:

Please see `URADD32` and `URSUB32` instructions.

Operations:

Rd.W[1] = (Rs1.W[1] - Rs2.W[1]) u>> 1;
Rd.W[0] = (Rs1.W[0] + Rs2.W[0]) u>> 1;

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type

__STATIC_FORCEINLINE unsigned long __RV_URSUB32 (unsigned long a, unsigned long b)

URSUB32 (SIMD 32-bit Unsigned Halving Subtraction)

Type: SIMD (RV64 Only)

Syntax:

URSUB32 Rd, Rs1, Rs2

Purpose

:

Do 32-bit unsigned integer element subtractions simultaneously. The results are halved to avoid overflow or saturation.

Description

:

This instruction subtracts the 32-bit unsigned integer elements in Rs2 from the 32-bit unsigned integer elements in Rs1. The results are first logically right-shifted by 1 bit and then written to Rd.

Examples:

* Ra = 0x7FFFFFFF, Rb = 0x80000000, Rt = 0xFFFFFFFF
* Ra = 0x80000000, Rb = 0x7FFFFFFF, Rt = 0x00000000
* Ra = 0x80000000, Rb = 0x40000000, Rt = 0x20000000

Operations:

Rd.W[x] = (Rs1.W[x] - Rs2.W[x]) u>> 1;
for RV64: x=1...0

Parameters
  • a[in] unsigned long type of value stored in a

  • b[in] unsigned long type of value stored in b

Returns

value stored in unsigned long type