core_feature_pma.h

/*
 * Copyright (c) 2019 Nuclei Limited. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License); you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#ifndef __CORE_FEATURE_PMA_H__
#define __CORE_FEATURE_PMA_H__
#ifdef __cplusplus
 extern "C" {
#endif
 
#include "core_compatiable.h"
 
#if defined(__PMA_PRESENT) && (__PMA_PRESENT==1)
 
/* =====  PMA functions  ===== */
#define PMA_REGION_TYPE_SECSHARE      (1UL << 3)    
#define PMA_REGION_TYPE_NC            (1UL << 2)    
#define PMA_REGION_TYPE_DEV           (1UL << 1)    
#define PMA_REGION_TYPE_CA            (0)           
#define PMA_REGION_ENA                (1UL << 0)    
#define PMA_REGION_DIS                (0)           
typedef struct PMA_CONFIG {
    unsigned long region_base;
    unsigned long region_size;
    uint16_t region_type;
    uint16_t region_enable;
} pma_config;
 
__STATIC_FORCEINLINE long PMA_SetRegion(unsigned long entry_idx, pma_config *pma_cfg)
{
    // 4KB aligned
    unsigned long size = (pma_cfg->region_size >> 12) << 12;
    unsigned long base_addr = (pma_cfg->region_base >> 12) << 12;
 
    if ((entry_idx + 1) > __PMA_CSR_NUM) {
        return -1;
    }
 
    rv_csr_t mask = (unsigned long)(~(size - 1));
    rv_csr_t base = pma_cfg->region_type | base_addr | pma_cfg->region_enable;
 
    switch (entry_idx) {
        // Bit[MXLEN-1:PA_SIZE] of mattri(n)_mask is reserved 0
        case 0: __RV_CSR_WRITE(CSR_MATTRI0_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI0_BASE, base); break;
        case 1: __RV_CSR_WRITE(CSR_MATTRI1_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI1_BASE, base); break;
        case 2: __RV_CSR_WRITE(CSR_MATTRI2_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI2_BASE, base); break;
        case 3: __RV_CSR_WRITE(CSR_MATTRI3_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI3_BASE, base); break;
        case 4: __RV_CSR_WRITE(CSR_MATTRI4_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI4_BASE, base); break;
        case 5: __RV_CSR_WRITE(CSR_MATTRI5_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI5_BASE, base); break;
        case 6: __RV_CSR_WRITE(CSR_MATTRI6_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI6_BASE, base); break;
        case 7: __RV_CSR_WRITE(CSR_MATTRI7_MASK, mask); __RV_CSR_WRITE(CSR_MATTRI7_BASE, base); break;
        default: return -1;
    }
 
    return 0;
}
 
__STATIC_FORCEINLINE long PMA_GetRegion(unsigned long entry_idx, pma_config *pma_cfg)
{
    rv_csr_t mask, base;
    uint32_t mpasize = *(uint32_t *)__IINFO_MPASIZE_ADDR;
 
    if ((entry_idx + 1) > __PMA_CSR_NUM) {
        return -1;
    }
 
    switch (entry_idx) {
        case 0: mask = __RV_CSR_READ(CSR_MATTRI0_MASK); base = __RV_CSR_READ(CSR_MATTRI0_BASE); break;
        case 1: mask = __RV_CSR_READ(CSR_MATTRI1_MASK); base = __RV_CSR_READ(CSR_MATTRI1_BASE); break;
        case 2: mask = __RV_CSR_READ(CSR_MATTRI2_MASK); base = __RV_CSR_READ(CSR_MATTRI2_BASE); break;
        case 3: mask = __RV_CSR_READ(CSR_MATTRI3_MASK); base = __RV_CSR_READ(CSR_MATTRI3_BASE); break;
        case 4: mask = __RV_CSR_READ(CSR_MATTRI4_MASK); base = __RV_CSR_READ(CSR_MATTRI4_BASE); break;
        case 5: mask = __RV_CSR_READ(CSR_MATTRI5_MASK); base = __RV_CSR_READ(CSR_MATTRI5_BASE); break;
        case 6: mask = __RV_CSR_READ(CSR_MATTRI6_MASK); base = __RV_CSR_READ(CSR_MATTRI6_BASE); break;
        case 7: mask = __RV_CSR_READ(CSR_MATTRI7_MASK); base = __RV_CSR_READ(CSR_MATTRI7_BASE); break;
        default: return -1;
    }
 
    pma_cfg->region_type = (unsigned long)(base & 0x0E);
    pma_cfg->region_base = (unsigned long)((base >> 12) << 12);
    pma_cfg->region_size = (unsigned long)(1UL << (mask == 0 ? mpasize : __CTZ(mask)));
    pma_cfg->region_enable = (uint16_t)(base & 0x01);
 
    return 0;
}
 
__STATIC_FORCEINLINE long PMA_SetRegion_S(unsigned long entry_idx, pma_config *pma_cfg)
{
    // 4KB aligned
    unsigned long size = (pma_cfg->region_size >> 12) << 12;
    unsigned long base_addr = (pma_cfg->region_base >> 12) << 12;
 
    if ((entry_idx + 1) > __PMA_SEC_CSR_NUM) {
        return -1;
    }
 
    rv_csr_t mask = (unsigned long)(~(size - 1));
    rv_csr_t base = base_addr | pma_cfg->region_enable;
 
    switch (entry_idx) {
        // Bit[MXLEN-1:PA_SIZE] of sattri(n)_mask is reserved 0
        case 0: __RV_CSR_WRITE(CSR_SATTRI0_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI0_BASE, base); break;
        case 1: __RV_CSR_WRITE(CSR_SATTRI1_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI1_BASE, base); break;
        case 2: __RV_CSR_WRITE(CSR_SATTRI2_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI2_BASE, base); break;
        case 3: __RV_CSR_WRITE(CSR_SATTRI3_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI3_BASE, base); break;
        case 4: __RV_CSR_WRITE(CSR_SATTRI4_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI4_BASE, base); break;
        case 5: __RV_CSR_WRITE(CSR_SATTRI5_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI5_BASE, base); break;
        case 6: __RV_CSR_WRITE(CSR_SATTRI6_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI6_BASE, base); break;
        case 7: __RV_CSR_WRITE(CSR_SATTRI7_MASK, mask); __RV_CSR_WRITE(CSR_SATTRI7_BASE, base); break;
        default: return -1;
    }
 
    return 0;
}
 
__STATIC_FORCEINLINE long PMA_GetRegion_S(unsigned long entry_idx, pma_config *pma_cfg)
{
    rv_csr_t mask, base;
    uint32_t mpasize = *(uint32_t *)__IINFO_MPASIZE_ADDR;
 
    if ((entry_idx + 1) > __PMA_SEC_CSR_NUM) {
        return -1;
    }
 
    switch (entry_idx) {
        case 0: mask = __RV_CSR_READ(CSR_SATTRI0_MASK); base = __RV_CSR_READ(CSR_SATTRI0_BASE); break;
        case 1: mask = __RV_CSR_READ(CSR_SATTRI1_MASK); base = __RV_CSR_READ(CSR_SATTRI1_BASE); break;
        case 2: mask = __RV_CSR_READ(CSR_SATTRI2_MASK); base = __RV_CSR_READ(CSR_SATTRI2_BASE); break;
        case 3: mask = __RV_CSR_READ(CSR_SATTRI3_MASK); base = __RV_CSR_READ(CSR_SATTRI3_BASE); break;
        case 4: mask = __RV_CSR_READ(CSR_SATTRI4_MASK); base = __RV_CSR_READ(CSR_SATTRI4_BASE); break;
        case 5: mask = __RV_CSR_READ(CSR_SATTRI5_MASK); base = __RV_CSR_READ(CSR_SATTRI5_BASE); break;
        case 6: mask = __RV_CSR_READ(CSR_SATTRI6_MASK); base = __RV_CSR_READ(CSR_SATTRI6_BASE); break;
        case 7: mask = __RV_CSR_READ(CSR_SATTRI7_MASK); base = __RV_CSR_READ(CSR_SATTRI7_BASE); break;
        default: return -1;
    }
 
    pma_cfg->region_base = (unsigned long)((base >> 12) << 12);
    pma_cfg->region_size = (unsigned long)(1UL << (mask == 0 ? mpasize : __CTZ(mask)));
    pma_cfg->region_enable = (uint16_t)(base & 0x01);
 
    return 0;
}
 
#if defined(__PMA_MACRO_PRESENT) && (__PMA_MACRO_PRESENT == 1)
__STATIC_FORCEINLINE void PMA_EnableHwDevRegion(unsigned long entry_idx)
{
    __RV_CSR_SET(CSR_MMACRO_DEV_EN, 1UL << entry_idx);
}
 
__STATIC_FORCEINLINE void PMA_DisableHwDevRegion(unsigned long entry_idx)
{
    __RV_CSR_CLEAR(CSR_MMACRO_DEV_EN, 1UL << entry_idx);
}
 
__STATIC_FORCEINLINE void PMA_EnableHwNCRegion(unsigned long entry_idx)
{
    __RV_CSR_SET(CSR_MMACRO_NOC_EN, 1UL << entry_idx);
}
 
__STATIC_FORCEINLINE void PMA_DisableHwNCRegion(unsigned long entry_idx)
{
    __RV_CSR_CLEAR(CSR_MMACRO_NOC_EN, 1UL << entry_idx);
}
 
__STATIC_FORCEINLINE void PMA_EnableHwCARegion(unsigned long entry_idx)
{
    __RV_CSR_SET(CSR_MMACRO_CA_EN, 1UL << entry_idx);
}
 
__STATIC_FORCEINLINE void PMA_DisableHwCARegion(unsigned long entry_idx)
{
    __RV_CSR_CLEAR(CSR_MMACRO_CA_EN, 1UL << entry_idx);
}
#endif /* defined(__PMA_MACRO_PRESENT) && (__PMA_MACRO_PRESENT == 1) */ /* End of Doxygen Group NMSIS_Core_PMA_Functions */
#endif /* defined(__PMA_PRESENT) && (__PMA_PRESENT==1) */
 
#ifdef __cplusplus
}
#endif
#endif /* __CORE_FEATURE_PMA_H__ */