NMSIS-Core  Version 1.0.0-HummingBird
NMSIS-Core support for HummingBird RISC-V processor-based devices
Enumerations | Functions
Interrupts and Exceptions

Functions that manage interrupts and exceptions via the PLIC. More...

Enumerations

enum  IRQn {
  Reserved0_IRQn = 0,
  Reserved1_IRQn = 1,
  Reserved2_IRQn = 2,
  SysTimerSW_IRQn = 3,
  Reserved4_IRQn = 4,
  Reserved5_IRQn = 5,
  Reserved6_IRQn = 6,
  SysTimer_IRQn = 7,
  Reserved8_IRQn = 8,
  Reserved9_IRQn = 9,
  Reserved10_IRQn = 10,
  Reserved11_IRQn = 11,
  Reserved12_IRQn = 12,
  Reserved13_IRQn = 13,
  Reserved14_IRQn = 14,
  Reserved15_IRQn = 15,
  PLIC_INT0_IRQn = 0,
  PLIC_INT1_IRQn = 1,
  PLIC_INT_MAX
}
 Definition of IRQn numbers. More...
 

Functions

__STATIC_FORCEINLINE void PLIC_SetThreshold (uint32_t thresh)
 Set priority threshold value of plic. More...
 
__STATIC_FORCEINLINE uint32_t PLIC_GetThreshold (void)
 Get priority threshold value of plic. More...
 
__STATIC_FORCEINLINE void PLIC_EnableInterrupt (uint32_t source)
 Enable interrupt for selected source plic. More...
 
__STATIC_FORCEINLINE void PLIC_DisableInterrupt (uint32_t source)
 Disable interrupt for selected source plic. More...
 
__STATIC_FORCEINLINE uint32_t PLIC_GetInterruptEnable (uint32_t source)
 Get interrupt enable status for selected source plic. More...
 
__STATIC_FORCEINLINE void PLIC_SetPriority (uint32_t source, uint32_t priority)
 Set interrupt priority for selected source plic. More...
 
__STATIC_FORCEINLINE uint32_t PLIC_GetPriority (uint32_t source, uint32_t priority)
 Get interrupt priority for selected source plic. More...
 
__STATIC_FORCEINLINE uint32_t PLIC_ClaimInterrupt (void)
 Claim interrupt for plic of current hart. More...
 
__STATIC_FORCEINLINE void PLIC_CompleteInterrupt (uint32_t source)
 Complete interrupt for plic of current hart. More...
 
__STATIC_FORCEINLINE void PLIC_Init (uint32_t num_sources)
 Perform init for plic of current hart. More...
 
__STATIC_FORCEINLINE void __set_trap_entry (rv_csr_t addr)
 Set Trap entry address. More...
 
__STATIC_FORCEINLINE rv_csr_t __get_trap_entry (void)
 Get trap entry address. More...
 

Detailed Description

Functions that manage interrupts and exceptions via the PLIC.

Enumeration Type Documentation

◆ IRQn

enum IRQn

Definition of IRQn numbers.

The core interrupt enumeration names for IRQn values are defined in the file <Device>.h.

  • Interrupt ID(IRQn) from 0 to 18 are reserved for core internal interrupts.
  • Interrupt ID(IRQn) start from 19 represent device-specific external interrupts.
  • The first device-specific interrupt has the IRQn value 19.

The table below describes the core interrupt names and their availability in various Nuclei Cores.

Enumerator
Reserved0_IRQn 

Internal reserved.

Reserved1_IRQn 

Internal reserved.

Reserved2_IRQn 

Internal reserved.

SysTimerSW_IRQn 

System Timer SW interrupt.

Reserved4_IRQn 

Internal reserved.

Reserved5_IRQn 

Internal reserved.

Reserved6_IRQn 

Internal reserved.

SysTimer_IRQn 

System Timer Interrupt.

Reserved8_IRQn 

Internal reserved.

Reserved9_IRQn 

Internal reserved.

Reserved10_IRQn 

Internal reserved.

Reserved11_IRQn 

Internal reserved.

Reserved12_IRQn 

Internal reserved.

Reserved13_IRQn 

Internal reserved.

Reserved14_IRQn 

Internal reserved.

Reserved15_IRQn 

Internal reserved.

PLIC_INT0_IRQn 

0 plic interrupt, means no interrupt

PLIC_INT1_IRQn 

1st plic interrupt

PLIC_INT_MAX 

Number of total plic interrupts.

Definition at line 95 of file core_feature_plic.h.

95  {
96  /* ========= RISC-V Core Specific Interrupt Numbers =========== */
97  /* Core Internal Interrupt IRQn definitions */
98  Reserved0_IRQn = 0,
99  Reserved1_IRQn = 1,
100  Reserved2_IRQn = 2,
101  SysTimerSW_IRQn = 3,
102  Reserved4_IRQn = 4,
103  Reserved5_IRQn = 5,
104  Reserved6_IRQn = 6,
105  SysTimer_IRQn = 7,
106  Reserved8_IRQn = 8,
107  Reserved9_IRQn = 9,
108  Reserved10_IRQn = 10,
109  Reserved11_IRQn = 11,
110  Reserved12_IRQn = 12,
111  Reserved13_IRQn = 13,
112  Reserved14_IRQn = 14,
113  Reserved15_IRQn = 15,
116  /* ========= PLIC Interrupt Numbers =================== */
117  /* Plic interrupt number also started from 0 */
118  PLIC_INT0_IRQn = 0,
119  PLIC_INT1_IRQn = 1,
120  PLIC_INT_MAX,
121 } IRQn_Type;

Function Documentation

◆ __get_trap_entry()

__STATIC_FORCEINLINE rv_csr_t __get_trap_entry ( void  )

Get trap entry address.

This function get trap entry address from 'CSR_MTVEC'.

Returns
trap entry address
Remarks
  • This function use to get trap entry address from 'CSR_MTVEC'.
See also

Definition at line 351 of file core_feature_plic.h.

352 {
353  unsigned long addr = __RV_CSR_READ(CSR_MTVEC);
354  return (addr);
355 }

References __RV_CSR_READ, and CSR_MTVEC.

◆ __set_trap_entry()

__STATIC_FORCEINLINE void __set_trap_entry ( rv_csr_t  addr)

Set Trap entry address.

This function set trap entry address to 'CSR_MTVEC'.

Parameters
[in]addrtrap entry address
Remarks
  • This function use to set trap entry address to 'CSR_MTVEC'.
See also

Definition at line 335 of file core_feature_plic.h.

336 {
337  addr &= (rv_csr_t)(~0x7);
338  __RV_CSR_WRITE(CSR_MTVEC, addr);
339 }

References __RV_CSR_WRITE, and CSR_MTVEC.

◆ PLIC_ClaimInterrupt()

__STATIC_FORCEINLINE uint32_t PLIC_ClaimInterrupt ( void  )

Claim interrupt for plic of current hart.

This function claim interrupt for plic of current hart.

Returns
the ID of the highest priority pending interrupt or zero if there is no pending interrupt
Remarks
A successful claim will also atomically clear the corresponding pending bit on the interrupt source. The PLIC can perform a claim at any time and the claim operation is not affected by the setting of the priority threshold register.
See also

Definition at line 271 of file core_feature_plic.h.

272 {
273  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
274  volatile uint32_t *claim_reg = (uint32_t *)((PLIC_BASE) + PLIC_CLAIM_OFFSET + \
275  + (hartid << PLIC_CLAIM_SHIFT_PER_TARGET));
276 
277  return (*claim_reg);
278 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, PLIC_CLAIM_OFFSET, and PLIC_CLAIM_SHIFT_PER_TARGET.

Referenced by core_trap_handler().

◆ PLIC_CompleteInterrupt()

__STATIC_FORCEINLINE void PLIC_CompleteInterrupt ( uint32_t  source)

Complete interrupt for plic of current hart.

This function complete interrupt for plic of current hart.

Returns
the ID of the highest priority pending interrupt or zero if there is no pending interrupt
Remarks
The PLIC signals it has completed executing an interrupt handler by writing the interrupt ID it received from the claim to the claim/complete register. The PLIC does not check whether the completion ID is the same as the last claim ID for that target. If the completion ID does not match an interrupt source that is currently enabled for the target, the completion is silently ignored.
See also

Definition at line 296 of file core_feature_plic.h.

297 {
298  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
299  volatile uint32_t *complete_reg = (uint32_t *)((PLIC_BASE) + PLIC_CLAIM_OFFSET + \
300  + (hartid << PLIC_CLAIM_SHIFT_PER_TARGET));
301 
302  *complete_reg = source;
303 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, PLIC_CLAIM_OFFSET, and PLIC_CLAIM_SHIFT_PER_TARGET.

Referenced by core_trap_handler().

◆ PLIC_DisableInterrupt()

__STATIC_FORCEINLINE void PLIC_DisableInterrupt ( uint32_t  source)

Disable interrupt for selected source plic.

This function disable interrupt for selected source plic of current hart.

Parameters
[in]sourceinterrupt source
Remarks
See also

Definition at line 189 of file core_feature_plic.h.

190 {
191  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
192  volatile uint32_t *enable_reg = (uint32_t *)((PLIC_BASE) + PLIC_ENABLE_OFFSET + \
193  (hartid << PLIC_ENABLE_SHIFT_PER_TARGET) + (source >> 5) * 4);
194 
195  uint32_t current = *enable_reg;
196  current = current & (~(1<<(source&0x1F)));
197  *enable_reg = current;
198 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, PLIC_ENABLE_OFFSET, and PLIC_ENABLE_SHIFT_PER_TARGET.

Referenced by PLIC_Init().

◆ PLIC_EnableInterrupt()

__STATIC_FORCEINLINE void PLIC_EnableInterrupt ( uint32_t  source)

Enable interrupt for selected source plic.

This function enable interrupt for selected source plic of current hart.

Parameters
[in]sourceinterrupt source
Remarks
See also

Definition at line 169 of file core_feature_plic.h.

170 {
171  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
172  volatile uint32_t *enable_reg = (uint32_t *)((PLIC_BASE) + PLIC_ENABLE_OFFSET + \
173  (hartid << PLIC_ENABLE_SHIFT_PER_TARGET) + (source >> 5) * 4);
174 
175  uint32_t current = *enable_reg;
176  current = current | (1<<(source&0x1F));
177  *enable_reg = current;
178 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, PLIC_ENABLE_OFFSET, and PLIC_ENABLE_SHIFT_PER_TARGET.

Referenced by PLIC_Register_IRQ().

◆ PLIC_GetInterruptEnable()

__STATIC_FORCEINLINE uint32_t PLIC_GetInterruptEnable ( uint32_t  source)

Get interrupt enable status for selected source plic.

This function get interrupt enable for selected source plic of current hart.

Parameters
[in]sourceinterrupt source
Returns
enable status for selected interrupt source for current hart
Remarks
See also

Definition at line 211 of file core_feature_plic.h.

212 {
213  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
214  volatile uint32_t *enable_reg = (uint32_t *)((PLIC_BASE) + PLIC_ENABLE_OFFSET + \
215  (hartid << PLIC_ENABLE_SHIFT_PER_TARGET) + (source >> 5) * 4);
216 
217  uint32_t current = *enable_reg;
218  current = current >> (source&0x1F);
219  return current;
220 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, PLIC_ENABLE_OFFSET, and PLIC_ENABLE_SHIFT_PER_TARGET.

◆ PLIC_GetPriority()

__STATIC_FORCEINLINE uint32_t PLIC_GetPriority ( uint32_t  source,
uint32_t  priority 
)

Get interrupt priority for selected source plic.

This function get interrupt priority for selected source plic of current hart.

Parameters
[in]sourceinterrupt source
[in]priorityinterrupt priority
Remarks
See also

Definition at line 250 of file core_feature_plic.h.

251 {
252  volatile uint32_t *priority_reg = (uint32_t *)((PLIC_BASE) + PLIC_PRIORITY_OFFSET + \
253  + (source << PLIC_PRIORITY_SHIFT_PER_SOURCE));
254 
255  return (*priority_reg);
256 }

References PLIC_BASE, PLIC_PRIORITY_OFFSET, and PLIC_PRIORITY_SHIFT_PER_SOURCE.

◆ PLIC_GetThreshold()

__STATIC_FORCEINLINE uint32_t PLIC_GetThreshold ( void  )

Get priority threshold value of plic.

This function get priority threshold value of plic.

Returns
priority threshold value for current hart
Remarks
See also

Definition at line 151 of file core_feature_plic.h.

152 {
153  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
154  volatile uint32_t *thresh_reg = (uint32_t *)((PLIC_BASE) + \
155  PLIC_THRESHOLD_OFFSET + (hartid << PLIC_THRESHOLD_SHIFT_PER_TARGET));
156 
157  return (*thresh_reg);
158 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, and PLIC_THRESHOLD_SHIFT_PER_TARGET.

◆ PLIC_Init()

__STATIC_FORCEINLINE void PLIC_Init ( uint32_t  num_sources)

Perform init for plic of current hart.

This function perform initialization steps for plic of current hart.

Remarks
  • Disable all interrupts
  • Set all priorities to zero
  • Set priority threshold to zero

Definition at line 314 of file core_feature_plic.h.

315 {
316  uint32_t i;
317 
318  for (i = 0; i < num_sources; i ++) {
319  PLIC_DisableInterrupt(i);
320  PLIC_SetPriority(i, 0);
321  }
322  PLIC_SetThreshold(0);
323 }

References PLIC_DisableInterrupt(), PLIC_SetPriority(), and PLIC_SetThreshold().

◆ PLIC_SetPriority()

__STATIC_FORCEINLINE void PLIC_SetPriority ( uint32_t  source,
uint32_t  priority 
)

Set interrupt priority for selected source plic.

This function set interrupt priority for selected source plic of current hart.

Parameters
[in]sourceinterrupt source
[in]priorityinterrupt priority
Remarks
See also

Definition at line 232 of file core_feature_plic.h.

233 {
234  volatile uint32_t *priority_reg = (uint32_t *)((PLIC_BASE) + PLIC_PRIORITY_OFFSET + \
235  + (source << PLIC_PRIORITY_SHIFT_PER_SOURCE));
236 
237  *priority_reg = priority;
238 }

References PLIC_BASE, PLIC_PRIORITY_OFFSET, and PLIC_PRIORITY_SHIFT_PER_SOURCE.

Referenced by PLIC_Init(), and PLIC_Register_IRQ().

◆ PLIC_SetThreshold()

__STATIC_FORCEINLINE void PLIC_SetThreshold ( uint32_t  thresh)

Set priority threshold value of plic.

This function set priority threshold value of plic for current hart.

Parameters
[in]threshthreshold value
Remarks
See also

Definition at line 133 of file core_feature_plic.h.

134 {
135  uint32_t hartid = __RV_CSR_READ(CSR_MHARTID);
136  volatile uint32_t *thresh_reg = (uint32_t *)((PLIC_BASE) + \
137  PLIC_THRESHOLD_OFFSET + (hartid << PLIC_THRESHOLD_SHIFT_PER_TARGET));
138 
139  *thresh_reg = thresh;
140 }

References __RV_CSR_READ, CSR_MHARTID, PLIC_BASE, and PLIC_THRESHOLD_SHIFT_PER_TARGET.

Referenced by PLIC_Init().

rv_csr_t
uint32_t rv_csr_t
Type of Control and Status Register(CSR), depends on the XLEN defined in RISC-V.
Definition: core_feature_base.h:51
SysTimer_IRQn
@ SysTimer_IRQn
System Timer Interrupt.
Definition: core_feature_plic.h:105
Reserved5_IRQn
@ Reserved5_IRQn
Internal reserved.
Definition: core_feature_plic.h:103
PLIC_ENABLE_SHIFT_PER_TARGET
#define PLIC_ENABLE_SHIFT_PER_TARGET
PLIC Enable register offset shift per target.
Definition: core_feature_plic.h:55
Reserved14_IRQn
@ Reserved14_IRQn
Internal reserved.
Definition: core_feature_plic.h:112
CSR_MHARTID
#define CSR_MHARTID
Definition: riscv_encoding.h:427
PLIC_INT1_IRQn
@ PLIC_INT1_IRQn
1st plic interrupt
Definition: core_feature_plic.h:119
CSR_MTVEC
#define CSR_MTVEC
Definition: riscv_encoding.h:328
PLIC_INT_MAX
@ PLIC_INT_MAX
Number of total plic interrupts.
Definition: core_feature_plic.h:120
PLIC_SetThreshold
__STATIC_FORCEINLINE void PLIC_SetThreshold(uint32_t thresh)
Set priority threshold value of plic.
Definition: core_feature_plic.h:133
Reserved6_IRQn
@ Reserved6_IRQn
Internal reserved.
Definition: core_feature_plic.h:104
Reserved0_IRQn
@ Reserved0_IRQn
Internal reserved.
Definition: core_feature_plic.h:98
PLIC_BASE
#define PLIC_BASE
PLIC Base Address.
Definition: core_feature_plic.h:68
Reserved8_IRQn
@ Reserved8_IRQn
Internal reserved.
Definition: core_feature_plic.h:106
__RV_CSR_WRITE
#define __RV_CSR_WRITE(csr, val)
CSR operation Macro for csrw instruction.
Definition: core_feature_base.h:263
PLIC_DisableInterrupt
__STATIC_FORCEINLINE void PLIC_DisableInterrupt(uint32_t source)
Disable interrupt for selected source plic.
Definition: core_feature_plic.h:189
PLIC_PRIORITY_SHIFT_PER_SOURCE
#define PLIC_PRIORITY_SHIFT_PER_SOURCE
PLIC Priority register offset shift per source.
Definition: core_feature_plic.h:48
PLIC_CLAIM_SHIFT_PER_TARGET
#define PLIC_CLAIM_SHIFT_PER_TARGET
PLIC Claim register offset shift per target.
Definition: core_feature_plic.h:60
PLIC_THRESHOLD_SHIFT_PER_TARGET
#define PLIC_THRESHOLD_SHIFT_PER_TARGET
PLIC Threshold register offset shift per target.
Definition: core_feature_plic.h:59
Reserved9_IRQn
@ Reserved9_IRQn
Internal reserved.
Definition: core_feature_plic.h:107
PLIC_ENABLE_OFFSET
#define PLIC_ENABLE_OFFSET
PLIC Enable register offset.
Definition: core_feature_plic.h:54
Reserved15_IRQn
@ Reserved15_IRQn
Internal reserved.
Definition: core_feature_plic.h:113
Reserved2_IRQn
@ Reserved2_IRQn
Internal reserved.
Definition: core_feature_plic.h:100
Reserved11_IRQn
@ Reserved11_IRQn
Internal reserved.
Definition: core_feature_plic.h:109
__RV_CSR_READ
#define __RV_CSR_READ(csr)
CSR operation Macro for csrr instruction.
Definition: core_feature_base.h:245
Reserved10_IRQn
@ Reserved10_IRQn
Internal reserved.
Definition: core_feature_plic.h:108
PLIC_INT0_IRQn
@ PLIC_INT0_IRQn
0 plic interrupt, means no interrupt
Definition: core_feature_plic.h:118
PLIC_PRIORITY_OFFSET
#define PLIC_PRIORITY_OFFSET
PLIC Priority register offset.
Definition: core_feature_plic.h:47
Reserved4_IRQn
@ Reserved4_IRQn
Internal reserved.
Definition: core_feature_plic.h:102
Reserved13_IRQn
@ Reserved13_IRQn
Internal reserved.
Definition: core_feature_plic.h:111
Reserved1_IRQn
@ Reserved1_IRQn
Internal reserved.
Definition: core_feature_plic.h:99
SysTimerSW_IRQn
@ SysTimerSW_IRQn
System Timer SW interrupt.
Definition: core_feature_plic.h:101
PLIC_SetPriority
__STATIC_FORCEINLINE void PLIC_SetPriority(uint32_t source, uint32_t priority)
Set interrupt priority for selected source plic.
Definition: core_feature_plic.h:232
Reserved12_IRQn
@ Reserved12_IRQn
Internal reserved.
Definition: core_feature_plic.h:110
PLIC_CLAIM_OFFSET
#define PLIC_CLAIM_OFFSET
PLIC Claim register offset.
Definition: core_feature_plic.h:58