NMSIS-Core  Version 1.0.0-HummingBird
NMSIS-Core support for HummingBird RISC-V processor-based devices
Core CSR Register Access

Functions to access the Core CSR Registers. More...

Macros

#define __RV_CSR_SWAP(csr, val)
 CSR operation Macro for csrrw instruction. More...
 
#define __RV_CSR_READ(csr)
 CSR operation Macro for csrr instruction. More...
 
#define __RV_CSR_WRITE(csr, val)
 CSR operation Macro for csrw instruction. More...
 
#define __RV_CSR_READ_SET(csr, val)
 CSR operation Macro for csrrs instruction. More...
 
#define __RV_CSR_SET(csr, val)
 CSR operation Macro for csrs instruction. More...
 
#define __RV_CSR_READ_CLEAR(csr, val)
 CSR operation Macro for csrrc instruction. More...
 
#define __RV_CSR_CLEAR(csr, val)
 CSR operation Macro for csrc instruction. More...
 

Functions

__STATIC_FORCEINLINE void __enable_irq (void)
 Enable IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_irq (void)
 Disable IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __enable_ext_irq (void)
 Enable External IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_ext_irq (void)
 Disable External IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __enable_timer_irq (void)
 Enable Timer IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_timer_irq (void)
 Disable Timer IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __enable_sw_irq (void)
 Enable software IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_sw_irq (void)
 Disable software IRQ Interrupts. More...
 
__STATIC_FORCEINLINE void __disable_core_irq (uint32_t irq)
 Disable Core IRQ Interrupt. More...
 
__STATIC_FORCEINLINE void __enable_core_irq (uint32_t irq)
 Enable Core IRQ Interrupt. More...
 
__STATIC_FORCEINLINE uint32_t __get_core_irq_pending (uint32_t irq)
 Get Core IRQ Interrupt Pending status. More...
 
__STATIC_FORCEINLINE void __clear_core_irq_pending (uint32_t irq)
 Clear Core IRQ Interrupt Pending status. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_cycle (void)
 Read whole 64 bits value of mcycle counter. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_instret (void)
 Read whole 64 bits value of machine instruction-retired counter. More...
 
__STATIC_FORCEINLINE uint64_t __get_rv_time (void)
 Read whole 64 bits value of real-time clock. More...
 

Detailed Description

Functions to access the Core CSR Registers.

The following functions or macros provide access to Core CSR registers.

Macro Definition Documentation

◆ __RV_CSR_CLEAR

#define __RV_CSR_CLEAR (   csr,
  val 
)

CSR operation Macro for csrc instruction.

Set csr register to be csr_content & ~val

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrc instruction

Definition at line 337 of file core_feature_base.h.

◆ __RV_CSR_READ

#define __RV_CSR_READ (   csr)

CSR operation Macro for csrr instruction.

Read the content of csr register to __v and return it

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
Returns
the CSR register value

Definition at line 245 of file core_feature_base.h.

◆ __RV_CSR_READ_CLEAR

#define __RV_CSR_READ_CLEAR (   csr,
  val 
)

CSR operation Macro for csrrc instruction.

Read the content of csr register to __v, then set csr register to be __v & ~val, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrrc instruction
Returns
the CSR register value before written

Definition at line 319 of file core_feature_base.h.

◆ __RV_CSR_READ_SET

#define __RV_CSR_READ_SET (   csr,
  val 
)

CSR operation Macro for csrrs instruction.

Read the content of csr register to __v, then set csr register to be __v | val, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrrs instruction
Returns
the CSR register value before written

Definition at line 282 of file core_feature_base.h.

◆ __RV_CSR_SET

#define __RV_CSR_SET (   csr,
  val 
)

CSR operation Macro for csrs instruction.

Set csr register to be csr_content | val

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valMask value to be used wih csrs instruction

Definition at line 300 of file core_feature_base.h.

◆ __RV_CSR_SWAP

#define __RV_CSR_SWAP (   csr,
  val 
)

CSR operation Macro for csrrw instruction.

Read the content of csr register to __v, then write content of val into csr register, then return __v

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valvalue to store into the CSR register
Returns
the CSR register value before written

Definition at line 227 of file core_feature_base.h.

◆ __RV_CSR_WRITE

#define __RV_CSR_WRITE (   csr,
  val 
)

CSR operation Macro for csrw instruction.

Write the content of val to csr register

Parameters
csrCSR macro definition defined in Core CSR Registers, eg. CSR_MSTATUS
valvalue to store into the CSR register

Definition at line 263 of file core_feature_base.h.

Function Documentation

◆ __clear_core_irq_pending()

__STATIC_FORCEINLINE void __clear_core_irq_pending ( uint32_t  irq)

Clear Core IRQ Interrupt Pending status.

Clear Core IRQ interrupt pending status of irq bit.

Remarks
Can only be executed in Privileged modes.

Definition at line 475 of file core_feature_base.h.

476 {
477  __RV_CSR_SET(CSR_MIP, 1 << irq);
478 }

References __RV_CSR_SET, and CSR_MIP.

◆ __disable_core_irq()

__STATIC_FORCEINLINE void __disable_core_irq ( uint32_t  irq)

Disable Core IRQ Interrupt.

Disable Core IRQ interrupt by clearing the irq bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 441 of file core_feature_base.h.

442 {
443  __RV_CSR_CLEAR(CSR_MIE, 1 << irq);
444 }

References __RV_CSR_CLEAR, and CSR_MIE.

◆ __disable_ext_irq()

__STATIC_FORCEINLINE void __disable_ext_irq ( void  )

Disable External IRQ Interrupts.

Disables External IRQ interrupts by clearing the MEIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 386 of file core_feature_base.h.

387 {
389 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MEIE.

◆ __disable_irq()

__STATIC_FORCEINLINE void __disable_irq ( void  )

Disable IRQ Interrupts.

Disables IRQ interrupts by clearing the MIE-bit in the MSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 364 of file core_feature_base.h.

365 {
367 }

References __RV_CSR_CLEAR, CSR_MSTATUS, and MSTATUS_MIE.

◆ __disable_sw_irq()

__STATIC_FORCEINLINE void __disable_sw_irq ( void  )

Disable software IRQ Interrupts.

Disables software IRQ interrupts by clearing the MSIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 430 of file core_feature_base.h.

431 {
433 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MSIE.

◆ __disable_timer_irq()

__STATIC_FORCEINLINE void __disable_timer_irq ( void  )

Disable Timer IRQ Interrupts.

Disables Timer IRQ interrupts by clearing the MTIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 408 of file core_feature_base.h.

409 {
411 }

References __RV_CSR_CLEAR, CSR_MIE, and MIE_MTIE.

◆ __enable_core_irq()

__STATIC_FORCEINLINE void __enable_core_irq ( uint32_t  irq)

Enable Core IRQ Interrupt.

Enable Core IRQ interrupt by setting the irq bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 452 of file core_feature_base.h.

453 {
454  __RV_CSR_SET(CSR_MIE, 1 << irq);
455 }

References __RV_CSR_SET, and CSR_MIE.

◆ __enable_ext_irq()

__STATIC_FORCEINLINE void __enable_ext_irq ( void  )

Enable External IRQ Interrupts.

Enables External IRQ interrupts by setting the MEIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 375 of file core_feature_base.h.

376 {
378 }

References __RV_CSR_SET, CSR_MIE, and MIE_MEIE.

Referenced by PLIC_Register_IRQ().

◆ __enable_irq()

__STATIC_FORCEINLINE void __enable_irq ( void  )

Enable IRQ Interrupts.

Enables IRQ interrupts by setting the MIE-bit in the MSTATUS Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 353 of file core_feature_base.h.

354 {
356 }

References __RV_CSR_SET, CSR_MSTATUS, and MSTATUS_MIE.

◆ __enable_sw_irq()

__STATIC_FORCEINLINE void __enable_sw_irq ( void  )

Enable software IRQ Interrupts.

Enables software IRQ interrupts by setting the MSIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 419 of file core_feature_base.h.

420 {
422 }

References __RV_CSR_SET, CSR_MIE, and MIE_MSIE.

Referenced by Core_Register_IRQ().

◆ __enable_timer_irq()

__STATIC_FORCEINLINE void __enable_timer_irq ( void  )

Enable Timer IRQ Interrupts.

Enables Timer IRQ interrupts by setting the MTIE-bit in the MIE Register.

Remarks
Can only be executed in Privileged modes.

Definition at line 397 of file core_feature_base.h.

398 {
400 }

References __RV_CSR_SET, CSR_MIE, and MIE_MTIE.

Referenced by Core_Register_IRQ(), and SysTick_Config().

◆ __get_core_irq_pending()

__STATIC_FORCEINLINE uint32_t __get_core_irq_pending ( uint32_t  irq)

Get Core IRQ Interrupt Pending status.

Get Core IRQ interrupt pending status of irq bit.

Remarks
Can only be executed in Privileged modes.

Definition at line 463 of file core_feature_base.h.

464 {
465  return ((__RV_CSR_READ(CSR_MIP) >> irq) & 0x1);
466 }

References __RV_CSR_READ, and CSR_MIP.

◆ __get_rv_cycle()

__STATIC_FORCEINLINE uint64_t __get_rv_cycle ( void  )

Read whole 64 bits value of mcycle counter.

This function will read the whole 64 bits of MCYCLE register

Returns
The whole 64 bits value of MCYCLE
Remarks
It will work for both RV32 and RV64 to get full 64bits value of MCYCLE

Definition at line 486 of file core_feature_base.h.

487 {
488 #if __RISCV_XLEN == 32
489  volatile uint32_t high0, low, high;
490  uint64_t full;
491 
492  high0 = __RV_CSR_READ(CSR_MCYCLEH);
493  low = __RV_CSR_READ(CSR_MCYCLE);
494  high = __RV_CSR_READ(CSR_MCYCLEH);
495  if (high0 != high) {
496  low = __RV_CSR_READ(CSR_MCYCLE);
497  }
498  full = (((uint64_t)high) << 32) | low;
499  return full;
500 #elif __RISCV_XLEN == 64
501  return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
502 #else // TODO Need cover for XLEN=128 case in future
503  return (uint64_t)__RV_CSR_READ(CSR_MCYCLE);
504 #endif
505 }

References __RV_CSR_READ, CSR_MCYCLE, and CSR_MCYCLEH.

◆ __get_rv_instret()

__STATIC_FORCEINLINE uint64_t __get_rv_instret ( void  )

Read whole 64 bits value of machine instruction-retired counter.

This function will read the whole 64 bits of MINSTRET register

Returns
The whole 64 bits value of MINSTRET
Remarks
It will work for both RV32 and RV64 to get full 64bits value of MINSTRET

Definition at line 513 of file core_feature_base.h.

514 {
515 #if __RISCV_XLEN == 32
516  volatile uint32_t high0, low, high;
517  uint64_t full;
518 
519  high0 = __RV_CSR_READ(CSR_MINSTRETH);
522  if (high0 != high) {
524  }
525  full = (((uint64_t)high) << 32) | low;
526  return full;
527 #elif __RISCV_XLEN == 64
528  return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
529 #else // TODO Need cover for XLEN=128 case in future
530  return (uint64_t)__RV_CSR_READ(CSR_MINSTRET);
531 #endif
532 }

References __RV_CSR_READ, CSR_MINSTRET, and CSR_MINSTRETH.

◆ __get_rv_time()

__STATIC_FORCEINLINE uint64_t __get_rv_time ( void  )

Read whole 64 bits value of real-time clock.

This function will read the whole 64 bits of TIME register

Returns
The whole 64 bits value of TIME CSR
Remarks
It will work for both RV32 and RV64 to get full 64bits value of TIME
Attention
only available when user mode available

Definition at line 541 of file core_feature_base.h.

542 {
543 #if __RISCV_XLEN == 32
544  volatile uint32_t high0, low, high;
545  uint64_t full;
546 
547  high0 = __RV_CSR_READ(CSR_TIMEH);
548  low = __RV_CSR_READ(CSR_TIME);
549  high = __RV_CSR_READ(CSR_TIMEH);
550  if (high0 != high) {
551  low = __RV_CSR_READ(CSR_TIME);
552  }
553  full = (((uint64_t)high) << 32) | low;
554  return full;
555 #elif __RISCV_XLEN == 64
556  return (uint64_t)__RV_CSR_READ(CSR_TIME);
557 #else // TODO Need cover for XLEN=128 case in future
558  return (uint64_t)__RV_CSR_READ(CSR_TIME);
559 #endif
560 }

References __RV_CSR_READ, CSR_TIME, and CSR_TIMEH.

MIE_MTIE
#define MIE_MTIE
Definition: riscv_encoding.h:143
__RV_CSR_CLEAR
#define __RV_CSR_CLEAR(csr, val)
CSR operation Macro for csrc instruction.
Definition: core_feature_base.h:337
CSR_MCYCLEH
#define CSR_MCYCLEH
Definition: riscv_encoding.h:460
MIE_MEIE
#define MIE_MEIE
Definition: riscv_encoding.h:146
CSR_TIME
#define CSR_TIME
Definition: riscv_encoding.h:283
CSR_MINSTRET
#define CSR_MINSTRET
Definition: riscv_encoding.h:363
CSR_MIE
#define CSR_MIE
Definition: riscv_encoding.h:327
CSR_TIMEH
#define CSR_TIMEH
Definition: riscv_encoding.h:429
MSTATUS_MIE
#define MSTATUS_MIE
Definition: riscv_encoding.h:37
CSR_MINSTRETH
#define CSR_MINSTRETH
Definition: riscv_encoding.h:461
CSR_MCYCLE
#define CSR_MCYCLE
Definition: riscv_encoding.h:362
__RV_CSR_READ
#define __RV_CSR_READ(csr)
CSR operation Macro for csrr instruction.
Definition: core_feature_base.h:245
CSR_MIP
#define CSR_MIP
Definition: riscv_encoding.h:334
__RV_CSR_SET
#define __RV_CSR_SET(csr, val)
CSR operation Macro for csrs instruction.
Definition: core_feature_base.h:300
CSR_MSTATUS
#define CSR_MSTATUS
Definition: riscv_encoding.h:323
MIE_MSIE
#define MIE_MSIE
Definition: riscv_encoding.h:140