5. Changelog

5.1. V0.2.1

This is release 0.2.1 of HBirdv2 E203 Core and SoC.

• HBirdv2 SoC

  • Covert the peripheral IPs implemented in system verilog to verilog implementation

• SIM

  • Add new simulation tool(iVerilog) and wave viewer(GTKWave) support for Hummingbirdv2 SoC

5.2. V0.1.2

This release 0.1.2 of HBirdv2 E203 Core and SoC.

• HBirdv2 SoC

  • Remove unused module

  • Add one more UART

• FPGA

  • Add new development board (Nuclei mcu200t) support for HBirdv2 SoC

• HBird SDK

  • Add support for new development board (Nuclei mcu200t)

5.3. V0.1.1

This release 0.1.1 of HBirdv2 E203 Core and SoC.

Here are the new features of this release.

• Add NICE(Nuclei Instruction Co-unit Extension) for E203 core

• Integrate the APB interface peripherals(GPIO, I2C, UART, SPI, PWM) from PULP Platform

• Add new development board(Nuclei ddr200t) support for HBirdv2 SoC.

• HBird SDK is launched for HBirdv2 E203 SoC.