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NMSIS-Core
Version 1.4.0
NMSIS-Core support for Nuclei processor-based devices
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Union type to access MSTATUS CSR register. More...
Data Fields | |
struct { | |
rv_csr_t _reserved0:1 | |
bit: 0 Reserved More... | |
rv_csr_t sie:1 | |
bit: 1 supervisor interrupt enable flag More... | |
rv_csr_t _reserved1:1 | |
bit: 2 Reserved More... | |
rv_csr_t mie:1 | |
bit: 3 machine mode interrupt enable flag More... | |
rv_csr_t _reserved2:1 | |
bit: 4 Reserved More... | |
rv_csr_t spie:1 | |
bit: 5 supervisor mode interrupt enable flag More... | |
rv_csr_t ube:1 | |
bit: 6 U-mode non-instruction-fetch memory accesse big-endian enable flag More... | |
rv_csr_t mpie:1 | |
bit: 7 machine mode previous interrupt enable flag More... | |
rv_csr_t spp:1 | |
bit: 8 supervisor previous privilede mode More... | |
rv_csr_t vs:2 | |
bit: 9..10 vector status flag More... | |
rv_csr_t mpp:2 | |
bit: 11..12 machine previous privilede mode More... | |
rv_csr_t fs:2 | |
bit: 13..14 FS status flag More... | |
rv_csr_t xs:2 | |
bit: 15..16 XS status flag More... | |
rv_csr_t mprv:1 | |
bit: 17 Modify PRiVilege More... | |
rv_csr_t sum:1 | |
bit: 18 Supervisor Mode load and store protection More... | |
rv_csr_t mxr:1 | |
bit: 19 Make eXecutable Readable More... | |
rv_csr_t tvm:1 | |
bit: 20 Trap Virtual Memory More... | |
rv_csr_t tw:1 | |
bit: 21 Timeout Wait More... | |
rv_csr_t tsr:1 | |
bit: 22 Trap SRET More... | |
rv_csr_t spelp:1 | |
bit: 23 Supervisor mode Previous Expected Landing Pad (ELP) State More... | |
rv_csr_t sdt:1 | |
bit: 24 S-mode-disable-trap More... | |
rv_csr_t _reserved3:6 | |
bit: 25..30 Reserved More... | |
rv_csr_t sd:1 | |
bit: 31 Dirty status for XS or FS More... | |
} | b |
Structure used for bit access. More... | |
rv_csr_t | d |
Type used for csr data access. More... | |
Union type to access MSTATUS CSR register.
Definition at line 105 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::_reserved0 |
bit: 0 Reserved
Definition at line 107 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::_reserved1 |
bit: 2 Reserved
Definition at line 109 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::_reserved2 |
bit: 4 Reserved
Definition at line 111 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::_reserved3 |
bit: 25..30 Reserved
Definition at line 142 of file core_feature_base.h.
struct { ... } CSR_MSTATUS_Type::b |
Structure used for bit access.
rv_csr_t CSR_MSTATUS_Type::d |
Type used for csr data access.
Definition at line 146 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::fs |
bit: 13..14 FS status flag
Definition at line 118 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::mie |
bit: 3 machine mode interrupt enable flag
Definition at line 110 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::mpie |
bit: 7 machine mode previous interrupt enable flag
Definition at line 114 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::mpp |
bit: 11..12 machine previous privilede mode
Definition at line 117 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::mprv |
bit: 17 Modify PRiVilege
Definition at line 120 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::mxr |
bit: 19 Make eXecutable Readable
Definition at line 122 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::sd |
bit: 31 Dirty status for XS or FS
Definition at line 143 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::sdt |
bit: 24 S-mode-disable-trap
Definition at line 127 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::sie |
bit: 1 supervisor interrupt enable flag
Definition at line 108 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::spelp |
bit: 23 Supervisor mode Previous Expected Landing Pad (ELP) State
Definition at line 126 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::spie |
bit: 5 supervisor mode interrupt enable flag
Definition at line 112 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::spp |
bit: 8 supervisor previous privilede mode
Definition at line 115 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::sum |
bit: 18 Supervisor Mode load and store protection
Definition at line 121 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::tsr |
bit: 22 Trap SRET
Definition at line 125 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::tvm |
bit: 20 Trap Virtual Memory
Definition at line 123 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::tw |
bit: 21 Timeout Wait
Definition at line 124 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::ube |
bit: 6 U-mode non-instruction-fetch memory accesse big-endian enable flag
Definition at line 113 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::vs |
bit: 9..10 vector status flag
Definition at line 116 of file core_feature_base.h.
rv_csr_t CSR_MSTATUS_Type::xs |
bit: 15..16 XS status flag
Definition at line 119 of file core_feature_base.h.