NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices

Union type to access MMISC_CTRL CSR register. More...

Data Fields

struct {
   rv_csr_t   _reserved0:3
 bit: 0..2 Reserved More...
 
   rv_csr_t   bpu:1
 bit: 3 dynamic prediction enable flag More...
 
   rv_csr_t   _reserved1:2
 bit: 4..5 Reserved More...
 
   rv_csr_t   misalign:1
 bit: 6 misaligned access support flag More...
 
   rv_csr_t   _reserved2:2
 bit: 7..8 Reserved More...
 
   rv_csr_t   nmi_cause:1
 bit: 9 mnvec control and nmi mcase exccode More...
 
   rv_csr_t   _reserved3:22
 bit: 10..31 Reserved More...
 
b
 Structure used for bit access. More...
 
rv_csr_t d
 Type used for csr data access. More...
 

Detailed Description

Union type to access MMISC_CTRL CSR register.

Definition at line 231 of file core_feature_base.h.

Field Documentation

◆ _reserved0

rv_csr_t CSR_MMISCCTRL_Type::_reserved0

bit: 0..2 Reserved

Definition at line 233 of file core_feature_base.h.

◆ _reserved1

rv_csr_t CSR_MMISCCTRL_Type::_reserved1

bit: 4..5 Reserved

Definition at line 235 of file core_feature_base.h.

◆ _reserved2

rv_csr_t CSR_MMISCCTRL_Type::_reserved2

bit: 7..8 Reserved

Definition at line 237 of file core_feature_base.h.

◆ _reserved3

rv_csr_t CSR_MMISCCTRL_Type::_reserved3

bit: 10..31 Reserved

Definition at line 242 of file core_feature_base.h.

◆ b

struct { ... } CSR_MMISCCTRL_Type::b

Structure used for bit access.

◆ bpu

rv_csr_t CSR_MMISCCTRL_Type::bpu

bit: 3 dynamic prediction enable flag

Definition at line 234 of file core_feature_base.h.

◆ d

rv_csr_t CSR_MMISCCTRL_Type::d

Type used for csr data access.

Definition at line 245 of file core_feature_base.h.

◆ misalign

rv_csr_t CSR_MMISCCTRL_Type::misalign

bit: 6 misaligned access support flag

Definition at line 236 of file core_feature_base.h.

◆ nmi_cause

rv_csr_t CSR_MMISCCTRL_Type::nmi_cause

bit: 9 mnvec control and nmi mcase exccode

Definition at line 238 of file core_feature_base.h.