NMSIS-Core
Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices
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Union type to access MILM_CTL CSR register. More...
Data Fields | |
struct { | |
rv_csr_t ilm_en:1 | |
ILM enable. More... | |
rv_csr_t ilm_ecc_en:1 | |
ILM ECC eanble. More... | |
rv_csr_t ilm_ecc_excp_en:1 | |
ILM ECC exception enable. More... | |
rv_csr_t ilm_rwecc:1 | |
Control mecc_code write to ilm, simulate error injection. More... | |
rv_csr_t _reserved0:6 | |
Reserved. More... | |
rv_csr_t ilm_bpa:__RISCV_XLEN-10 | |
ILM base address. More... | |
} | b |
Structure used for bit access. More... | |
rv_csr_t | d |
Type used for csr data access. More... | |
Union type to access MILM_CTL CSR register.
Definition at line 297 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::_reserved0 |
Reserved.
Definition at line 303 of file core_feature_base.h.
struct { ... } CSR_MILMCTL_Type::b |
Structure used for bit access.
rv_csr_t CSR_MILMCTL_Type::d |
Type used for csr data access.
Definition at line 306 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::ilm_bpa |
ILM base address.
Definition at line 304 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::ilm_ecc_en |
ILM ECC eanble.
Definition at line 300 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::ilm_ecc_excp_en |
ILM ECC exception enable.
Definition at line 301 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::ilm_en |
ILM enable.
Definition at line 299 of file core_feature_base.h.
rv_csr_t CSR_MILMCTL_Type::ilm_rwecc |
Control mecc_code write to ilm, simulate error injection.
Definition at line 302 of file core_feature_base.h.