NMSIS-Core  Version 1.2.0
NMSIS-Core support for Nuclei processor-based devices

Union type to access MECC_CODE CSR register. More...

Data Fields

struct {
   rv_csr_t   code:9
 Used to inject ECC check code. More...
 
   rv_csr_t   _reserved0:7
 Reserved. More...
 
   rv_csr_t   ramid:5
 Indicate 2bit ECC error, software can clear these bits. More...
 
   rv_csr_t   _reserved1:3
 Reserved. More...
 
   rv_csr_t   sramid:5
 Indicate 1bit ECC error, software can clear these bits. More...
 
   rv_csr_t   _reserved2:__RISCV_XLEN-29
 Reserved. More...
 
b
 Structure used for bit access. More...
 
rv_csr_t d
 Type used for csr data access. More...
 

Detailed Description

Union type to access MECC_CODE CSR register.

Definition at line 421 of file core_feature_base.h.

Field Documentation

◆ _reserved0

rv_csr_t CSR_MECCCODE_Type::_reserved0

Reserved.

Definition at line 424 of file core_feature_base.h.

◆ _reserved1

rv_csr_t CSR_MECCCODE_Type::_reserved1

Reserved.

Definition at line 426 of file core_feature_base.h.

◆ _reserved2

rv_csr_t CSR_MECCCODE_Type::_reserved2

Reserved.

Definition at line 428 of file core_feature_base.h.

◆ b

struct { ... } CSR_MECCCODE_Type::b

Structure used for bit access.

◆ code

rv_csr_t CSR_MECCCODE_Type::code

Used to inject ECC check code.

Definition at line 423 of file core_feature_base.h.

◆ d

rv_csr_t CSR_MECCCODE_Type::d

Type used for csr data access.

Definition at line 430 of file core_feature_base.h.

◆ ramid

rv_csr_t CSR_MECCCODE_Type::ramid

Indicate 2bit ECC error, software can clear these bits.

Definition at line 425 of file core_feature_base.h.

◆ sramid

rv_csr_t CSR_MECCCODE_Type::sramid

Indicate 1bit ECC error, software can clear these bits.

Definition at line 427 of file core_feature_base.h.