Union type to access MCACHE_CTL CSR register. More...

Data Fields
struct {
rv_csr_t ic_en:1
	I-Cache enable. More...

rv_csr_t ic_scpd_mod:1
	Scratchpad mode, 0: Scratchpad as ICache Data RAM, 1: Scratchpad as ILM SRAM. More...

rv_csr_t ic_ecc_en:1
	I-Cache ECC enable. More...

rv_csr_t ic_ecc_excp_en:1
	I-Cache 2bit ECC error exception enable. More...

rv_csr_t ic_rwtecc:1
	Control I-Cache Tag Ram ECC code injection. More...

rv_csr_t ic_rwdecc:1
	Control I-Cache Data Ram ECC code injection. More...

rv_csr_t _reserved0:10

rv_csr_t dc_en:1
	DCache enable. More...

rv_csr_t dc_ecc_en:1
	D-Cache ECC enable. More...

rv_csr_t dc_ecc_excp_en:1
	D-Cache 2bit ECC error exception enable. More...

rv_csr_t dc_rwtecc:1
	Control D-Cache Tag Ram ECC code injection. More...

rv_csr_t dc_rwdecc:1
	Control D-Cache Data Ram ECC code injection. More...

rv_csr_t _reserved1:__RISCV_XLEN-21

}	b
	Structure used for bit access. More...

rv_csr_t	d
	Type used for csr data access. More...

Detailed Description

Union type to access MCACHE_CTL CSR register.

Definition at line 253 of file core_feature_base.h.

Field Documentation

◆ _reserved0

rv_csr_t CSR_MCACHECTL_Type::_reserved0

Definition at line 261 of file core_feature_base.h.

◆ _reserved1

rv_csr_t CSR_MCACHECTL_Type::_reserved1

Definition at line 267 of file core_feature_base.h.

◆ b

struct { ... } CSR_MCACHECTL_Type::b

Structure used for bit access.

◆ d

rv_csr_t CSR_MCACHECTL_Type::d

Type used for csr data access.

Definition at line 269 of file core_feature_base.h.

◆ dc_ecc_en

rv_csr_t CSR_MCACHECTL_Type::dc_ecc_en

D-Cache ECC enable.

Definition at line 263 of file core_feature_base.h.

◆ dc_ecc_excp_en

rv_csr_t CSR_MCACHECTL_Type::dc_ecc_excp_en

D-Cache 2bit ECC error exception enable.

Definition at line 264 of file core_feature_base.h.

◆ dc_en

rv_csr_t CSR_MCACHECTL_Type::dc_en

DCache enable.

Definition at line 262 of file core_feature_base.h.

◆ dc_rwdecc

rv_csr_t CSR_MCACHECTL_Type::dc_rwdecc

Control D-Cache Data Ram ECC code injection.

Definition at line 266 of file core_feature_base.h.

◆ dc_rwtecc

rv_csr_t CSR_MCACHECTL_Type::dc_rwtecc

Control D-Cache Tag Ram ECC code injection.

Definition at line 265 of file core_feature_base.h.

◆ ic_ecc_en

rv_csr_t CSR_MCACHECTL_Type::ic_ecc_en

I-Cache ECC enable.

Definition at line 257 of file core_feature_base.h.

◆ ic_ecc_excp_en

rv_csr_t CSR_MCACHECTL_Type::ic_ecc_excp_en

I-Cache 2bit ECC error exception enable.

Definition at line 258 of file core_feature_base.h.

◆ ic_en

rv_csr_t CSR_MCACHECTL_Type::ic_en

I-Cache enable.

Definition at line 255 of file core_feature_base.h.

◆ ic_rwdecc

rv_csr_t CSR_MCACHECTL_Type::ic_rwdecc

Control I-Cache Data Ram ECC code injection.

Definition at line 260 of file core_feature_base.h.

◆ ic_rwtecc

rv_csr_t CSR_MCACHECTL_Type::ic_rwtecc

Control I-Cache Tag Ram ECC code injection.

Definition at line 259 of file core_feature_base.h.

◆ ic_scpd_mod

rv_csr_t CSR_MCACHECTL_Type::ic_scpd_mod

Scratchpad mode, 0: Scratchpad as ICache Data RAM, 1: Scratchpad as ILM SRAM.

Definition at line 256 of file core_feature_base.h.

Data Fields