CPU Intrinsic Functions

__STATIC_FORCEINLINE void __NOP (void)

__STATIC_FORCEINLINE void __WFI (void)

__STATIC_FORCEINLINE void __EBREAK (void)

__STATIC_FORCEINLINE void __ECALL (void)

__STATIC_FORCEINLINE void __enable_mcycle_counter (void)

__STATIC_FORCEINLINE void __disable_mcycle_counter (void)

__STATIC_FORCEINLINE void __enable_minstret_counter (void)

__STATIC_FORCEINLINE void __disable_minstret_counter (void)

__STATIC_FORCEINLINE void __enable_all_counter (void)

__STATIC_FORCEINLINE void __disable_all_counter (void)

__STATIC_FORCEINLINE void __FENCE_I (void)

__STATIC_FORCEINLINE uint8_t __LB (volatile void *addr)

__STATIC_FORCEINLINE uint16_t __LH (volatile void *addr)

__STATIC_FORCEINLINE uint32_t __LW (volatile void *addr)

__STATIC_FORCEINLINE void __SB (volatile void *addr, uint8_t val)

__STATIC_FORCEINLINE void __SH (volatile void *addr, uint16_t val)

__STATIC_FORCEINLINE void __SW (volatile void *addr, uint32_t val)

__STATIC_FORCEINLINE uint32_t __CAS_W (volatile uint32_t *addr, uint32_t oldval, uint32_t newval)

__STATIC_FORCEINLINE uint32_t __AMOSWAP_W (volatile uint32_t *addr, uint32_t newval)

__STATIC_FORCEINLINE int32_t __AMOADD_W (volatile int32_t *addr, int32_t value)

__STATIC_FORCEINLINE int32_t __AMOAND_W (volatile int32_t *addr, int32_t value)

__STATIC_FORCEINLINE int32_t __AMOOR_W (volatile int32_t *addr, int32_t value)

__STATIC_FORCEINLINE int32_t __AMOXOR_W (volatile int32_t *addr, int32_t value)

__STATIC_FORCEINLINE uint32_t __AMOMAXU_W (volatile uint32_t *addr, uint32_t value)

__STATIC_FORCEINLINE int32_t __AMOMAX_W (volatile int32_t *addr, int32_t value)

__STATIC_FORCEINLINE uint32_t __AMOMINU_W (volatile uint32_t *addr, uint32_t value)

__STATIC_FORCEINLINE int32_t __AMOMIN_W (volatile int32_t *addr, int32_t value)

__FENCE(p, s) __ASM volatile ("fence " #p "," #s : : : "memory")

__RWMB() __FENCE(iorw,iorw)

__RMB() __FENCE(ir,ir)

__WMB() __FENCE(ow,ow)

__SMP_RWMB() __FENCE(rw,rw)

__SMP_RMB() __FENCE(r,r)

__SMP_WMB() __FENCE(w,w)

__CPU_RELAX() __ASM volatile ("" : : : "memory")

group NMSIS_Core_CPU_Intrinsic

Functions that generate RISC-V CPU instructions.

The following functions generate specified RISC-V instructions that cannot be directly accessed by compiler.

Defines

__FENCE(p, s) __ASM volatile ("fence " #p "," #s : : : "memory")

Execute fence instruction, p -> pred, s -> succ.

the FENCE instruction ensures that all memory accesses from instructions preceding the fence in program order (the predecessor set) appear earlier in the global memory order than memory accesses from instructions appearing after the fence in program order (the successor set). For details, please refer to The RISC-V Instruction Set Manual

Parameters

p – predecessor set, such as iorw, rw, r, w
s – successor set, such as iorw, rw, r, w

__RWMB() __FENCE(iorw,iorw): Read & Write Memory barrier.

__RMB() __FENCE(ir,ir): Read Memory barrier.

__WMB() __FENCE(ow,ow): Write Memory barrier.

__SMP_RWMB() __FENCE(rw,rw): SMP Read & Write Memory barrier.

__SMP_RMB() __FENCE(r,r): SMP Read Memory barrier.

__SMP_WMB() __FENCE(w,w): SMP Write Memory barrier.

__CPU_RELAX() __ASM volatile ("" : : : "memory"): CPU relax for busy loop.

Functions

__STATIC_FORCEINLINE void __NOP (void)

NOP Instruction.

No Operation does nothing. This instruction can be used for code alignment purposes.

__STATIC_FORCEINLINE void __WFI (void)

Wait For Interrupt.

The Wait for Interrupt instruction (WFI) provides a hint to the implementation that the current hart can be stalled until an interrupt might need servicing. Execution of the WFI instruction can also be used to inform the hardware platform that suitable interrupts should preferentially be routed to this hart.

__STATIC_FORCEINLINE void __EBREAK (void)

Breakpoint Instruction.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

__STATIC_FORCEINLINE void __ECALL (void)

Environment Call Instruction.

The ECALL instruction is used to make a service request to the execution environment.

__STATIC_FORCEINLINE void __enable_mcycle_counter (void)

Enable MCYCLE counter.

Clear the CY bit of MCOUNTINHIBIT to 0 to enable MCYCLE Counter

__STATIC_FORCEINLINE void __disable_mcycle_counter (void)

Disable MCYCLE counter.

Set the CY bit of MCOUNTINHIBIT to 1 to disable MCYCLE Counter

__STATIC_FORCEINLINE void __enable_minstret_counter (void)

Enable MINSTRET counter.

Clear the IR bit of MCOUNTINHIBIT to 0 to enable MINSTRET Counter

__STATIC_FORCEINLINE void __disable_minstret_counter (void)

Disable MINSTRET counter.

Set the IR bit of MCOUNTINHIBIT to 1 to disable MINSTRET Counter

__STATIC_FORCEINLINE void __enable_all_counter (void)

Enable MCYCLE & MINSTRET counter.

Clear the IR and CY bit of MCOUNTINHIBIT to 1 to enable MINSTRET & MCYCLE Counter

__STATIC_FORCEINLINE void __disable_all_counter (void)

Disable MCYCLE & MINSTRET counter.

Set the IR and CY bit of MCOUNTINHIBIT to 1 to disable MINSTRET & MCYCLE Counter

__STATIC_FORCEINLINE void __FENCE_I (void)

Fence.i Instruction.

The FENCE.I instruction is used to synchronize the instruction and data streams.

__STATIC_FORCEINLINE uint8_t __LB (volatile void *addr)

Load 8bit value from address (8 bit)

Load 8 bit value.

Parameters: addr – [in] Address pointer to data
Returns: value of type uint8_t at (*addr)

__STATIC_FORCEINLINE uint16_t __LH (volatile void *addr)

Load 16bit value from address (16 bit)

Load 16 bit value.

Parameters: addr – [in] Address pointer to data
Returns: value of type uint16_t at (*addr)

__STATIC_FORCEINLINE uint32_t __LW (volatile void *addr)

Load 32bit value from address (32 bit)

Load 32 bit value.

Parameters: addr – [in] Address pointer to data
Returns: value of type uint32_t at (*addr)

__STATIC_FORCEINLINE void __SB (volatile void *addr, uint8_t val)

Write 8bit value to address (8 bit)

Write 8 bit value.

Parameters

addr – [in] Address pointer to data
val – [in] Value to set

__STATIC_FORCEINLINE void __SH (volatile void *addr, uint16_t val)

Write 16bit value to address (16 bit)

Write 16 bit value.

Parameters

addr – [in] Address pointer to data
val – [in] Value to set

__STATIC_FORCEINLINE void __SW (volatile void *addr, uint32_t val)

Write 32bit value to address (32 bit)

Write 32 bit value.

Parameters

addr – [in] Address pointer to data
val – [in] Value to set

__STATIC_FORCEINLINE uint32_t __CAS_W (volatile uint32_t *addr, uint32_t oldval, uint32_t newval)

Compare and Swap 32bit value using LR and SC.

Compare old value with memory, if identical, store new value in memory. Return the initial value in memory. Success is indicated by comparing return value with OLD. memory address, return 0 if successful, otherwise return !0

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
oldval – [in] Old value of the data in address
newval – [in] New value to be stored into the address

Returns

return the initial value in memory

__STATIC_FORCEINLINE uint32_t __AMOSWAP_W (volatile uint32_t *addr, uint32_t newval)

Atomic Swap 32bit value into memory.

Atomically swap new 32bit value into memory using amoswap.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
newval – [in] New value to be stored into the address

Returns

return the original value in memory

__STATIC_FORCEINLINE int32_t __AMOADD_W (volatile int32_t *addr, int32_t value)

Atomic Add with 32bit value.

Atomically ADD 32bit value with value in memory using amoadd.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be ADDed

Returns

return memory value + add value

__STATIC_FORCEINLINE int32_t __AMOAND_W (volatile int32_t *addr, int32_t value)

Atomic And with 32bit value.

Atomically AND 32bit value with value in memory using amoand.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be ANDed

Returns

return memory value & and value

__STATIC_FORCEINLINE int32_t __AMOOR_W (volatile int32_t *addr, int32_t value)

Atomic OR with 32bit value.

Atomically OR 32bit value with value in memory using amoor.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be ORed

Returns

return memory value | and value

__STATIC_FORCEINLINE int32_t __AMOXOR_W (volatile int32_t *addr, int32_t value)

Atomic XOR with 32bit value.

Atomically XOR 32bit value with value in memory using amoxor.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be XORed

Returns

return memory value ^ and value

__STATIC_FORCEINLINE uint32_t __AMOMAXU_W (volatile uint32_t *addr, uint32_t value)

Atomic unsigned MAX with 32bit value.

Atomically unsigned max compare 32bit value with value in memory using amomaxu.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be compared

Returns

return the bigger value

__STATIC_FORCEINLINE int32_t __AMOMAX_W (volatile int32_t *addr, int32_t value)

Atomic signed MAX with 32bit value.

Atomically signed max compare 32bit value with value in memory using amomax.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be compared

Returns

the bigger value

__STATIC_FORCEINLINE uint32_t __AMOMINU_W (volatile uint32_t *addr, uint32_t value)

Atomic unsigned MIN with 32bit value.

Atomically unsigned min compare 32bit value with value in memory using amominu.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be compared

Returns

the smaller value

__STATIC_FORCEINLINE int32_t __AMOMIN_W (volatile int32_t *addr, int32_t value)

Atomic signed MIN with 32bit value.

Atomically signed min compare 32bit value with value in memory using amomin.d.

Parameters

addr – [in] Address pointer to data, address need to be 4byte aligned
value – [in] value to be compared

Returns

the smaller value